staging: rtl8188eu: rename HalSetBrateCfg() - style
[linux/fpc-iii.git] / drivers / iio / adc / ad7298.c
blobe0220825fde053e77cd475c961aef690a53cac1b
1 /*
2 * AD7298 SPI ADC driver
4 * Copyright 2011 Analog Devices Inc.
6 * Licensed under the GPL-2.
7 */
9 #include <linux/device.h>
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
12 #include <linux/sysfs.h>
13 #include <linux/spi/spi.h>
14 #include <linux/regulator/consumer.h>
15 #include <linux/err.h>
16 #include <linux/delay.h>
17 #include <linux/module.h>
18 #include <linux/interrupt.h>
19 #include <linux/bitops.h>
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include <linux/iio/buffer.h>
24 #include <linux/iio/trigger_consumer.h>
25 #include <linux/iio/triggered_buffer.h>
27 #include <linux/platform_data/ad7298.h>
29 #define AD7298_WRITE BIT(15) /* write to the control register */
30 #define AD7298_REPEAT BIT(14) /* repeated conversion enable */
31 #define AD7298_CH(x) BIT(13 - (x)) /* channel select */
32 #define AD7298_TSENSE BIT(5) /* temperature conversion enable */
33 #define AD7298_EXTREF BIT(2) /* external reference enable */
34 #define AD7298_TAVG BIT(1) /* temperature sensor averaging enable */
35 #define AD7298_PDD BIT(0) /* partial power down enable */
37 #define AD7298_MAX_CHAN 8
38 #define AD7298_INTREF_mV 2500
40 #define AD7298_CH_TEMP 9
42 struct ad7298_state {
43 struct spi_device *spi;
44 struct regulator *reg;
45 unsigned ext_ref;
46 struct spi_transfer ring_xfer[10];
47 struct spi_transfer scan_single_xfer[3];
48 struct spi_message ring_msg;
49 struct spi_message scan_single_msg;
51 * DMA (thus cache coherency maintenance) requires the
52 * transfer buffers to live in their own cache lines.
54 __be16 rx_buf[12] ____cacheline_aligned;
55 __be16 tx_buf[2];
58 #define AD7298_V_CHAN(index) \
59 { \
60 .type = IIO_VOLTAGE, \
61 .indexed = 1, \
62 .channel = index, \
63 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
64 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
65 .address = index, \
66 .scan_index = index, \
67 .scan_type = { \
68 .sign = 'u', \
69 .realbits = 12, \
70 .storagebits = 16, \
71 .endianness = IIO_BE, \
72 }, \
75 static const struct iio_chan_spec ad7298_channels[] = {
77 .type = IIO_TEMP,
78 .indexed = 1,
79 .channel = 0,
80 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
81 BIT(IIO_CHAN_INFO_SCALE) |
82 BIT(IIO_CHAN_INFO_OFFSET),
83 .address = AD7298_CH_TEMP,
84 .scan_index = -1,
85 .scan_type = {
86 .sign = 's',
87 .realbits = 32,
88 .storagebits = 32,
91 AD7298_V_CHAN(0),
92 AD7298_V_CHAN(1),
93 AD7298_V_CHAN(2),
94 AD7298_V_CHAN(3),
95 AD7298_V_CHAN(4),
96 AD7298_V_CHAN(5),
97 AD7298_V_CHAN(6),
98 AD7298_V_CHAN(7),
99 IIO_CHAN_SOFT_TIMESTAMP(8),
103 * ad7298_update_scan_mode() setup the spi transfer buffer for the new scan mask
105 static int ad7298_update_scan_mode(struct iio_dev *indio_dev,
106 const unsigned long *active_scan_mask)
108 struct ad7298_state *st = iio_priv(indio_dev);
109 int i, m;
110 unsigned short command;
111 int scan_count;
113 /* Now compute overall size */
114 scan_count = bitmap_weight(active_scan_mask, indio_dev->masklength);
116 command = AD7298_WRITE | st->ext_ref;
118 for (i = 0, m = AD7298_CH(0); i < AD7298_MAX_CHAN; i++, m >>= 1)
119 if (test_bit(i, active_scan_mask))
120 command |= m;
122 st->tx_buf[0] = cpu_to_be16(command);
124 /* build spi ring message */
125 st->ring_xfer[0].tx_buf = &st->tx_buf[0];
126 st->ring_xfer[0].len = 2;
127 st->ring_xfer[0].cs_change = 1;
128 st->ring_xfer[1].tx_buf = &st->tx_buf[1];
129 st->ring_xfer[1].len = 2;
130 st->ring_xfer[1].cs_change = 1;
132 spi_message_init(&st->ring_msg);
133 spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);
134 spi_message_add_tail(&st->ring_xfer[1], &st->ring_msg);
136 for (i = 0; i < scan_count; i++) {
137 st->ring_xfer[i + 2].rx_buf = &st->rx_buf[i];
138 st->ring_xfer[i + 2].len = 2;
139 st->ring_xfer[i + 2].cs_change = 1;
140 spi_message_add_tail(&st->ring_xfer[i + 2], &st->ring_msg);
142 /* make sure last transfer cs_change is not set */
143 st->ring_xfer[i + 1].cs_change = 0;
145 return 0;
149 * ad7298_trigger_handler() bh of trigger launched polling to ring buffer
151 * Currently there is no option in this driver to disable the saving of
152 * timestamps within the ring.
154 static irqreturn_t ad7298_trigger_handler(int irq, void *p)
156 struct iio_poll_func *pf = p;
157 struct iio_dev *indio_dev = pf->indio_dev;
158 struct ad7298_state *st = iio_priv(indio_dev);
159 int b_sent;
161 b_sent = spi_sync(st->spi, &st->ring_msg);
162 if (b_sent)
163 goto done;
165 iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
166 iio_get_time_ns(indio_dev));
168 done:
169 iio_trigger_notify_done(indio_dev->trig);
171 return IRQ_HANDLED;
174 static int ad7298_scan_direct(struct ad7298_state *st, unsigned ch)
176 int ret;
177 st->tx_buf[0] = cpu_to_be16(AD7298_WRITE | st->ext_ref |
178 (AD7298_CH(0) >> ch));
180 ret = spi_sync(st->spi, &st->scan_single_msg);
181 if (ret)
182 return ret;
184 return be16_to_cpu(st->rx_buf[0]);
187 static int ad7298_scan_temp(struct ad7298_state *st, int *val)
189 int ret;
190 __be16 buf;
192 buf = cpu_to_be16(AD7298_WRITE | AD7298_TSENSE |
193 AD7298_TAVG | st->ext_ref);
195 ret = spi_write(st->spi, (u8 *)&buf, 2);
196 if (ret)
197 return ret;
199 buf = cpu_to_be16(0);
201 ret = spi_write(st->spi, (u8 *)&buf, 2);
202 if (ret)
203 return ret;
205 usleep_range(101, 1000); /* sleep > 100us */
207 ret = spi_read(st->spi, (u8 *)&buf, 2);
208 if (ret)
209 return ret;
211 *val = sign_extend32(be16_to_cpu(buf), 11);
213 return 0;
216 static int ad7298_get_ref_voltage(struct ad7298_state *st)
218 int vref;
220 if (st->ext_ref) {
221 vref = regulator_get_voltage(st->reg);
222 if (vref < 0)
223 return vref;
225 return vref / 1000;
226 } else {
227 return AD7298_INTREF_mV;
231 static int ad7298_read_raw(struct iio_dev *indio_dev,
232 struct iio_chan_spec const *chan,
233 int *val,
234 int *val2,
235 long m)
237 int ret;
238 struct ad7298_state *st = iio_priv(indio_dev);
240 switch (m) {
241 case IIO_CHAN_INFO_RAW:
242 ret = iio_device_claim_direct_mode(indio_dev);
243 if (ret)
244 return ret;
246 if (chan->address == AD7298_CH_TEMP)
247 ret = ad7298_scan_temp(st, val);
248 else
249 ret = ad7298_scan_direct(st, chan->address);
251 iio_device_release_direct_mode(indio_dev);
253 if (ret < 0)
254 return ret;
256 if (chan->address != AD7298_CH_TEMP)
257 *val = ret & GENMASK(chan->scan_type.realbits - 1, 0);
259 return IIO_VAL_INT;
260 case IIO_CHAN_INFO_SCALE:
261 switch (chan->type) {
262 case IIO_VOLTAGE:
263 *val = ad7298_get_ref_voltage(st);
264 *val2 = chan->scan_type.realbits;
265 return IIO_VAL_FRACTIONAL_LOG2;
266 case IIO_TEMP:
267 *val = ad7298_get_ref_voltage(st);
268 *val2 = 10;
269 return IIO_VAL_FRACTIONAL;
270 default:
271 return -EINVAL;
273 case IIO_CHAN_INFO_OFFSET:
274 *val = 1093 - 2732500 / ad7298_get_ref_voltage(st);
275 return IIO_VAL_INT;
277 return -EINVAL;
280 static const struct iio_info ad7298_info = {
281 .read_raw = &ad7298_read_raw,
282 .update_scan_mode = ad7298_update_scan_mode,
285 static int ad7298_probe(struct spi_device *spi)
287 struct ad7298_platform_data *pdata = spi->dev.platform_data;
288 struct ad7298_state *st;
289 struct iio_dev *indio_dev;
290 int ret;
292 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
293 if (indio_dev == NULL)
294 return -ENOMEM;
296 st = iio_priv(indio_dev);
298 if (pdata && pdata->ext_ref)
299 st->ext_ref = AD7298_EXTREF;
301 if (st->ext_ref) {
302 st->reg = devm_regulator_get(&spi->dev, "vref");
303 if (IS_ERR(st->reg))
304 return PTR_ERR(st->reg);
306 ret = regulator_enable(st->reg);
307 if (ret)
308 return ret;
311 spi_set_drvdata(spi, indio_dev);
313 st->spi = spi;
315 indio_dev->name = spi_get_device_id(spi)->name;
316 indio_dev->dev.parent = &spi->dev;
317 indio_dev->dev.of_node = spi->dev.of_node;
318 indio_dev->modes = INDIO_DIRECT_MODE;
319 indio_dev->channels = ad7298_channels;
320 indio_dev->num_channels = ARRAY_SIZE(ad7298_channels);
321 indio_dev->info = &ad7298_info;
323 /* Setup default message */
325 st->scan_single_xfer[0].tx_buf = &st->tx_buf[0];
326 st->scan_single_xfer[0].len = 2;
327 st->scan_single_xfer[0].cs_change = 1;
328 st->scan_single_xfer[1].tx_buf = &st->tx_buf[1];
329 st->scan_single_xfer[1].len = 2;
330 st->scan_single_xfer[1].cs_change = 1;
331 st->scan_single_xfer[2].rx_buf = &st->rx_buf[0];
332 st->scan_single_xfer[2].len = 2;
334 spi_message_init(&st->scan_single_msg);
335 spi_message_add_tail(&st->scan_single_xfer[0], &st->scan_single_msg);
336 spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg);
337 spi_message_add_tail(&st->scan_single_xfer[2], &st->scan_single_msg);
339 ret = iio_triggered_buffer_setup(indio_dev, NULL,
340 &ad7298_trigger_handler, NULL);
341 if (ret)
342 goto error_disable_reg;
344 ret = iio_device_register(indio_dev);
345 if (ret)
346 goto error_cleanup_ring;
348 return 0;
350 error_cleanup_ring:
351 iio_triggered_buffer_cleanup(indio_dev);
352 error_disable_reg:
353 if (st->ext_ref)
354 regulator_disable(st->reg);
356 return ret;
359 static int ad7298_remove(struct spi_device *spi)
361 struct iio_dev *indio_dev = spi_get_drvdata(spi);
362 struct ad7298_state *st = iio_priv(indio_dev);
364 iio_device_unregister(indio_dev);
365 iio_triggered_buffer_cleanup(indio_dev);
366 if (st->ext_ref)
367 regulator_disable(st->reg);
369 return 0;
372 static const struct spi_device_id ad7298_id[] = {
373 {"ad7298", 0},
376 MODULE_DEVICE_TABLE(spi, ad7298_id);
378 static struct spi_driver ad7298_driver = {
379 .driver = {
380 .name = "ad7298",
382 .probe = ad7298_probe,
383 .remove = ad7298_remove,
384 .id_table = ad7298_id,
386 module_spi_driver(ad7298_driver);
388 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
389 MODULE_DESCRIPTION("Analog Devices AD7298 ADC");
390 MODULE_LICENSE("GPL v2");