staging: rtl8188eu: rename HalSetBrateCfg() - style
[linux/fpc-iii.git] / drivers / mtd / devices / m25p80.c
blobcbfafc453274aa2bef7aee285c5109601516d5e7
1 /*
2 * MTD SPI driver for ST M25Pxx (and similar) serial flash chips
4 * Author: Mike Lavender, mike@steroidmicros.com
6 * Copyright (c) 2005, Intec Automation Inc.
8 * Some parts are based on lart.c by Abraham Van Der Merwe
10 * Cleaned up and generalized based on mtd_dataflash.c
12 * This code is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
18 #include <linux/err.h>
19 #include <linux/errno.h>
20 #include <linux/module.h>
21 #include <linux/device.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/partitions.h>
26 #include <linux/spi/spi.h>
27 #include <linux/spi/spi-mem.h>
28 #include <linux/spi/flash.h>
29 #include <linux/mtd/spi-nor.h>
31 struct m25p {
32 struct spi_mem *spimem;
33 struct spi_nor spi_nor;
36 static int m25p80_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
38 struct m25p *flash = nor->priv;
39 struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(code, 1),
40 SPI_MEM_OP_NO_ADDR,
41 SPI_MEM_OP_NO_DUMMY,
42 SPI_MEM_OP_DATA_IN(len, val, 1));
43 int ret;
45 ret = spi_mem_exec_op(flash->spimem, &op);
46 if (ret < 0)
47 dev_err(&flash->spimem->spi->dev, "error %d reading %x\n", ret,
48 code);
50 return ret;
53 static int m25p80_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
55 struct m25p *flash = nor->priv;
56 struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 1),
57 SPI_MEM_OP_NO_ADDR,
58 SPI_MEM_OP_NO_DUMMY,
59 SPI_MEM_OP_DATA_OUT(len, buf, 1));
61 return spi_mem_exec_op(flash->spimem, &op);
64 static ssize_t m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
65 const u_char *buf)
67 struct m25p *flash = nor->priv;
68 struct spi_mem_op op =
69 SPI_MEM_OP(SPI_MEM_OP_CMD(nor->program_opcode, 1),
70 SPI_MEM_OP_ADDR(nor->addr_width, to, 1),
71 SPI_MEM_OP_NO_DUMMY,
72 SPI_MEM_OP_DATA_OUT(len, buf, 1));
73 size_t remaining = len;
74 int ret;
76 /* get transfer protocols. */
77 op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->write_proto);
78 op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->write_proto);
79 op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->write_proto);
81 if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
82 op.addr.nbytes = 0;
84 while (remaining) {
85 op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX;
86 ret = spi_mem_adjust_op_size(flash->spimem, &op);
87 if (ret)
88 return ret;
90 ret = spi_mem_exec_op(flash->spimem, &op);
91 if (ret)
92 return ret;
94 op.addr.val += op.data.nbytes;
95 remaining -= op.data.nbytes;
96 op.data.buf.out += op.data.nbytes;
99 return len;
103 * Read an address range from the nor chip. The address range
104 * may be any size provided it is within the physical boundaries.
106 static ssize_t m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
107 u_char *buf)
109 struct m25p *flash = nor->priv;
110 struct spi_mem_op op =
111 SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 1),
112 SPI_MEM_OP_ADDR(nor->addr_width, from, 1),
113 SPI_MEM_OP_DUMMY(nor->read_dummy, 1),
114 SPI_MEM_OP_DATA_IN(len, buf, 1));
115 size_t remaining = len;
116 int ret;
118 /* get transfer protocols. */
119 op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->read_proto);
120 op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->read_proto);
121 op.dummy.buswidth = op.addr.buswidth;
122 op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->read_proto);
124 /* convert the dummy cycles to the number of bytes */
125 op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8;
127 while (remaining) {
128 op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX;
129 ret = spi_mem_adjust_op_size(flash->spimem, &op);
130 if (ret)
131 return ret;
133 ret = spi_mem_exec_op(flash->spimem, &op);
134 if (ret)
135 return ret;
137 op.addr.val += op.data.nbytes;
138 remaining -= op.data.nbytes;
139 op.data.buf.in += op.data.nbytes;
142 return len;
146 * board specific setup should have ensured the SPI clock used here
147 * matches what the READ command supports, at least until this driver
148 * understands FAST_READ (for clocks over 25 MHz).
150 static int m25p_probe(struct spi_mem *spimem)
152 struct spi_device *spi = spimem->spi;
153 struct flash_platform_data *data;
154 struct m25p *flash;
155 struct spi_nor *nor;
156 struct spi_nor_hwcaps hwcaps = {
157 .mask = SNOR_HWCAPS_READ |
158 SNOR_HWCAPS_READ_FAST |
159 SNOR_HWCAPS_PP,
161 char *flash_name;
162 int ret;
164 data = dev_get_platdata(&spimem->spi->dev);
166 flash = devm_kzalloc(&spimem->spi->dev, sizeof(*flash), GFP_KERNEL);
167 if (!flash)
168 return -ENOMEM;
170 nor = &flash->spi_nor;
172 /* install the hooks */
173 nor->read = m25p80_read;
174 nor->write = m25p80_write;
175 nor->write_reg = m25p80_write_reg;
176 nor->read_reg = m25p80_read_reg;
178 nor->dev = &spimem->spi->dev;
179 spi_nor_set_flash_node(nor, spi->dev.of_node);
180 nor->priv = flash;
182 spi_mem_set_drvdata(spimem, flash);
183 flash->spimem = spimem;
185 if (spi->mode & SPI_RX_QUAD) {
186 hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4;
188 if (spi->mode & SPI_TX_QUAD)
189 hwcaps.mask |= (SNOR_HWCAPS_READ_1_4_4 |
190 SNOR_HWCAPS_PP_1_1_4 |
191 SNOR_HWCAPS_PP_1_4_4);
192 } else if (spi->mode & SPI_RX_DUAL) {
193 hwcaps.mask |= SNOR_HWCAPS_READ_1_1_2;
195 if (spi->mode & SPI_TX_DUAL)
196 hwcaps.mask |= SNOR_HWCAPS_READ_1_2_2;
199 if (data && data->name)
200 nor->mtd.name = data->name;
202 if (!nor->mtd.name)
203 nor->mtd.name = spi_mem_get_name(spimem);
205 /* For some (historical?) reason many platforms provide two different
206 * names in flash_platform_data: "name" and "type". Quite often name is
207 * set to "m25p80" and then "type" provides a real chip name.
208 * If that's the case, respect "type" and ignore a "name".
210 if (data && data->type)
211 flash_name = data->type;
212 else if (!strcmp(spi->modalias, "spi-nor"))
213 flash_name = NULL; /* auto-detect */
214 else
215 flash_name = spi->modalias;
217 ret = spi_nor_scan(nor, flash_name, &hwcaps);
218 if (ret)
219 return ret;
221 return mtd_device_register(&nor->mtd, data ? data->parts : NULL,
222 data ? data->nr_parts : 0);
226 static int m25p_remove(struct spi_mem *spimem)
228 struct m25p *flash = spi_mem_get_drvdata(spimem);
230 spi_nor_restore(&flash->spi_nor);
232 /* Clean up MTD stuff. */
233 return mtd_device_unregister(&flash->spi_nor.mtd);
236 static void m25p_shutdown(struct spi_mem *spimem)
238 struct m25p *flash = spi_mem_get_drvdata(spimem);
240 spi_nor_restore(&flash->spi_nor);
243 * Do NOT add to this array without reading the following:
245 * Historically, many flash devices are bound to this driver by their name. But
246 * since most of these flash are compatible to some extent, and their
247 * differences can often be differentiated by the JEDEC read-ID command, we
248 * encourage new users to add support to the spi-nor library, and simply bind
249 * against a generic string here (e.g., "jedec,spi-nor").
251 * Many flash names are kept here in this list (as well as in spi-nor.c) to
252 * keep them available as module aliases for existing platforms.
254 static const struct spi_device_id m25p_ids[] = {
256 * Allow non-DT platform devices to bind to the "spi-nor" modalias, and
257 * hack around the fact that the SPI core does not provide uevent
258 * matching for .of_match_table
260 {"spi-nor"},
263 * Entries not used in DTs that should be safe to drop after replacing
264 * them with "spi-nor" in platform data.
266 {"s25sl064a"}, {"w25x16"}, {"m25p10"}, {"m25px64"},
269 * Entries that were used in DTs without "jedec,spi-nor" fallback and
270 * should be kept for backward compatibility.
272 {"at25df321a"}, {"at25df641"}, {"at26df081a"},
273 {"mx25l4005a"}, {"mx25l1606e"}, {"mx25l6405d"}, {"mx25l12805d"},
274 {"mx25l25635e"},{"mx66l51235l"},
275 {"n25q064"}, {"n25q128a11"}, {"n25q128a13"}, {"n25q512a"},
276 {"s25fl256s1"}, {"s25fl512s"}, {"s25sl12801"}, {"s25fl008k"},
277 {"s25fl064k"},
278 {"sst25vf040b"},{"sst25vf016b"},{"sst25vf032b"},{"sst25wf040"},
279 {"m25p40"}, {"m25p80"}, {"m25p16"}, {"m25p32"},
280 {"m25p64"}, {"m25p128"},
281 {"w25x80"}, {"w25x32"}, {"w25q32"}, {"w25q32dw"},
282 {"w25q80bl"}, {"w25q128"}, {"w25q256"},
284 /* Flashes that can't be detected using JEDEC */
285 {"m25p05-nonjedec"}, {"m25p10-nonjedec"}, {"m25p20-nonjedec"},
286 {"m25p40-nonjedec"}, {"m25p80-nonjedec"}, {"m25p16-nonjedec"},
287 {"m25p32-nonjedec"}, {"m25p64-nonjedec"}, {"m25p128-nonjedec"},
289 /* Everspin MRAMs (non-JEDEC) */
290 { "mr25h128" }, /* 128 Kib, 40 MHz */
291 { "mr25h256" }, /* 256 Kib, 40 MHz */
292 { "mr25h10" }, /* 1 Mib, 40 MHz */
293 { "mr25h40" }, /* 4 Mib, 40 MHz */
295 { },
297 MODULE_DEVICE_TABLE(spi, m25p_ids);
299 static const struct of_device_id m25p_of_table[] = {
301 * Generic compatibility for SPI NOR that can be identified by the
302 * JEDEC READ ID opcode (0x9F). Use this, if possible.
304 { .compatible = "jedec,spi-nor" },
307 MODULE_DEVICE_TABLE(of, m25p_of_table);
309 static struct spi_mem_driver m25p80_driver = {
310 .spidrv = {
311 .driver = {
312 .name = "m25p80",
313 .of_match_table = m25p_of_table,
315 .id_table = m25p_ids,
317 .probe = m25p_probe,
318 .remove = m25p_remove,
319 .shutdown = m25p_shutdown,
321 /* REVISIT: many of these chips have deep power-down modes, which
322 * should clearly be entered on suspend() to minimize power use.
323 * And also when they're otherwise idle...
327 module_spi_mem_driver(m25p80_driver);
329 MODULE_LICENSE("GPL");
330 MODULE_AUTHOR("Mike Lavender");
331 MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");