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staging: rtl8188eu: rename HalSetBrateCfg() - style
[linux/fpc-iii.git] / drivers / net / phy / marvell.c
blobf7c69ca34056e0e9846301b2637e6547688a91de
1 /*
2 * drivers/net/phy/marvell.c
3 *
4 * Driver for Marvell PHYs
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 *
10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
18 #include <linux/kernel.h>
19 #include <linux/string.h>
20 #include <linux/ctype.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/hwmon.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/spinlock.h>
31 #include <linux/mm.h>
32 #include <linux/module.h>
33 #include <linux/mii.h>
34 #include <linux/ethtool.h>
35 #include <linux/phy.h>
36 #include <linux/marvell_phy.h>
37 #include <linux/of.h>
38
39 #include <linux/io.h>
40 #include <asm/irq.h>
41 #include <linux/uaccess.h>
42
43 #define MII_MARVELL_PHY_PAGE 22
44 #define MII_MARVELL_COPPER_PAGE 0x00
45 #define MII_MARVELL_FIBER_PAGE 0x01
46 #define MII_MARVELL_MSCR_PAGE 0x02
47 #define MII_MARVELL_LED_PAGE 0x03
48 #define MII_MARVELL_MISC_TEST_PAGE 0x06
49 #define MII_MARVELL_WOL_PAGE 0x11
50
51 #define MII_M1011_IEVENT 0x13
52 #define MII_M1011_IEVENT_CLEAR 0x0000
53
54 #define MII_M1011_IMASK 0x12
55 #define MII_M1011_IMASK_INIT 0x6400
56 #define MII_M1011_IMASK_CLEAR 0x0000
57
58 #define MII_M1011_PHY_SCR 0x10
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
65
66 #define MII_M1111_PHY_LED_CONTROL 0x18
67 #define MII_M1111_PHY_LED_DIRECT 0x4100
68 #define MII_M1111_PHY_LED_COMBINE 0x411c
69 #define MII_M1111_PHY_EXT_CR 0x14
70 #define MII_M1111_RGMII_RX_DELAY BIT(7)
71 #define MII_M1111_RGMII_TX_DELAY BIT(1)
72 #define MII_M1111_PHY_EXT_SR 0x1b
73
74 #define MII_M1111_HWCFG_MODE_MASK 0xf
75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
77 #define MII_M1111_HWCFG_MODE_RTBI 0x7
78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
82
83 #define MII_88E1121_PHY_MSCR_REG 21
84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
87
88 #define MII_88E1121_MISC_TEST 0x1a
89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
95
96 #define MII_88E1510_TEMP_SENSOR 0x1b
97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
98
99 #define MII_88E6390_MISC_TEST 0x1b
100 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0
101 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
102 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
103 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
104 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
105
106 #define MII_88E6390_TEMP_SENSOR 0x1c
107 #define MII_88E6390_TEMP_SENSOR_MASK 0xff
108 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
109
110 #define MII_88E1318S_PHY_MSCR1_REG 16
111 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
112
113 /* Copper Specific Interrupt Enable Register */
114 #define MII_88E1318S_PHY_CSIER 0x12
115 /* WOL Event Interrupt Enable */
116 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
117
118 /* LED Timer Control Register */
119 #define MII_88E1318S_PHY_LED_TCR 0x12
120 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
121 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
122 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
123
124 /* Magic Packet MAC address registers */
125 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
126 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
127 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
128
129 #define MII_88E1318S_PHY_WOL_CTRL 0x10
130 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
131 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
132
133 #define MII_PHY_LED_CTRL 16
134 #define MII_88E1121_PHY_LED_DEF 0x0030
135 #define MII_88E1510_PHY_LED_DEF 0x1177
136
137 #define MII_M1011_PHY_STATUS 0x11
138 #define MII_M1011_PHY_STATUS_1000 0x8000
139 #define MII_M1011_PHY_STATUS_100 0x4000
140 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
141 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
142 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
143 #define MII_M1011_PHY_STATUS_LINK 0x0400
144
145 #define MII_88E3016_PHY_SPEC_CTRL 0x10
146 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
147 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
148
149 #define MII_88E1510_GEN_CTRL_REG_1 0x14
150 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
151 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
152 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
153
154 #define LPA_FIBER_1000HALF 0x40
155 #define LPA_FIBER_1000FULL 0x20
156
157 #define LPA_PAUSE_FIBER 0x180
158 #define LPA_PAUSE_ASYM_FIBER 0x100
159
160 #define ADVERTISE_FIBER_1000HALF 0x40
161 #define ADVERTISE_FIBER_1000FULL 0x20
162
163 #define ADVERTISE_PAUSE_FIBER 0x180
164 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
165
166 #define REGISTER_LINK_STATUS 0x400
167 #define NB_FIBER_STATS 1
168
169 MODULE_DESCRIPTION("Marvell PHY driver");
170 MODULE_AUTHOR("Andy Fleming");
171 MODULE_LICENSE("GPL");
172
173 struct marvell_hw_stat {
174 const char *string;
175 u8 page;
176 u8 reg;
177 u8 bits;
178 };
179
180 static struct marvell_hw_stat marvell_hw_stats[] = {
181 { "phy_receive_errors_copper", 0, 21, 16},
182 { "phy_idle_errors", 0, 10, 8 },
183 { "phy_receive_errors_fiber", 1, 21, 16},
184 };
185
186 struct marvell_priv {
187 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
188 char *hwmon_name;
189 struct device *hwmon_dev;
190 };
191
192 static int marvell_read_page(struct phy_device *phydev)
193 {
194 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
195 }
196
197 static int marvell_write_page(struct phy_device *phydev, int page)
198 {
199 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
200 }
201
202 static int marvell_set_page(struct phy_device *phydev, int page)
203 {
204 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
205 }
206
207 static int marvell_ack_interrupt(struct phy_device *phydev)
208 {
209 int err;
210
211 /* Clear the interrupts by reading the reg */
212 err = phy_read(phydev, MII_M1011_IEVENT);
213
214 if (err < 0)
215 return err;
216
217 return 0;
218 }
219
220 static int marvell_config_intr(struct phy_device *phydev)
221 {
222 int err;
223
224 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
225 err = phy_write(phydev, MII_M1011_IMASK,
226 MII_M1011_IMASK_INIT);
227 else
228 err = phy_write(phydev, MII_M1011_IMASK,
229 MII_M1011_IMASK_CLEAR);
230
231 return err;
232 }
233
234 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
235 {
236 int reg;
237 int err;
238 int val;
239
240 /* get the current settings */
241 reg = phy_read(phydev, MII_M1011_PHY_SCR);
242 if (reg < 0)
243 return reg;
244
245 val = reg;
246 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
247 switch (polarity) {
248 case ETH_TP_MDI:
249 val |= MII_M1011_PHY_SCR_MDI;
250 break;
251 case ETH_TP_MDI_X:
252 val |= MII_M1011_PHY_SCR_MDI_X;
253 break;
254 case ETH_TP_MDI_AUTO:
255 case ETH_TP_MDI_INVALID:
256 default:
257 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
258 break;
259 }
260
261 if (val != reg) {
262 /* Set the new polarity value in the register */
263 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
264 if (err)
265 return err;
266 }
267
268 return 0;
269 }
270
271 static int marvell_set_downshift(struct phy_device *phydev, bool enable,
272 u8 retries)
273 {
274 int reg;
275
276 reg = phy_read(phydev, MII_M1011_PHY_SCR);
277 if (reg < 0)
278 return reg;
279
280 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
281 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
282 if (enable)
283 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
284
285 return phy_write(phydev, MII_M1011_PHY_SCR, reg);
286 }
287
288 static int marvell_config_aneg(struct phy_device *phydev)
289 {
290 int err;
291
292 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
293 if (err < 0)
294 return err;
295
296 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
297 MII_M1111_PHY_LED_DIRECT);
298 if (err < 0)
299 return err;
300
301 err = genphy_config_aneg(phydev);
302 if (err < 0)
303 return err;
304
305 if (phydev->autoneg != AUTONEG_ENABLE) {
306 /* A write to speed/duplex bits (that is performed by
307 * genphy_config_aneg() call above) must be followed by
308 * a software reset. Otherwise, the write has no effect.
309 */
310 err = genphy_soft_reset(phydev);
311 if (err < 0)
312 return err;
313 }
314
315 return 0;
316 }
317
318 static int m88e1101_config_aneg(struct phy_device *phydev)
319 {
320 int err;
321
322 /* This Marvell PHY has an errata which requires
323 * that certain registers get written in order
324 * to restart autonegotiation
325 */
326 err = genphy_soft_reset(phydev);
327 if (err < 0)
328 return err;
329
330 err = phy_write(phydev, 0x1d, 0x1f);
331 if (err < 0)
332 return err;
333
334 err = phy_write(phydev, 0x1e, 0x200c);
335 if (err < 0)
336 return err;
337
338 err = phy_write(phydev, 0x1d, 0x5);
339 if (err < 0)
340 return err;
341
342 err = phy_write(phydev, 0x1e, 0);
343 if (err < 0)
344 return err;
345
346 err = phy_write(phydev, 0x1e, 0x100);
347 if (err < 0)
348 return err;
349
350 return marvell_config_aneg(phydev);
351 }
352
353 static int m88e1111_config_aneg(struct phy_device *phydev)
354 {
355 int err;
356
357 /* The Marvell PHY has an errata which requires
358 * that certain registers get written in order
359 * to restart autonegotiation
360 */
361 err = genphy_soft_reset(phydev);
362
363 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
364 if (err < 0)
365 return err;
366
367 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
368 MII_M1111_PHY_LED_DIRECT);
369 if (err < 0)
370 return err;
371
372 err = genphy_config_aneg(phydev);
373 if (err < 0)
374 return err;
375
376 if (phydev->autoneg != AUTONEG_ENABLE) {
377 /* A write to speed/duplex bits (that is performed by
378 * genphy_config_aneg() call above) must be followed by
379 * a software reset. Otherwise, the write has no effect.
380 */
381 err = genphy_soft_reset(phydev);
382 if (err < 0)
383 return err;
384 }
385
386 return 0;
387 }
388
389 #ifdef CONFIG_OF_MDIO
390 /* Set and/or override some configuration registers based on the
391 * marvell,reg-init property stored in the of_node for the phydev.
392 *
393 * marvell,reg-init = <reg-page reg mask value>,...;
394 *
395 * There may be one or more sets of <reg-page reg mask value>:
396 *
397 * reg-page: which register bank to use.
398 * reg: the register.
399 * mask: if non-zero, ANDed with existing register value.
400 * value: ORed with the masked value and written to the regiser.
401 *
402 */
403 static int marvell_of_reg_init(struct phy_device *phydev)
404 {
405 const __be32 *paddr;
406 int len, i, saved_page, current_page, ret = 0;
407
408 if (!phydev->mdio.dev.of_node)
409 return 0;
410
411 paddr = of_get_property(phydev->mdio.dev.of_node,
412 "marvell,reg-init", &len);
413 if (!paddr || len < (4 * sizeof(*paddr)))
414 return 0;
415
416 saved_page = phy_save_page(phydev);
417 if (saved_page < 0)
418 goto err;
419 current_page = saved_page;
420
421 len /= sizeof(*paddr);
422 for (i = 0; i < len - 3; i += 4) {
423 u16 page = be32_to_cpup(paddr + i);
424 u16 reg = be32_to_cpup(paddr + i + 1);
425 u16 mask = be32_to_cpup(paddr + i + 2);
426 u16 val_bits = be32_to_cpup(paddr + i + 3);
427 int val;
428
429 if (page != current_page) {
430 current_page = page;
431 ret = marvell_write_page(phydev, page);
432 if (ret < 0)
433 goto err;
434 }
435
436 val = 0;
437 if (mask) {
438 val = __phy_read(phydev, reg);
439 if (val < 0) {
440 ret = val;
441 goto err;
442 }
443 val &= mask;
444 }
445 val |= val_bits;
446
447 ret = __phy_write(phydev, reg, val);
448 if (ret < 0)
449 goto err;
450 }
451 err:
452 return phy_restore_page(phydev, saved_page, ret);
453 }
454 #else
455 static int marvell_of_reg_init(struct phy_device *phydev)
456 {
457 return 0;
458 }
459 #endif /* CONFIG_OF_MDIO */
460
461 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
462 {
463 int mscr;
464
465 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
466 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
467 MII_88E1121_PHY_MSCR_TX_DELAY;
468 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
469 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
470 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
471 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
472 else
473 mscr = 0;
474
475 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
476 MII_88E1121_PHY_MSCR_REG,
477 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
478 }
479
480 static int m88e1121_config_aneg(struct phy_device *phydev)
481 {
482 int err = 0;
483
484 if (phy_interface_is_rgmii(phydev)) {
485 err = m88e1121_config_aneg_rgmii_delays(phydev);
486 if (err < 0)
487 return err;
488 }
489
490 err = genphy_soft_reset(phydev);
491 if (err < 0)
492 return err;
493
494 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
495 if (err < 0)
496 return err;
497
498 return genphy_config_aneg(phydev);
499 }
500
501 static int m88e1318_config_aneg(struct phy_device *phydev)
502 {
503 int err;
504
505 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
506 MII_88E1318S_PHY_MSCR1_REG,
507 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
508 if (err < 0)
509 return err;
510
511 return m88e1121_config_aneg(phydev);
512 }
513
514 /**
515 * ethtool_adv_to_fiber_adv_t
516 * @ethadv: the ethtool advertisement settings
517 *
518 * A small helper function that translates ethtool advertisement
519 * settings to phy autonegotiation advertisements for the
520 * MII_ADV register for fiber link.
521 */
522 static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
523 {
524 u32 result = 0;
525
526 if (ethadv & ADVERTISED_1000baseT_Half)
527 result |= ADVERTISE_FIBER_1000HALF;
528 if (ethadv & ADVERTISED_1000baseT_Full)
529 result |= ADVERTISE_FIBER_1000FULL;
530
531 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
532 result |= LPA_PAUSE_ASYM_FIBER;
533 else if (ethadv & ADVERTISE_PAUSE_CAP)
534 result |= (ADVERTISE_PAUSE_FIBER
535 & (~ADVERTISE_PAUSE_ASYM_FIBER));
536
537 return result;
538 }
539
540 /**
541 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
542 * @phydev: target phy_device struct
543 *
544 * Description: If auto-negotiation is enabled, we configure the
545 * advertising, and then restart auto-negotiation. If it is not
546 * enabled, then we write the BMCR. Adapted for fiber link in
547 * some Marvell's devices.
548 */
549 static int marvell_config_aneg_fiber(struct phy_device *phydev)
550 {
551 int changed = 0;
552 int err;
553 int adv, oldadv;
554 u32 advertise;
555
556 if (phydev->autoneg != AUTONEG_ENABLE)
557 return genphy_setup_forced(phydev);
558
559 /* Only allow advertising what this PHY supports */
560 phydev->advertising &= phydev->supported;
561 advertise = phydev->advertising;
562
563 /* Setup fiber advertisement */
564 adv = phy_read(phydev, MII_ADVERTISE);
565 if (adv < 0)
566 return adv;
567
568 oldadv = adv;
569 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
570 | LPA_PAUSE_FIBER);
571 adv |= ethtool_adv_to_fiber_adv_t(advertise);
572
573 if (adv != oldadv) {
574 err = phy_write(phydev, MII_ADVERTISE, adv);
575 if (err < 0)
576 return err;
577
578 changed = 1;
579 }
580
581 if (changed == 0) {
582 /* Advertisement hasn't changed, but maybe aneg was never on to
583 * begin with? Or maybe phy was isolated?
584 */
585 int ctl = phy_read(phydev, MII_BMCR);
586
587 if (ctl < 0)
588 return ctl;
589
590 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
591 changed = 1; /* do restart aneg */
592 }
593
594 /* Only restart aneg if we are advertising something different
595 * than we were before.
596 */
597 if (changed > 0)
598 changed = genphy_restart_aneg(phydev);
599
600 return changed;
601 }
602
603 static int m88e1510_config_aneg(struct phy_device *phydev)
604 {
605 int err;
606
607 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
608 if (err < 0)
609 goto error;
610
611 /* Configure the copper link first */
612 err = m88e1318_config_aneg(phydev);
613 if (err < 0)
614 goto error;
615
616 /* Do not touch the fiber page if we're in copper->sgmii mode */
617 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
618 return 0;
619
620 /* Then the fiber link */
621 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
622 if (err < 0)
623 goto error;
624
625 err = marvell_config_aneg_fiber(phydev);
626 if (err < 0)
627 goto error;
628
629 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
630
631 error:
632 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
633 return err;
634 }
635
636 static void marvell_config_led(struct phy_device *phydev)
637 {
638 u16 def_config;
639 int err;
640
641 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
642 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
643 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
644 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
645 def_config = MII_88E1121_PHY_LED_DEF;
646 break;
647 /* Default PHY LED config:
648 * LED[0] .. 1000Mbps Link
649 * LED[1] .. 100Mbps Link
650 * LED[2] .. Blink, Activity
651 */
652 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
653 def_config = MII_88E1510_PHY_LED_DEF;
654 break;
655 default:
656 return;
657 }
658
659 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
660 def_config);
661 if (err < 0)
662 pr_warn("Fail to config marvell phy LED.\n");
663 }
664
665 static int marvell_config_init(struct phy_device *phydev)
666 {
667 /* Set defalut LED */
668 marvell_config_led(phydev);
669
670 /* Set registers from marvell,reg-init DT property */
671 return marvell_of_reg_init(phydev);
672 }
673
674 static int m88e1116r_config_init(struct phy_device *phydev)
675 {
676 int err;
677
678 err = genphy_soft_reset(phydev);
679 if (err < 0)
680 return err;
681
682 msleep(500);
683
684 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
685 if (err < 0)
686 return err;
687
688 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
689 if (err < 0)
690 return err;
691
692 err = marvell_set_downshift(phydev, true, 8);
693 if (err < 0)
694 return err;
695
696 if (phy_interface_is_rgmii(phydev)) {
697 err = m88e1121_config_aneg_rgmii_delays(phydev);
698 if (err < 0)
699 return err;
700 }
701
702 err = genphy_soft_reset(phydev);
703 if (err < 0)
704 return err;
705
706 return marvell_config_init(phydev);
707 }
708
709 static int m88e3016_config_init(struct phy_device *phydev)
710 {
711 int ret;
712
713 /* Enable Scrambler and Auto-Crossover */
714 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
715 MII_88E3016_DISABLE_SCRAMBLER,
716 MII_88E3016_AUTO_MDIX_CROSSOVER);
717 if (ret < 0)
718 return ret;
719
720 return marvell_config_init(phydev);
721 }
722
723 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
724 u16 mode,
725 int fibre_copper_auto)
726 {
727 if (fibre_copper_auto)
728 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
729
730 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
731 MII_M1111_HWCFG_MODE_MASK |
732 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
733 MII_M1111_HWCFG_FIBER_COPPER_RES,
734 mode);
735 }
736
737 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
738 {
739 int delay;
740
741 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
742 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
743 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
744 delay = MII_M1111_RGMII_RX_DELAY;
745 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
746 delay = MII_M1111_RGMII_TX_DELAY;
747 } else {
748 delay = 0;
749 }
750
751 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
752 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
753 delay);
754 }
755
756 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
757 {
758 int temp;
759 int err;
760
761 err = m88e1111_config_init_rgmii_delays(phydev);
762 if (err < 0)
763 return err;
764
765 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
766 if (temp < 0)
767 return temp;
768
769 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
770
771 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
772 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
773 else
774 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
775
776 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
777 }
778
779 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
780 {
781 int err;
782
783 err = m88e1111_config_init_hwcfg_mode(
784 phydev,
785 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
786 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
787 if (err < 0)
788 return err;
789
790 /* make sure copper is selected */
791 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
792 }
793
794 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
795 {
796 int err;
797
798 err = m88e1111_config_init_rgmii_delays(phydev);
799 if (err < 0)
800 return err;
801
802 err = m88e1111_config_init_hwcfg_mode(
803 phydev,
804 MII_M1111_HWCFG_MODE_RTBI,
805 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
806 if (err < 0)
807 return err;
808
809 /* soft reset */
810 err = genphy_soft_reset(phydev);
811 if (err < 0)
812 return err;
813
814 return m88e1111_config_init_hwcfg_mode(
815 phydev,
816 MII_M1111_HWCFG_MODE_RTBI,
817 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
818 }
819
820 static int m88e1111_config_init(struct phy_device *phydev)
821 {
822 int err;
823
824 if (phy_interface_is_rgmii(phydev)) {
825 err = m88e1111_config_init_rgmii(phydev);
826 if (err < 0)
827 return err;
828 }
829
830 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
831 err = m88e1111_config_init_sgmii(phydev);
832 if (err < 0)
833 return err;
834 }
835
836 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
837 err = m88e1111_config_init_rtbi(phydev);
838 if (err < 0)
839 return err;
840 }
841
842 err = marvell_of_reg_init(phydev);
843 if (err < 0)
844 return err;
845
846 return genphy_soft_reset(phydev);
847 }
848
849 static int m88e1318_config_init(struct phy_device *phydev)
850 {
851 if (phy_interrupt_is_valid(phydev)) {
852 int err = phy_modify_paged(
853 phydev, MII_MARVELL_LED_PAGE,
854 MII_88E1318S_PHY_LED_TCR,
855 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
856 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
857 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
858 if (err < 0)
859 return err;
860 }
861
862 return marvell_config_init(phydev);
863 }
864
865 static int m88e1510_config_init(struct phy_device *phydev)
866 {
867 int err;
868
869 /* SGMII-to-Copper mode initialization */
870 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
871 u32 pause;
872
873 /* Select page 18 */
874 err = marvell_set_page(phydev, 18);
875 if (err < 0)
876 return err;
877
878 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
879 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
880 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
881 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
882 if (err < 0)
883 return err;
884
885 /* PHY reset is necessary after changing MODE[2:0] */
886 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
887 MII_88E1510_GEN_CTRL_REG_1_RESET);
888 if (err < 0)
889 return err;
890
891 /* Reset page selection */
892 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
893 if (err < 0)
894 return err;
895
896 /* There appears to be a bug in the 88e1512 when used in
897 * SGMII to copper mode, where the AN advertisement register
898 * clears the pause bits each time a negotiation occurs.
899 * This means we can never be truely sure what was advertised,
900 * so disable Pause support.
901 */
902 pause = SUPPORTED_Pause | SUPPORTED_Asym_Pause;
903 phydev->supported &= ~pause;
904 phydev->advertising &= ~pause;
905 }
906
907 return m88e1318_config_init(phydev);
908 }
909
910 static int m88e1118_config_aneg(struct phy_device *phydev)
911 {
912 int err;
913
914 err = genphy_soft_reset(phydev);
915 if (err < 0)
916 return err;
917
918 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
919 if (err < 0)
920 return err;
921
922 err = genphy_config_aneg(phydev);
923 return 0;
924 }
925
926 static int m88e1118_config_init(struct phy_device *phydev)
927 {
928 int err;
929
930 /* Change address */
931 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
932 if (err < 0)
933 return err;
934
935 /* Enable 1000 Mbit */
936 err = phy_write(phydev, 0x15, 0x1070);
937 if (err < 0)
938 return err;
939
940 /* Change address */
941 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
942 if (err < 0)
943 return err;
944
945 /* Adjust LED Control */
946 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
947 err = phy_write(phydev, 0x10, 0x1100);
948 else
949 err = phy_write(phydev, 0x10, 0x021e);
950 if (err < 0)
951 return err;
952
953 err = marvell_of_reg_init(phydev);
954 if (err < 0)
955 return err;
956
957 /* Reset address */
958 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
959 if (err < 0)
960 return err;
961
962 return genphy_soft_reset(phydev);
963 }
964
965 static int m88e1149_config_init(struct phy_device *phydev)
966 {
967 int err;
968
969 /* Change address */
970 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
971 if (err < 0)
972 return err;
973
974 /* Enable 1000 Mbit */
975 err = phy_write(phydev, 0x15, 0x1048);
976 if (err < 0)
977 return err;
978
979 err = marvell_of_reg_init(phydev);
980 if (err < 0)
981 return err;
982
983 /* Reset address */
984 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
985 if (err < 0)
986 return err;
987
988 return genphy_soft_reset(phydev);
989 }
990
991 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
992 {
993 int err;
994
995 err = m88e1111_config_init_rgmii_delays(phydev);
996 if (err < 0)
997 return err;
998
999 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1000 err = phy_write(phydev, 0x1d, 0x0012);
1001 if (err < 0)
1002 return err;
1003
1004 err = phy_modify(phydev, 0x1e, 0x0fc0,
1005 2 << 9 | /* 36 ohm */
1006 2 << 6); /* 39 ohm */
1007 if (err < 0)
1008 return err;
1009
1010 err = phy_write(phydev, 0x1d, 0x3);
1011 if (err < 0)
1012 return err;
1013
1014 err = phy_write(phydev, 0x1e, 0x8000);
1015 }
1016 return err;
1017 }
1018
1019 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1020 {
1021 return m88e1111_config_init_hwcfg_mode(
1022 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1023 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1024 }
1025
1026 static int m88e1145_config_init(struct phy_device *phydev)
1027 {
1028 int err;
1029
1030 /* Take care of errata E0 & E1 */
1031 err = phy_write(phydev, 0x1d, 0x001b);
1032 if (err < 0)
1033 return err;
1034
1035 err = phy_write(phydev, 0x1e, 0x418f);
1036 if (err < 0)
1037 return err;
1038
1039 err = phy_write(phydev, 0x1d, 0x0016);
1040 if (err < 0)
1041 return err;
1042
1043 err = phy_write(phydev, 0x1e, 0xa2da);
1044 if (err < 0)
1045 return err;
1046
1047 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1048 err = m88e1145_config_init_rgmii(phydev);
1049 if (err < 0)
1050 return err;
1051 }
1052
1053 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1054 err = m88e1145_config_init_sgmii(phydev);
1055 if (err < 0)
1056 return err;
1057 }
1058
1059 err = marvell_of_reg_init(phydev);
1060 if (err < 0)
1061 return err;
1062
1063 return 0;
1064 }
1065
1066 /**
1067 * fiber_lpa_to_ethtool_lpa_t
1068 * @lpa: value of the MII_LPA register for fiber link
1069 *
1070 * A small helper function that translates MII_LPA
1071 * bits to ethtool LP advertisement settings.
1072 */
1073 static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1074 {
1075 u32 result = 0;
1076
1077 if (lpa & LPA_FIBER_1000HALF)
1078 result |= ADVERTISED_1000baseT_Half;
1079 if (lpa & LPA_FIBER_1000FULL)
1080 result |= ADVERTISED_1000baseT_Full;
1081
1082 return result;
1083 }
1084
1085 /**
1086 * marvell_update_link - update link status in real time in @phydev
1087 * @phydev: target phy_device struct
1088 *
1089 * Description: Update the value in phydev->link to reflect the
1090 * current link value.
1091 */
1092 static int marvell_update_link(struct phy_device *phydev, int fiber)
1093 {
1094 int status;
1095
1096 /* Use the generic register for copper link, or specific
1097 * register for fiber case
1098 */
1099 if (fiber) {
1100 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1101 if (status < 0)
1102 return status;
1103
1104 if ((status & REGISTER_LINK_STATUS) == 0)
1105 phydev->link = 0;
1106 else
1107 phydev->link = 1;
1108 } else {
1109 return genphy_update_link(phydev);
1110 }
1111
1112 return 0;
1113 }
1114
1115 static int marvell_read_status_page_an(struct phy_device *phydev,
1116 int fiber)
1117 {
1118 int status;
1119 int lpa;
1120 int lpagb;
1121
1122 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1123 if (status < 0)
1124 return status;
1125
1126 lpa = phy_read(phydev, MII_LPA);
1127 if (lpa < 0)
1128 return lpa;
1129
1130 lpagb = phy_read(phydev, MII_STAT1000);
1131 if (lpagb < 0)
1132 return lpagb;
1133
1134 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1135 phydev->duplex = DUPLEX_FULL;
1136 else
1137 phydev->duplex = DUPLEX_HALF;
1138
1139 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1140 phydev->pause = 0;
1141 phydev->asym_pause = 0;
1142
1143 switch (status) {
1144 case MII_M1011_PHY_STATUS_1000:
1145 phydev->speed = SPEED_1000;
1146 break;
1147
1148 case MII_M1011_PHY_STATUS_100:
1149 phydev->speed = SPEED_100;
1150 break;
1151
1152 default:
1153 phydev->speed = SPEED_10;
1154 break;
1155 }
1156
1157 if (!fiber) {
1158 phydev->lp_advertising =
1159 mii_stat1000_to_ethtool_lpa_t(lpagb) |
1160 mii_lpa_to_ethtool_lpa_t(lpa);
1161
1162 if (phydev->duplex == DUPLEX_FULL) {
1163 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1164 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1165 }
1166 } else {
1167 /* The fiber link is only 1000M capable */
1168 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1169
1170 if (phydev->duplex == DUPLEX_FULL) {
1171 if (!(lpa & LPA_PAUSE_FIBER)) {
1172 phydev->pause = 0;
1173 phydev->asym_pause = 0;
1174 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1175 phydev->pause = 1;
1176 phydev->asym_pause = 1;
1177 } else {
1178 phydev->pause = 1;
1179 phydev->asym_pause = 0;
1180 }
1181 }
1182 }
1183 return 0;
1184 }
1185
1186 static int marvell_read_status_page_fixed(struct phy_device *phydev)
1187 {
1188 int bmcr = phy_read(phydev, MII_BMCR);
1189
1190 if (bmcr < 0)
1191 return bmcr;
1192
1193 if (bmcr & BMCR_FULLDPLX)
1194 phydev->duplex = DUPLEX_FULL;
1195 else
1196 phydev->duplex = DUPLEX_HALF;
1197
1198 if (bmcr & BMCR_SPEED1000)
1199 phydev->speed = SPEED_1000;
1200 else if (bmcr & BMCR_SPEED100)
1201 phydev->speed = SPEED_100;
1202 else
1203 phydev->speed = SPEED_10;
1204
1205 phydev->pause = 0;
1206 phydev->asym_pause = 0;
1207 phydev->lp_advertising = 0;
1208
1209 return 0;
1210 }
1211
1212 /* marvell_read_status_page
1213 *
1214 * Description:
1215 * Check the link, then figure out the current state
1216 * by comparing what we advertise with what the link partner
1217 * advertises. Start by checking the gigabit possibilities,
1218 * then move on to 10/100.
1219 */
1220 static int marvell_read_status_page(struct phy_device *phydev, int page)
1221 {
1222 int fiber;
1223 int err;
1224
1225 /* Detect and update the link, but return if there
1226 * was an error
1227 */
1228 if (page == MII_MARVELL_FIBER_PAGE)
1229 fiber = 1;
1230 else
1231 fiber = 0;
1232
1233 err = marvell_update_link(phydev, fiber);
1234 if (err)
1235 return err;
1236
1237 if (phydev->autoneg == AUTONEG_ENABLE)
1238 err = marvell_read_status_page_an(phydev, fiber);
1239 else
1240 err = marvell_read_status_page_fixed(phydev);
1241
1242 return err;
1243 }
1244
1245 /* marvell_read_status
1246 *
1247 * Some Marvell's phys have two modes: fiber and copper.
1248 * Both need status checked.
1249 * Description:
1250 * First, check the fiber link and status.
1251 * If the fiber link is down, check the copper link and status which
1252 * will be the default value if both link are down.
1253 */
1254 static int marvell_read_status(struct phy_device *phydev)
1255 {
1256 int err;
1257
1258 /* Check the fiber mode first */
1259 if (phydev->supported & SUPPORTED_FIBRE &&
1260 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1261 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1262 if (err < 0)
1263 goto error;
1264
1265 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1266 if (err < 0)
1267 goto error;
1268
1269 /* If the fiber link is up, it is the selected and
1270 * used link. In this case, we need to stay in the
1271 * fiber page. Please to be careful about that, avoid
1272 * to restore Copper page in other functions which
1273 * could break the behaviour for some fiber phy like
1274 * 88E1512.
1275 */
1276 if (phydev->link)
1277 return 0;
1278
1279 /* If fiber link is down, check and save copper mode state */
1280 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1281 if (err < 0)
1282 goto error;
1283 }
1284
1285 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1286
1287 error:
1288 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1289 return err;
1290 }
1291
1292 /* marvell_suspend
1293 *
1294 * Some Marvell's phys have two modes: fiber and copper.
1295 * Both need to be suspended
1296 */
1297 static int marvell_suspend(struct phy_device *phydev)
1298 {
1299 int err;
1300
1301 /* Suspend the fiber mode first */
1302 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1303 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1304 if (err < 0)
1305 goto error;
1306
1307 /* With the page set, use the generic suspend */
1308 err = genphy_suspend(phydev);
1309 if (err < 0)
1310 goto error;
1311
1312 /* Then, the copper link */
1313 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1314 if (err < 0)
1315 goto error;
1316 }
1317
1318 /* With the page set, use the generic suspend */
1319 return genphy_suspend(phydev);
1320
1321 error:
1322 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1323 return err;
1324 }
1325
1326 /* marvell_resume
1327 *
1328 * Some Marvell's phys have two modes: fiber and copper.
1329 * Both need to be resumed
1330 */
1331 static int marvell_resume(struct phy_device *phydev)
1332 {
1333 int err;
1334
1335 /* Resume the fiber mode first */
1336 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1337 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1338 if (err < 0)
1339 goto error;
1340
1341 /* With the page set, use the generic resume */
1342 err = genphy_resume(phydev);
1343 if (err < 0)
1344 goto error;
1345
1346 /* Then, the copper link */
1347 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1348 if (err < 0)
1349 goto error;
1350 }
1351
1352 /* With the page set, use the generic resume */
1353 return genphy_resume(phydev);
1354
1355 error:
1356 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1357 return err;
1358 }
1359
1360 static int marvell_aneg_done(struct phy_device *phydev)
1361 {
1362 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1363
1364 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1365 }
1366
1367 static int m88e1121_did_interrupt(struct phy_device *phydev)
1368 {
1369 int imask;
1370
1371 imask = phy_read(phydev, MII_M1011_IEVENT);
1372
1373 if (imask & MII_M1011_IMASK_INIT)
1374 return 1;
1375
1376 return 0;
1377 }
1378
1379 static void m88e1318_get_wol(struct phy_device *phydev,
1380 struct ethtool_wolinfo *wol)
1381 {
1382 int oldpage, ret = 0;
1383
1384 wol->supported = WAKE_MAGIC;
1385 wol->wolopts = 0;
1386
1387 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1388 if (oldpage < 0)
1389 goto error;
1390
1391 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1392 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1393 wol->wolopts |= WAKE_MAGIC;
1394
1395 error:
1396 phy_restore_page(phydev, oldpage, ret);
1397 }
1398
1399 static int m88e1318_set_wol(struct phy_device *phydev,
1400 struct ethtool_wolinfo *wol)
1401 {
1402 int err = 0, oldpage;
1403
1404 oldpage = phy_save_page(phydev);
1405 if (oldpage < 0)
1406 goto error;
1407
1408 if (wol->wolopts & WAKE_MAGIC) {
1409 /* Explicitly switch to page 0x00, just to be sure */
1410 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1411 if (err < 0)
1412 goto error;
1413
1414 /* If WOL event happened once, the LED[2] interrupt pin
1415 * will not be cleared unless we reading the interrupt status
1416 * register. If interrupts are in use, the normal interrupt
1417 * handling will clear the WOL event. Clear the WOL event
1418 * before enabling it if !phy_interrupt_is_valid()
1419 */
1420 if (!phy_interrupt_is_valid(phydev))
1421 phy_read(phydev, MII_M1011_IEVENT);
1422
1423 /* Enable the WOL interrupt */
1424 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1425 MII_88E1318S_PHY_CSIER_WOL_EIE);
1426 if (err < 0)
1427 goto error;
1428
1429 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1430 if (err < 0)
1431 goto error;
1432
1433 /* Setup LED[2] as interrupt pin (active low) */
1434 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1435 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1436 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1437 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1438 if (err < 0)
1439 goto error;
1440
1441 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1442 if (err < 0)
1443 goto error;
1444
1445 /* Store the device address for the magic packet */
1446 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1447 ((phydev->attached_dev->dev_addr[5] << 8) |
1448 phydev->attached_dev->dev_addr[4]));
1449 if (err < 0)
1450 goto error;
1451 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1452 ((phydev->attached_dev->dev_addr[3] << 8) |
1453 phydev->attached_dev->dev_addr[2]));
1454 if (err < 0)
1455 goto error;
1456 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1457 ((phydev->attached_dev->dev_addr[1] << 8) |
1458 phydev->attached_dev->dev_addr[0]));
1459 if (err < 0)
1460 goto error;
1461
1462 /* Clear WOL status and enable magic packet matching */
1463 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1464 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1465 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1466 if (err < 0)
1467 goto error;
1468 } else {
1469 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1470 if (err < 0)
1471 goto error;
1472
1473 /* Clear WOL status and disable magic packet matching */
1474 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1475 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1476 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1477 if (err < 0)
1478 goto error;
1479 }
1480
1481 error:
1482 return phy_restore_page(phydev, oldpage, err);
1483 }
1484
1485 static int marvell_get_sset_count(struct phy_device *phydev)
1486 {
1487 if (phydev->supported & SUPPORTED_FIBRE)
1488 return ARRAY_SIZE(marvell_hw_stats);
1489 else
1490 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1491 }
1492
1493 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1494 {
1495 int i;
1496
1497 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1498 strlcpy(data + i * ETH_GSTRING_LEN,
1499 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1500 }
1501 }
1502
1503 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1504 {
1505 struct marvell_hw_stat stat = marvell_hw_stats[i];
1506 struct marvell_priv *priv = phydev->priv;
1507 int val;
1508 u64 ret;
1509
1510 val = phy_read_paged(phydev, stat.page, stat.reg);
1511 if (val < 0) {
1512 ret = U64_MAX;
1513 } else {
1514 val = val & ((1 << stat.bits) - 1);
1515 priv->stats[i] += val;
1516 ret = priv->stats[i];
1517 }
1518
1519 return ret;
1520 }
1521
1522 static void marvell_get_stats(struct phy_device *phydev,
1523 struct ethtool_stats *stats, u64 *data)
1524 {
1525 int i;
1526
1527 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1528 data[i] = marvell_get_stat(phydev, i);
1529 }
1530
1531 #ifdef CONFIG_HWMON
1532 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1533 {
1534 int oldpage;
1535 int ret = 0;
1536 int val;
1537
1538 *temp = 0;
1539
1540 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1541 if (oldpage < 0)
1542 goto error;
1543
1544 /* Enable temperature sensor */
1545 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
1546 if (ret < 0)
1547 goto error;
1548
1549 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1550 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1551 if (ret < 0)
1552 goto error;
1553
1554 /* Wait for temperature to stabilize */
1555 usleep_range(10000, 12000);
1556
1557 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
1558 if (val < 0) {
1559 ret = val;
1560 goto error;
1561 }
1562
1563 /* Disable temperature sensor */
1564 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1565 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1566 if (ret < 0)
1567 goto error;
1568
1569 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1570
1571 error:
1572 return phy_restore_page(phydev, oldpage, ret);
1573 }
1574
1575 static int m88e1121_hwmon_read(struct device *dev,
1576 enum hwmon_sensor_types type,
1577 u32 attr, int channel, long *temp)
1578 {
1579 struct phy_device *phydev = dev_get_drvdata(dev);
1580 int err;
1581
1582 switch (attr) {
1583 case hwmon_temp_input:
1584 err = m88e1121_get_temp(phydev, temp);
1585 break;
1586 default:
1587 return -EOPNOTSUPP;
1588 }
1589
1590 return err;
1591 }
1592
1593 static umode_t m88e1121_hwmon_is_visible(const void *data,
1594 enum hwmon_sensor_types type,
1595 u32 attr, int channel)
1596 {
1597 if (type != hwmon_temp)
1598 return 0;
1599
1600 switch (attr) {
1601 case hwmon_temp_input:
1602 return 0444;
1603 default:
1604 return 0;
1605 }
1606 }
1607
1608 static u32 m88e1121_hwmon_chip_config[] = {
1609 HWMON_C_REGISTER_TZ,
1610 0
1611 };
1612
1613 static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1614 .type = hwmon_chip,
1615 .config = m88e1121_hwmon_chip_config,
1616 };
1617
1618 static u32 m88e1121_hwmon_temp_config[] = {
1619 HWMON_T_INPUT,
1620 0
1621 };
1622
1623 static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1624 .type = hwmon_temp,
1625 .config = m88e1121_hwmon_temp_config,
1626 };
1627
1628 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1629 &m88e1121_hwmon_chip,
1630 &m88e1121_hwmon_temp,
1631 NULL
1632 };
1633
1634 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1635 .is_visible = m88e1121_hwmon_is_visible,
1636 .read = m88e1121_hwmon_read,
1637 };
1638
1639 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1640 .ops = &m88e1121_hwmon_hwmon_ops,
1641 .info = m88e1121_hwmon_info,
1642 };
1643
1644 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1645 {
1646 int ret;
1647
1648 *temp = 0;
1649
1650 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1651 MII_88E1510_TEMP_SENSOR);
1652 if (ret < 0)
1653 return ret;
1654
1655 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1656
1657 return 0;
1658 }
1659
1660 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1661 {
1662 int ret;
1663
1664 *temp = 0;
1665
1666 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1667 MII_88E1121_MISC_TEST);
1668 if (ret < 0)
1669 return ret;
1670
1671 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1672 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1673 /* convert to mC */
1674 *temp *= 1000;
1675
1676 return 0;
1677 }
1678
1679 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1680 {
1681 temp = temp / 1000;
1682 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1683
1684 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1685 MII_88E1121_MISC_TEST,
1686 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1687 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
1688 }
1689
1690 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1691 {
1692 int ret;
1693
1694 *alarm = false;
1695
1696 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1697 MII_88E1121_MISC_TEST);
1698 if (ret < 0)
1699 return ret;
1700
1701 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1702
1703 return 0;
1704 }
1705
1706 static int m88e1510_hwmon_read(struct device *dev,
1707 enum hwmon_sensor_types type,
1708 u32 attr, int channel, long *temp)
1709 {
1710 struct phy_device *phydev = dev_get_drvdata(dev);
1711 int err;
1712
1713 switch (attr) {
1714 case hwmon_temp_input:
1715 err = m88e1510_get_temp(phydev, temp);
1716 break;
1717 case hwmon_temp_crit:
1718 err = m88e1510_get_temp_critical(phydev, temp);
1719 break;
1720 case hwmon_temp_max_alarm:
1721 err = m88e1510_get_temp_alarm(phydev, temp);
1722 break;
1723 default:
1724 return -EOPNOTSUPP;
1725 }
1726
1727 return err;
1728 }
1729
1730 static int m88e1510_hwmon_write(struct device *dev,
1731 enum hwmon_sensor_types type,
1732 u32 attr, int channel, long temp)
1733 {
1734 struct phy_device *phydev = dev_get_drvdata(dev);
1735 int err;
1736
1737 switch (attr) {
1738 case hwmon_temp_crit:
1739 err = m88e1510_set_temp_critical(phydev, temp);
1740 break;
1741 default:
1742 return -EOPNOTSUPP;
1743 }
1744 return err;
1745 }
1746
1747 static umode_t m88e1510_hwmon_is_visible(const void *data,
1748 enum hwmon_sensor_types type,
1749 u32 attr, int channel)
1750 {
1751 if (type != hwmon_temp)
1752 return 0;
1753
1754 switch (attr) {
1755 case hwmon_temp_input:
1756 case hwmon_temp_max_alarm:
1757 return 0444;
1758 case hwmon_temp_crit:
1759 return 0644;
1760 default:
1761 return 0;
1762 }
1763 }
1764
1765 static u32 m88e1510_hwmon_temp_config[] = {
1766 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1767 0
1768 };
1769
1770 static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1771 .type = hwmon_temp,
1772 .config = m88e1510_hwmon_temp_config,
1773 };
1774
1775 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1776 &m88e1121_hwmon_chip,
1777 &m88e1510_hwmon_temp,
1778 NULL
1779 };
1780
1781 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1782 .is_visible = m88e1510_hwmon_is_visible,
1783 .read = m88e1510_hwmon_read,
1784 .write = m88e1510_hwmon_write,
1785 };
1786
1787 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1788 .ops = &m88e1510_hwmon_hwmon_ops,
1789 .info = m88e1510_hwmon_info,
1790 };
1791
1792 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
1793 {
1794 int sum = 0;
1795 int oldpage;
1796 int ret = 0;
1797 int i;
1798
1799 *temp = 0;
1800
1801 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1802 if (oldpage < 0)
1803 goto error;
1804
1805 /* Enable temperature sensor */
1806 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1807 if (ret < 0)
1808 goto error;
1809
1810 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1811 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
1812 MII_88E6390_MISC_TEST_SAMPLE_1S;
1813
1814 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1815 if (ret < 0)
1816 goto error;
1817
1818 /* Wait for temperature to stabilize */
1819 usleep_range(10000, 12000);
1820
1821 /* Reading the temperature sense has an errata. You need to read
1822 * a number of times and take an average.
1823 */
1824 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
1825 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
1826 if (ret < 0)
1827 goto error;
1828 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
1829 }
1830
1831 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
1832 *temp = (sum - 75) * 1000;
1833
1834 /* Disable temperature sensor */
1835 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1836 if (ret < 0)
1837 goto error;
1838
1839 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1840 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
1841
1842 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1843
1844 error:
1845 phy_restore_page(phydev, oldpage, ret);
1846
1847 return ret;
1848 }
1849
1850 static int m88e6390_hwmon_read(struct device *dev,
1851 enum hwmon_sensor_types type,
1852 u32 attr, int channel, long *temp)
1853 {
1854 struct phy_device *phydev = dev_get_drvdata(dev);
1855 int err;
1856
1857 switch (attr) {
1858 case hwmon_temp_input:
1859 err = m88e6390_get_temp(phydev, temp);
1860 break;
1861 default:
1862 return -EOPNOTSUPP;
1863 }
1864
1865 return err;
1866 }
1867
1868 static umode_t m88e6390_hwmon_is_visible(const void *data,
1869 enum hwmon_sensor_types type,
1870 u32 attr, int channel)
1871 {
1872 if (type != hwmon_temp)
1873 return 0;
1874
1875 switch (attr) {
1876 case hwmon_temp_input:
1877 return 0444;
1878 default:
1879 return 0;
1880 }
1881 }
1882
1883 static u32 m88e6390_hwmon_temp_config[] = {
1884 HWMON_T_INPUT,
1885 0
1886 };
1887
1888 static const struct hwmon_channel_info m88e6390_hwmon_temp = {
1889 .type = hwmon_temp,
1890 .config = m88e6390_hwmon_temp_config,
1891 };
1892
1893 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
1894 &m88e1121_hwmon_chip,
1895 &m88e6390_hwmon_temp,
1896 NULL
1897 };
1898
1899 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
1900 .is_visible = m88e6390_hwmon_is_visible,
1901 .read = m88e6390_hwmon_read,
1902 };
1903
1904 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
1905 .ops = &m88e6390_hwmon_hwmon_ops,
1906 .info = m88e6390_hwmon_info,
1907 };
1908
1909 static int marvell_hwmon_name(struct phy_device *phydev)
1910 {
1911 struct marvell_priv *priv = phydev->priv;
1912 struct device *dev = &phydev->mdio.dev;
1913 const char *devname = dev_name(dev);
1914 size_t len = strlen(devname);
1915 int i, j;
1916
1917 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1918 if (!priv->hwmon_name)
1919 return -ENOMEM;
1920
1921 for (i = j = 0; i < len && devname[i]; i++) {
1922 if (isalnum(devname[i]))
1923 priv->hwmon_name[j++] = devname[i];
1924 }
1925
1926 return 0;
1927 }
1928
1929 static int marvell_hwmon_probe(struct phy_device *phydev,
1930 const struct hwmon_chip_info *chip)
1931 {
1932 struct marvell_priv *priv = phydev->priv;
1933 struct device *dev = &phydev->mdio.dev;
1934 int err;
1935
1936 err = marvell_hwmon_name(phydev);
1937 if (err)
1938 return err;
1939
1940 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1941 dev, priv->hwmon_name, phydev, chip, NULL);
1942
1943 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1944 }
1945
1946 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1947 {
1948 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1949 }
1950
1951 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1952 {
1953 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1954 }
1955
1956 static int m88e6390_hwmon_probe(struct phy_device *phydev)
1957 {
1958 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
1959 }
1960 #else
1961 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1962 {
1963 return 0;
1964 }
1965
1966 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1967 {
1968 return 0;
1969 }
1970
1971 static int m88e6390_hwmon_probe(struct phy_device *phydev)
1972 {
1973 return 0;
1974 }
1975 #endif
1976
1977 static int marvell_probe(struct phy_device *phydev)
1978 {
1979 struct marvell_priv *priv;
1980
1981 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
1982 if (!priv)
1983 return -ENOMEM;
1984
1985 phydev->priv = priv;
1986
1987 return 0;
1988 }
1989
1990 static int m88e1121_probe(struct phy_device *phydev)
1991 {
1992 int err;
1993
1994 err = marvell_probe(phydev);
1995 if (err)
1996 return err;
1997
1998 return m88e1121_hwmon_probe(phydev);
1999 }
2000
2001 static int m88e1510_probe(struct phy_device *phydev)
2002 {
2003 int err;
2004
2005 err = marvell_probe(phydev);
2006 if (err)
2007 return err;
2008
2009 return m88e1510_hwmon_probe(phydev);
2010 }
2011
2012 static int m88e6390_probe(struct phy_device *phydev)
2013 {
2014 int err;
2015
2016 err = marvell_probe(phydev);
2017 if (err)
2018 return err;
2019
2020 return m88e6390_hwmon_probe(phydev);
2021 }
2022
2023 static struct phy_driver marvell_drivers[] = {
2024 {
2025 .phy_id = MARVELL_PHY_ID_88E1101,
2026 .phy_id_mask = MARVELL_PHY_ID_MASK,
2027 .name = "Marvell 88E1101",
2028 .features = PHY_GBIT_FEATURES,
2029 .flags = PHY_HAS_INTERRUPT,
2030 .probe = marvell_probe,
2031 .config_init = &marvell_config_init,
2032 .config_aneg = &m88e1101_config_aneg,
2033 .ack_interrupt = &marvell_ack_interrupt,
2034 .config_intr = &marvell_config_intr,
2035 .resume = &genphy_resume,
2036 .suspend = &genphy_suspend,
2037 .read_page = marvell_read_page,
2038 .write_page = marvell_write_page,
2039 .get_sset_count = marvell_get_sset_count,
2040 .get_strings = marvell_get_strings,
2041 .get_stats = marvell_get_stats,
2042 },
2043 {
2044 .phy_id = MARVELL_PHY_ID_88E1112,
2045 .phy_id_mask = MARVELL_PHY_ID_MASK,
2046 .name = "Marvell 88E1112",
2047 .features = PHY_GBIT_FEATURES,
2048 .flags = PHY_HAS_INTERRUPT,
2049 .probe = marvell_probe,
2050 .config_init = &m88e1111_config_init,
2051 .config_aneg = &marvell_config_aneg,
2052 .ack_interrupt = &marvell_ack_interrupt,
2053 .config_intr = &marvell_config_intr,
2054 .resume = &genphy_resume,
2055 .suspend = &genphy_suspend,
2056 .read_page = marvell_read_page,
2057 .write_page = marvell_write_page,
2058 .get_sset_count = marvell_get_sset_count,
2059 .get_strings = marvell_get_strings,
2060 .get_stats = marvell_get_stats,
2061 },
2062 {
2063 .phy_id = MARVELL_PHY_ID_88E1111,
2064 .phy_id_mask = MARVELL_PHY_ID_MASK,
2065 .name = "Marvell 88E1111",
2066 .features = PHY_GBIT_FEATURES,
2067 .flags = PHY_HAS_INTERRUPT,
2068 .probe = marvell_probe,
2069 .config_init = &m88e1111_config_init,
2070 .config_aneg = &m88e1111_config_aneg,
2071 .read_status = &marvell_read_status,
2072 .ack_interrupt = &marvell_ack_interrupt,
2073 .config_intr = &marvell_config_intr,
2074 .resume = &genphy_resume,
2075 .suspend = &genphy_suspend,
2076 .read_page = marvell_read_page,
2077 .write_page = marvell_write_page,
2078 .get_sset_count = marvell_get_sset_count,
2079 .get_strings = marvell_get_strings,
2080 .get_stats = marvell_get_stats,
2081 },
2082 {
2083 .phy_id = MARVELL_PHY_ID_88E1118,
2084 .phy_id_mask = MARVELL_PHY_ID_MASK,
2085 .name = "Marvell 88E1118",
2086 .features = PHY_GBIT_FEATURES,
2087 .flags = PHY_HAS_INTERRUPT,
2088 .probe = marvell_probe,
2089 .config_init = &m88e1118_config_init,
2090 .config_aneg = &m88e1118_config_aneg,
2091 .ack_interrupt = &marvell_ack_interrupt,
2092 .config_intr = &marvell_config_intr,
2093 .resume = &genphy_resume,
2094 .suspend = &genphy_suspend,
2095 .read_page = marvell_read_page,
2096 .write_page = marvell_write_page,
2097 .get_sset_count = marvell_get_sset_count,
2098 .get_strings = marvell_get_strings,
2099 .get_stats = marvell_get_stats,
2100 },
2101 {
2102 .phy_id = MARVELL_PHY_ID_88E1121R,
2103 .phy_id_mask = MARVELL_PHY_ID_MASK,
2104 .name = "Marvell 88E1121R",
2105 .features = PHY_GBIT_FEATURES,
2106 .flags = PHY_HAS_INTERRUPT,
2107 .probe = &m88e1121_probe,
2108 .config_init = &marvell_config_init,
2109 .config_aneg = &m88e1121_config_aneg,
2110 .read_status = &marvell_read_status,
2111 .ack_interrupt = &marvell_ack_interrupt,
2112 .config_intr = &marvell_config_intr,
2113 .did_interrupt = &m88e1121_did_interrupt,
2114 .resume = &genphy_resume,
2115 .suspend = &genphy_suspend,
2116 .read_page = marvell_read_page,
2117 .write_page = marvell_write_page,
2118 .get_sset_count = marvell_get_sset_count,
2119 .get_strings = marvell_get_strings,
2120 .get_stats = marvell_get_stats,
2121 },
2122 {
2123 .phy_id = MARVELL_PHY_ID_88E1318S,
2124 .phy_id_mask = MARVELL_PHY_ID_MASK,
2125 .name = "Marvell 88E1318S",
2126 .features = PHY_GBIT_FEATURES,
2127 .flags = PHY_HAS_INTERRUPT,
2128 .probe = marvell_probe,
2129 .config_init = &m88e1318_config_init,
2130 .config_aneg = &m88e1318_config_aneg,
2131 .read_status = &marvell_read_status,
2132 .ack_interrupt = &marvell_ack_interrupt,
2133 .config_intr = &marvell_config_intr,
2134 .did_interrupt = &m88e1121_did_interrupt,
2135 .get_wol = &m88e1318_get_wol,
2136 .set_wol = &m88e1318_set_wol,
2137 .resume = &genphy_resume,
2138 .suspend = &genphy_suspend,
2139 .read_page = marvell_read_page,
2140 .write_page = marvell_write_page,
2141 .get_sset_count = marvell_get_sset_count,
2142 .get_strings = marvell_get_strings,
2143 .get_stats = marvell_get_stats,
2144 },
2145 {
2146 .phy_id = MARVELL_PHY_ID_88E1145,
2147 .phy_id_mask = MARVELL_PHY_ID_MASK,
2148 .name = "Marvell 88E1145",
2149 .features = PHY_GBIT_FEATURES,
2150 .flags = PHY_HAS_INTERRUPT,
2151 .probe = marvell_probe,
2152 .config_init = &m88e1145_config_init,
2153 .config_aneg = &m88e1101_config_aneg,
2154 .read_status = &genphy_read_status,
2155 .ack_interrupt = &marvell_ack_interrupt,
2156 .config_intr = &marvell_config_intr,
2157 .resume = &genphy_resume,
2158 .suspend = &genphy_suspend,
2159 .read_page = marvell_read_page,
2160 .write_page = marvell_write_page,
2161 .get_sset_count = marvell_get_sset_count,
2162 .get_strings = marvell_get_strings,
2163 .get_stats = marvell_get_stats,
2164 },
2165 {
2166 .phy_id = MARVELL_PHY_ID_88E1149R,
2167 .phy_id_mask = MARVELL_PHY_ID_MASK,
2168 .name = "Marvell 88E1149R",
2169 .features = PHY_GBIT_FEATURES,
2170 .flags = PHY_HAS_INTERRUPT,
2171 .probe = marvell_probe,
2172 .config_init = &m88e1149_config_init,
2173 .config_aneg = &m88e1118_config_aneg,
2174 .ack_interrupt = &marvell_ack_interrupt,
2175 .config_intr = &marvell_config_intr,
2176 .resume = &genphy_resume,
2177 .suspend = &genphy_suspend,
2178 .read_page = marvell_read_page,
2179 .write_page = marvell_write_page,
2180 .get_sset_count = marvell_get_sset_count,
2181 .get_strings = marvell_get_strings,
2182 .get_stats = marvell_get_stats,
2183 },
2184 {
2185 .phy_id = MARVELL_PHY_ID_88E1240,
2186 .phy_id_mask = MARVELL_PHY_ID_MASK,
2187 .name = "Marvell 88E1240",
2188 .features = PHY_GBIT_FEATURES,
2189 .flags = PHY_HAS_INTERRUPT,
2190 .probe = marvell_probe,
2191 .config_init = &m88e1111_config_init,
2192 .config_aneg = &marvell_config_aneg,
2193 .ack_interrupt = &marvell_ack_interrupt,
2194 .config_intr = &marvell_config_intr,
2195 .resume = &genphy_resume,
2196 .suspend = &genphy_suspend,
2197 .read_page = marvell_read_page,
2198 .write_page = marvell_write_page,
2199 .get_sset_count = marvell_get_sset_count,
2200 .get_strings = marvell_get_strings,
2201 .get_stats = marvell_get_stats,
2202 },
2203 {
2204 .phy_id = MARVELL_PHY_ID_88E1116R,
2205 .phy_id_mask = MARVELL_PHY_ID_MASK,
2206 .name = "Marvell 88E1116R",
2207 .features = PHY_GBIT_FEATURES,
2208 .flags = PHY_HAS_INTERRUPT,
2209 .probe = marvell_probe,
2210 .config_init = &m88e1116r_config_init,
2211 .ack_interrupt = &marvell_ack_interrupt,
2212 .config_intr = &marvell_config_intr,
2213 .resume = &genphy_resume,
2214 .suspend = &genphy_suspend,
2215 .read_page = marvell_read_page,
2216 .write_page = marvell_write_page,
2217 .get_sset_count = marvell_get_sset_count,
2218 .get_strings = marvell_get_strings,
2219 .get_stats = marvell_get_stats,
2220 },
2221 {
2222 .phy_id = MARVELL_PHY_ID_88E1510,
2223 .phy_id_mask = MARVELL_PHY_ID_MASK,
2224 .name = "Marvell 88E1510",
2225 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
2226 .flags = PHY_HAS_INTERRUPT,
2227 .probe = &m88e1510_probe,
2228 .config_init = &m88e1510_config_init,
2229 .config_aneg = &m88e1510_config_aneg,
2230 .read_status = &marvell_read_status,
2231 .ack_interrupt = &marvell_ack_interrupt,
2232 .config_intr = &marvell_config_intr,
2233 .did_interrupt = &m88e1121_did_interrupt,
2234 .get_wol = &m88e1318_get_wol,
2235 .set_wol = &m88e1318_set_wol,
2236 .resume = &marvell_resume,
2237 .suspend = &marvell_suspend,
2238 .read_page = marvell_read_page,
2239 .write_page = marvell_write_page,
2240 .get_sset_count = marvell_get_sset_count,
2241 .get_strings = marvell_get_strings,
2242 .get_stats = marvell_get_stats,
2243 .set_loopback = genphy_loopback,
2244 },
2245 {
2246 .phy_id = MARVELL_PHY_ID_88E1540,
2247 .phy_id_mask = MARVELL_PHY_ID_MASK,
2248 .name = "Marvell 88E1540",
2249 .features = PHY_GBIT_FEATURES,
2250 .flags = PHY_HAS_INTERRUPT,
2251 .probe = m88e1510_probe,
2252 .config_init = &marvell_config_init,
2253 .config_aneg = &m88e1510_config_aneg,
2254 .read_status = &marvell_read_status,
2255 .ack_interrupt = &marvell_ack_interrupt,
2256 .config_intr = &marvell_config_intr,
2257 .did_interrupt = &m88e1121_did_interrupt,
2258 .resume = &genphy_resume,
2259 .suspend = &genphy_suspend,
2260 .read_page = marvell_read_page,
2261 .write_page = marvell_write_page,
2262 .get_sset_count = marvell_get_sset_count,
2263 .get_strings = marvell_get_strings,
2264 .get_stats = marvell_get_stats,
2265 },
2266 {
2267 .phy_id = MARVELL_PHY_ID_88E1545,
2268 .phy_id_mask = MARVELL_PHY_ID_MASK,
2269 .name = "Marvell 88E1545",
2270 .probe = m88e1510_probe,
2271 .features = PHY_GBIT_FEATURES,
2272 .flags = PHY_HAS_INTERRUPT,
2273 .config_init = &marvell_config_init,
2274 .config_aneg = &m88e1510_config_aneg,
2275 .read_status = &marvell_read_status,
2276 .ack_interrupt = &marvell_ack_interrupt,
2277 .config_intr = &marvell_config_intr,
2278 .did_interrupt = &m88e1121_did_interrupt,
2279 .resume = &genphy_resume,
2280 .suspend = &genphy_suspend,
2281 .read_page = marvell_read_page,
2282 .write_page = marvell_write_page,
2283 .get_sset_count = marvell_get_sset_count,
2284 .get_strings = marvell_get_strings,
2285 .get_stats = marvell_get_stats,
2286 },
2287 {
2288 .phy_id = MARVELL_PHY_ID_88E3016,
2289 .phy_id_mask = MARVELL_PHY_ID_MASK,
2290 .name = "Marvell 88E3016",
2291 .features = PHY_BASIC_FEATURES,
2292 .flags = PHY_HAS_INTERRUPT,
2293 .probe = marvell_probe,
2294 .config_init = &m88e3016_config_init,
2295 .aneg_done = &marvell_aneg_done,
2296 .read_status = &marvell_read_status,
2297 .ack_interrupt = &marvell_ack_interrupt,
2298 .config_intr = &marvell_config_intr,
2299 .did_interrupt = &m88e1121_did_interrupt,
2300 .resume = &genphy_resume,
2301 .suspend = &genphy_suspend,
2302 .read_page = marvell_read_page,
2303 .write_page = marvell_write_page,
2304 .get_sset_count = marvell_get_sset_count,
2305 .get_strings = marvell_get_strings,
2306 .get_stats = marvell_get_stats,
2307 },
2308 {
2309 .phy_id = MARVELL_PHY_ID_88E6390,
2310 .phy_id_mask = MARVELL_PHY_ID_MASK,
2311 .name = "Marvell 88E6390",
2312 .features = PHY_GBIT_FEATURES,
2313 .flags = PHY_HAS_INTERRUPT,
2314 .probe = m88e6390_probe,
2315 .config_init = &marvell_config_init,
2316 .config_aneg = &m88e1510_config_aneg,
2317 .read_status = &marvell_read_status,
2318 .ack_interrupt = &marvell_ack_interrupt,
2319 .config_intr = &marvell_config_intr,
2320 .did_interrupt = &m88e1121_did_interrupt,
2321 .resume = &genphy_resume,
2322 .suspend = &genphy_suspend,
2323 .read_page = marvell_read_page,
2324 .write_page = marvell_write_page,
2325 .get_sset_count = marvell_get_sset_count,
2326 .get_strings = marvell_get_strings,
2327 .get_stats = marvell_get_stats,
2328 },
2329 };
2330
2331 module_phy_driver(marvell_drivers);
2332
2333 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2334 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2335 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2336 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2337 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2338 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2339 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2340 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2341 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2342 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2343 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2344 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2345 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2346 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2347 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2348 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2349 { }
2350 };
2351
2352 MODULE_DEVICE_TABLE(mdio, marvell_tbl);
Linux with added FPC-III support