staging: rtl8188eu: rename HalSetBrateCfg() - style
[linux/fpc-iii.git] / drivers / pci / pci-mid.c
blob314e135014dcd14387dc0ca7b8bdfb7198910baa
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Intel MID platform PM support
5 * Copyright (C) 2016, Intel Corporation
7 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
8 */
10 #include <linux/init.h>
11 #include <linux/pci.h>
13 #include <asm/cpu_device_id.h>
14 #include <asm/intel-family.h>
15 #include <asm/intel-mid.h>
17 #include "pci.h"
19 static bool mid_pci_power_manageable(struct pci_dev *dev)
21 return true;
24 static int mid_pci_set_power_state(struct pci_dev *pdev, pci_power_t state)
26 return intel_mid_pci_set_power_state(pdev, state);
29 static pci_power_t mid_pci_get_power_state(struct pci_dev *pdev)
31 return intel_mid_pci_get_power_state(pdev);
34 static pci_power_t mid_pci_choose_state(struct pci_dev *pdev)
36 return PCI_D3hot;
39 static int mid_pci_wakeup(struct pci_dev *dev, bool enable)
41 return 0;
44 static bool mid_pci_need_resume(struct pci_dev *dev)
46 return false;
49 static const struct pci_platform_pm_ops mid_pci_platform_pm = {
50 .is_manageable = mid_pci_power_manageable,
51 .set_state = mid_pci_set_power_state,
52 .get_state = mid_pci_get_power_state,
53 .choose_state = mid_pci_choose_state,
54 .set_wakeup = mid_pci_wakeup,
55 .need_resume = mid_pci_need_resume,
58 #define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
61 * This table should be in sync with the one in
62 * arch/x86/platform/intel-mid/pwr.c.
64 static const struct x86_cpu_id lpss_cpu_ids[] = {
65 ICPU(INTEL_FAM6_ATOM_PENWELL),
66 ICPU(INTEL_FAM6_ATOM_MERRIFIELD),
70 static int __init mid_pci_init(void)
72 const struct x86_cpu_id *id;
74 id = x86_match_cpu(lpss_cpu_ids);
75 if (id)
76 pci_set_platform_pm(&mid_pci_platform_pm);
77 return 0;
79 arch_initcall(mid_pci_init);