dm writecache: fix incorrect flush sequence when doing SSD mode commit
[linux/fpc-iii.git] / arch / arm / mach-asm9260 / Kconfig
blobe42dbaa53bc61b2030109663104ccfb0f7b2c053
1 # SPDX-License-Identifier: GPL-2.0-only
2 config MACH_ASM9260
3         bool "Alphascale ASM9260"
4         depends on ARCH_MULTI_V5
5         select CPU_ARM926T
6         select ASM9260_TIMER
7         select GENERIC_CLOCKEVENTS
8         help
9           Support for Alphascale ASM9260 based platform.