arch/arm/mach-ixp4xx/ixdp425-setup.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * arch/arm/mach-ixp4xx/ixdp425-setup.c
   4  *
   5  * IXDP425/IXCDP1100 board-setup
   6  *
   7  * Copyright (C) 2003-2005 MontaVista Software, Inc.
   8  *
   9  * Author: Deepak Saxena <dsaxena@plexity.net>
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/init.h>
  14 #include <linux/device.h>
  15 #include <linux/serial.h>
  16 #include <linux/tty.h>
  17 #include <linux/serial_8250.h>
  18 #include <linux/gpio/machine.h>
  19 #include <linux/io.h>
  20 #include <linux/mtd/mtd.h>
  21 #include <linux/mtd/rawnand.h>
  22 #include <linux/mtd/partitions.h>
  23 #include <linux/mtd/platnand.h>
  24 #include <linux/delay.h>
  25 #include <linux/gpio.h>
  26 #include <asm/types.h>
  27 #include <asm/setup.h>
  28 #include <asm/memory.h>
  29 #include <mach/hardware.h>
  30 #include <asm/mach-types.h>
  31 #include <asm/irq.h>
  32 #include <asm/mach/arch.h>
  33 #include <asm/mach/flash.h>
  34
  35 #include "irqs.h"
  36
  37 #define IXDP425_SDA_PIN         7
  38 #define IXDP425_SCL_PIN         6
  39
  40 /* NAND Flash pins */
  41 #define IXDP425_NAND_NCE_PIN    12
  42
  43 #define IXDP425_NAND_CMD_BYTE   0x01
  44 #define IXDP425_NAND_ADDR_BYTE  0x02
  45
  46 static struct flash_platform_data ixdp425_flash_data = {
  47         .map_name       = "cfi_probe",
  48         .width          = 2,
  49 };
  50
  51 static struct resource ixdp425_flash_resource = {
  52         .flags          = IORESOURCE_MEM,
  53 };
  54
  55 static struct platform_device ixdp425_flash = {
  56         .name           = "IXP4XX-Flash",
  57         .id             = 0,
  58         .dev            = {
  59                 .platform_data = &ixdp425_flash_data,
  60         },
  61         .num_resources  = 1,
  62         .resource       = &ixdp425_flash_resource,
  63 };
  64
  65 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
  66     defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  67
  68 static struct mtd_partition ixdp425_partitions[] = {
  69         {
  70                 .name   = "ixp400 NAND FS 0",
  71                 .offset = 0,
  72                 .size   = SZ_8M
  73         }, {
  74                 .name   = "ixp400 NAND FS 1",
  75                 .offset = MTDPART_OFS_APPEND,
  76                 .size   = MTDPART_SIZ_FULL
  77         },
  78 };
  79
  80 static void
  81 ixdp425_flash_nand_cmd_ctrl(struct nand_chip *this, int cmd, unsigned int ctrl)
  82 {
  83         int offset = (int)nand_get_controller_data(this);
  84
  85         if (ctrl & NAND_CTRL_CHANGE) {
  86                 if (ctrl & NAND_NCE) {
  87                         gpio_set_value(IXDP425_NAND_NCE_PIN, 0);
  88                         udelay(5);
  89                 } else
  90                         gpio_set_value(IXDP425_NAND_NCE_PIN, 1);
  91
  92                 offset = (ctrl & NAND_CLE) ? IXDP425_NAND_CMD_BYTE : 0;
  93                 offset |= (ctrl & NAND_ALE) ? IXDP425_NAND_ADDR_BYTE : 0;
  94                 nand_set_controller_data(this, (void *)offset);
  95         }
  96
  97         if (cmd != NAND_CMD_NONE)
  98                 writeb(cmd, this->legacy.IO_ADDR_W + offset);
  99 }
 100
 101 static struct platform_nand_data ixdp425_flash_nand_data = {
 102         .chip = {
 103                 .nr_chips               = 1,
 104                 .chip_delay             = 30,
 105                 .partitions             = ixdp425_partitions,
 106                 .nr_partitions          = ARRAY_SIZE(ixdp425_partitions),
 107         },
 108         .ctrl = {
 109                 .cmd_ctrl               = ixdp425_flash_nand_cmd_ctrl
 110         }
 111 };
 112
 113 static struct resource ixdp425_flash_nand_resource = {
 114         .flags          = IORESOURCE_MEM,
 115 };
 116
 117 static struct platform_device ixdp425_flash_nand = {
 118         .name           = "gen_nand",
 119         .id             = -1,
 120         .dev            = {
 121                 .platform_data = &ixdp425_flash_nand_data,
 122         },
 123         .num_resources  = 1,
 124         .resource       = &ixdp425_flash_nand_resource,
 125 };
 126 #endif  /* CONFIG_MTD_NAND_PLATFORM */
 127
 128 static struct gpiod_lookup_table ixdp425_i2c_gpiod_table = {
 129         .dev_id         = "i2c-gpio.0",
 130         .table          = {
 131                 GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", IXDP425_SDA_PIN,
 132                                 NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
 133                 GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", IXDP425_SCL_PIN,
 134                                 NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
 135         },
 136 };
 137
 138 static struct platform_device ixdp425_i2c_gpio = {
 139         .name           = "i2c-gpio",
 140         .id             = 0,
 141         .dev     = {
 142                 .platform_data  = NULL,
 143         },
 144 };
 145
 146 static struct resource ixdp425_uart_resources[] = {
 147         {
 148                 .start          = IXP4XX_UART1_BASE_PHYS,
 149                 .end            = IXP4XX_UART1_BASE_PHYS + 0x0fff,
 150                 .flags          = IORESOURCE_MEM
 151         },
 152         {
 153                 .start          = IXP4XX_UART2_BASE_PHYS,
 154                 .end            = IXP4XX_UART2_BASE_PHYS + 0x0fff,
 155                 .flags          = IORESOURCE_MEM
 156         }
 157 };
 158
 159 static struct plat_serial8250_port ixdp425_uart_data[] = {
 160         {
 161                 .mapbase        = IXP4XX_UART1_BASE_PHYS,
 162                 .membase        = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
 163                 .irq            = IRQ_IXP4XX_UART1,
 164                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 165                 .iotype         = UPIO_MEM,
 166                 .regshift       = 2,
 167                 .uartclk        = IXP4XX_UART_XTAL,
 168         },
 169         {
 170                 .mapbase        = IXP4XX_UART2_BASE_PHYS,
 171                 .membase        = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
 172                 .irq            = IRQ_IXP4XX_UART2,
 173                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 174                 .iotype         = UPIO_MEM,
 175                 .regshift       = 2,
 176                 .uartclk        = IXP4XX_UART_XTAL,
 177         },
 178         { },
 179 };
 180
 181 static struct platform_device ixdp425_uart = {
 182         .name                   = "serial8250",
 183         .id                     = PLAT8250_DEV_PLATFORM,
 184         .dev.platform_data      = ixdp425_uart_data,
 185         .num_resources          = 2,
 186         .resource               = ixdp425_uart_resources
 187 };
 188
 189 /* Built-in 10/100 Ethernet MAC interfaces */
 190 static struct eth_plat_info ixdp425_plat_eth[] = {
 191         {
 192                 .phy            = 0,
 193                 .rxq            = 3,
 194                 .txreadyq       = 20,
 195         }, {
 196                 .phy            = 1,
 197                 .rxq            = 4,
 198                 .txreadyq       = 21,
 199         }
 200 };
 201
 202 static struct platform_device ixdp425_eth[] = {
 203         {
 204                 .name                   = "ixp4xx_eth",
 205                 .id                     = IXP4XX_ETH_NPEB,
 206                 .dev.platform_data      = ixdp425_plat_eth,
 207         }, {
 208                 .name                   = "ixp4xx_eth",
 209                 .id                     = IXP4XX_ETH_NPEC,
 210                 .dev.platform_data      = ixdp425_plat_eth + 1,
 211         }
 212 };
 213
 214 static struct platform_device *ixdp425_devices[] __initdata = {
 215         &ixdp425_i2c_gpio,
 216         &ixdp425_flash,
 217 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
 218     defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
 219         &ixdp425_flash_nand,
 220 #endif
 221         &ixdp425_uart,
 222         &ixdp425_eth[0],
 223         &ixdp425_eth[1],
 224 };
 225
 226 static void __init ixdp425_init(void)
 227 {
 228         ixp4xx_sys_init();
 229
 230         ixdp425_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
 231         ixdp425_flash_resource.end =
 232                 IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
 233
 234 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
 235     defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
 236         ixdp425_flash_nand_resource.start = IXP4XX_EXP_BUS_BASE(3),
 237         ixdp425_flash_nand_resource.end   = IXP4XX_EXP_BUS_BASE(3) + 0x10 - 1;
 238
 239         gpio_request(IXDP425_NAND_NCE_PIN, "NAND NCE pin");
 240         gpio_direction_output(IXDP425_NAND_NCE_PIN, 0);
 241
 242         /* Configure expansion bus for NAND Flash */
 243         *IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN |
 244                           IXP4XX_EXP_BUS_STROBE_T(1) |  /* extend by 1 clock */
 245                           IXP4XX_EXP_BUS_CYCLES(0) |    /* Intel cycles */
 246                           IXP4XX_EXP_BUS_SIZE(0) |      /* 512bytes addr space*/
 247                           IXP4XX_EXP_BUS_WR_EN |
 248                           IXP4XX_EXP_BUS_BYTE_EN;       /* 8 bit data bus */
 249 #endif
 250
 251         if (cpu_is_ixp43x()) {
 252                 ixdp425_uart.num_resources = 1;
 253                 ixdp425_uart_data[1].flags = 0;
 254         }
 255
 256         gpiod_add_lookup_table(&ixdp425_i2c_gpiod_table);
 257         platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices));
 258 }
 259
 260 #ifdef CONFIG_ARCH_IXDP425
 261 MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
 262         /* Maintainer: MontaVista Software, Inc. */
 263         .map_io         = ixp4xx_map_io,
 264         .init_early     = ixp4xx_init_early,
 265         .init_irq       = ixp4xx_init_irq,
 266         .init_time      = ixp4xx_timer_init,
 267         .atag_offset    = 0x100,
 268         .init_machine   = ixdp425_init,
 269 #if defined(CONFIG_PCI)
 270         .dma_zone_size  = SZ_64M,
 271 #endif
 272         .restart        = ixp4xx_restart,
 273 MACHINE_END
 274 #endif
 275
 276 #ifdef CONFIG_MACH_IXDP465
 277 MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
 278         /* Maintainer: MontaVista Software, Inc. */
 279         .map_io         = ixp4xx_map_io,
 280         .init_early     = ixp4xx_init_early,
 281         .init_irq       = ixp4xx_init_irq,
 282         .init_time      = ixp4xx_timer_init,
 283         .atag_offset    = 0x100,
 284         .init_machine   = ixdp425_init,
 285 #if defined(CONFIG_PCI)
 286         .dma_zone_size  = SZ_64M,
 287 #endif
 288 MACHINE_END
 289 #endif
 290
 291 #ifdef CONFIG_ARCH_PRPMC1100
 292 MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
 293         /* Maintainer: MontaVista Software, Inc. */
 294         .map_io         = ixp4xx_map_io,
 295         .init_early     = ixp4xx_init_early,
 296         .init_irq       = ixp4xx_init_irq,
 297         .init_time      = ixp4xx_timer_init,
 298         .atag_offset    = 0x100,
 299         .init_machine   = ixdp425_init,
 300 #if defined(CONFIG_PCI)
 301         .dma_zone_size  = SZ_64M,
 302 #endif
 303 MACHINE_END
 304 #endif
 305
 306 #ifdef CONFIG_MACH_KIXRP435
 307 MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform")
 308         /* Maintainer: MontaVista Software, Inc. */
 309         .map_io         = ixp4xx_map_io,
 310         .init_early     = ixp4xx_init_early,
 311         .init_irq       = ixp4xx_init_irq,
 312         .init_time      = ixp4xx_timer_init,
 313         .atag_offset    = 0x100,
 314         .init_machine   = ixdp425_init,
 315 #if defined(CONFIG_PCI)
 316         .dma_zone_size  = SZ_64M,
 317 #endif
 318 MACHINE_END
 319 #endif