dm writecache: fix incorrect flush sequence when doing SSD mode commit
[linux/fpc-iii.git] / arch / powerpc / boot / ep405.c
blobf9ad1e6a844e25ce94f8da0c424b731de947b191
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Embedded Planet EP405 with PlanetCore firmware
5 * (c) Benjamin Herrenschmidt <benh@kernel.crashing.org>, IBM Corp,\
7 * Based on ep88xc.c by
9 * Scott Wood <scottwood@freescale.com>
11 * Copyright (c) 2007 Freescale Semiconductor, Inc.
14 #include "ops.h"
15 #include "stdio.h"
16 #include "planetcore.h"
17 #include "dcr.h"
18 #include "4xx.h"
19 #include "io.h"
21 static char *table;
22 static u64 mem_size;
24 static void platform_fixups(void)
26 u64 val;
27 void *nvrtc;
29 dt_fixup_memory(0, mem_size);
30 planetcore_set_mac_addrs(table);
32 if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, &val)) {
33 printf("No PlanetCore crystal frequency key.\r\n");
34 return;
36 ibm405gp_fixup_clocks(val, 0xa8c000);
37 ibm4xx_quiesce_eth((u32 *)0xef600800, NULL);
38 ibm4xx_fixup_ebc_ranges("/plb/ebc");
40 if (!planetcore_get_decimal(table, PLANETCORE_KEY_KB_NVRAM, &val)) {
41 printf("No PlanetCore NVRAM size key.\r\n");
42 return;
44 nvrtc = finddevice("/plb/ebc/nvrtc@4,200000");
45 if (nvrtc != NULL) {
46 u32 reg[3] = { 4, 0x200000, 0};
47 getprop(nvrtc, "reg", reg, 3);
48 reg[2] = (val << 10) & 0xffffffff;
49 setprop(nvrtc, "reg", reg, 3);
53 void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
54 unsigned long r6, unsigned long r7)
56 table = (char *)r3;
57 planetcore_prepare_table(table);
59 if (!planetcore_get_decimal(table, PLANETCORE_KEY_MB_RAM, &mem_size))
60 return;
62 mem_size *= 1024 * 1024;
63 simple_alloc_init(_end, mem_size - (unsigned long)_end, 32, 64);
65 fdt_init(_dtb_start);
67 planetcore_set_stdout_path(table);
69 serial_console_init();
70 platform_ops.fixups = platform_fixups;