drivers/soc/imx/soc-imx8.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright 2019 NXP.
   4  */
   5
   6 #include <linux/init.h>
   7 #include <linux/io.h>
   8 #include <linux/of_address.h>
   9 #include <linux/slab.h>
  10 #include <linux/sys_soc.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/arm-smccc.h>
  13 #include <linux/of.h>
  14
  15 #define REV_B1                          0x21
  16
  17 #define IMX8MQ_SW_INFO_B1               0x40
  18 #define IMX8MQ_SW_MAGIC_B1              0xff0055aa
  19
  20 #define IMX_SIP_GET_SOC_INFO            0xc2000006
  21
  22 #define OCOTP_UID_LOW                   0x410
  23 #define OCOTP_UID_HIGH                  0x420
  24
  25 /* Same as ANADIG_DIGPROG_IMX7D */
  26 #define ANADIG_DIGPROG_IMX8MM   0x800
  27
  28 struct imx8_soc_data {
  29         char *name;
  30         u32 (*soc_revision)(void);
  31 };
  32
  33 static u64 soc_uid;
  34
  35 #ifdef CONFIG_HAVE_ARM_SMCCC
  36 static u32 imx8mq_soc_revision_from_atf(void)
  37 {
  38         struct arm_smccc_res res;
  39
  40         arm_smccc_smc(IMX_SIP_GET_SOC_INFO, 0, 0, 0, 0, 0, 0, 0, &res);
  41
  42         if (res.a0 == SMCCC_RET_NOT_SUPPORTED)
  43                 return 0;
  44         else
  45                 return res.a0 & 0xff;
  46 }
  47 #else
  48 static inline u32 imx8mq_soc_revision_from_atf(void) { return 0; };
  49 #endif
  50
  51 static u32 __init imx8mq_soc_revision(void)
  52 {
  53         struct device_node *np;
  54         void __iomem *ocotp_base;
  55         u32 magic;
  56         u32 rev = 0;
  57
  58         np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-ocotp");
  59         if (!np)
  60                 goto out;
  61
  62         ocotp_base = of_iomap(np, 0);
  63         WARN_ON(!ocotp_base);
  64
  65         /*
  66          * SOC revision on older imx8mq is not available in fuses so query
  67          * the value from ATF instead.
  68          */
  69         rev = imx8mq_soc_revision_from_atf();
  70         if (!rev) {
  71                 magic = readl_relaxed(ocotp_base + IMX8MQ_SW_INFO_B1);
  72                 if (magic == IMX8MQ_SW_MAGIC_B1)
  73                         rev = REV_B1;
  74         }
  75
  76         soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH);
  77         soc_uid <<= 32;
  78         soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW);
  79
  80         iounmap(ocotp_base);
  81
  82 out:
  83         of_node_put(np);
  84         return rev;
  85 }
  86
  87 static void __init imx8mm_soc_uid(void)
  88 {
  89         void __iomem *ocotp_base;
  90         struct device_node *np;
  91
  92         np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-ocotp");
  93         if (!np)
  94                 return;
  95
  96         ocotp_base = of_iomap(np, 0);
  97         WARN_ON(!ocotp_base);
  98
  99         soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH);
 100         soc_uid <<= 32;
 101         soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW);
 102
 103         iounmap(ocotp_base);
 104         of_node_put(np);
 105 }
 106
 107 static u32 __init imx8mm_soc_revision(void)
 108 {
 109         struct device_node *np;
 110         void __iomem *anatop_base;
 111         u32 rev;
 112
 113         np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-anatop");
 114         if (!np)
 115                 return 0;
 116
 117         anatop_base = of_iomap(np, 0);
 118         WARN_ON(!anatop_base);
 119
 120         rev = readl_relaxed(anatop_base + ANADIG_DIGPROG_IMX8MM);
 121
 122         iounmap(anatop_base);
 123         of_node_put(np);
 124
 125         imx8mm_soc_uid();
 126
 127         return rev;
 128 }
 129
 130 static const struct imx8_soc_data imx8mq_soc_data = {
 131         .name = "i.MX8MQ",
 132         .soc_revision = imx8mq_soc_revision,
 133 };
 134
 135 static const struct imx8_soc_data imx8mm_soc_data = {
 136         .name = "i.MX8MM",
 137         .soc_revision = imx8mm_soc_revision,
 138 };
 139
 140 static const struct imx8_soc_data imx8mn_soc_data = {
 141         .name = "i.MX8MN",
 142         .soc_revision = imx8mm_soc_revision,
 143 };
 144
 145 static const struct of_device_id imx8_soc_match[] = {
 146         { .compatible = "fsl,imx8mq", .data = &imx8mq_soc_data, },
 147         { .compatible = "fsl,imx8mm", .data = &imx8mm_soc_data, },
 148         { .compatible = "fsl,imx8mn", .data = &imx8mn_soc_data, },
 149         { }
 150 };
 151
 152 #define imx8_revision(soc_rev) \
 153         soc_rev ? \
 154         kasprintf(GFP_KERNEL, "%d.%d", (soc_rev >> 4) & 0xf,  soc_rev & 0xf) : \
 155         "unknown"
 156
 157 static int __init imx8_soc_init(void)
 158 {
 159         struct soc_device_attribute *soc_dev_attr;
 160         struct soc_device *soc_dev;
 161         const struct of_device_id *id;
 162         u32 soc_rev = 0;
 163         const struct imx8_soc_data *data;
 164         int ret;
 165
 166         soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
 167         if (!soc_dev_attr)
 168                 return -ENOMEM;
 169
 170         soc_dev_attr->family = "Freescale i.MX";
 171
 172         ret = of_property_read_string(of_root, "model", &soc_dev_attr->machine);
 173         if (ret)
 174                 goto free_soc;
 175
 176         id = of_match_node(imx8_soc_match, of_root);
 177         if (!id) {
 178                 ret = -ENODEV;
 179                 goto free_soc;
 180         }
 181
 182         data = id->data;
 183         if (data) {
 184                 soc_dev_attr->soc_id = data->name;
 185                 if (data->soc_revision)
 186                         soc_rev = data->soc_revision();
 187         }
 188
 189         soc_dev_attr->revision = imx8_revision(soc_rev);
 190         if (!soc_dev_attr->revision) {
 191                 ret = -ENOMEM;
 192                 goto free_soc;
 193         }
 194
 195         soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", soc_uid);
 196         if (!soc_dev_attr->serial_number) {
 197                 ret = -ENOMEM;
 198                 goto free_rev;
 199         }
 200
 201         soc_dev = soc_device_register(soc_dev_attr);
 202         if (IS_ERR(soc_dev)) {
 203                 ret = PTR_ERR(soc_dev);
 204                 goto free_serial_number;
 205         }
 206
 207         if (IS_ENABLED(CONFIG_ARM_IMX_CPUFREQ_DT))
 208                 platform_device_register_simple("imx-cpufreq-dt", -1, NULL, 0);
 209
 210         return 0;
 211
 212 free_serial_number:
 213         kfree(soc_dev_attr->serial_number);
 214 free_rev:
 215         if (strcmp(soc_dev_attr->revision, "unknown"))
 216                 kfree(soc_dev_attr->revision);
 217 free_soc:
 218         kfree(soc_dev_attr);
 219         return ret;
 220 }
 221 device_initcall(imx8_soc_init);