ARM: 7409/1: Do not call flush_cache_user_range with mmap_sem held
[linux/fpc-iii.git] / arch / arm / mach-omap2 / pm.h
blob45bcfce7735248732a609f647870cee35d19f8a9
1 /*
2 * OMAP2/3 Power Management Routines
4 * Copyright (C) 2008 Nokia Corporation
5 * Jouni Hogander
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #ifndef __ARCH_ARM_MACH_OMAP2_PM_H
12 #define __ARCH_ARM_MACH_OMAP2_PM_H
14 #include <linux/err.h>
16 #include "powerdomain.h"
18 extern void *omap3_secure_ram_storage;
19 extern void omap3_pm_off_mode_enable(int);
20 extern void omap_sram_idle(void);
21 extern int omap3_can_sleep(void);
22 extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
23 extern int omap3_idle_init(void);
25 #if defined(CONFIG_PM_OPP)
26 extern int omap3_opp_init(void);
27 extern int omap4_opp_init(void);
28 #else
29 static inline int omap3_opp_init(void)
31 return -EINVAL;
33 static inline int omap4_opp_init(void)
35 return -EINVAL;
37 #endif
40 * cpuidle mach specific parameters
42 * The board code can override the default C-states definition using
43 * omap3_pm_init_cpuidle
45 struct cpuidle_params {
46 u32 exit_latency; /* exit_latency = sleep + wake-up latencies */
47 u32 target_residency;
48 u8 valid; /* validates the C-state */
51 #if defined(CONFIG_PM) && defined(CONFIG_CPU_IDLE)
52 extern void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params);
53 #else
54 static
55 inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params)
58 #endif
60 extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
61 extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
63 extern u32 wakeup_timer_seconds;
64 extern u32 wakeup_timer_milliseconds;
65 extern struct omap_dm_timer *gptimer_wakeup;
67 #ifdef CONFIG_PM_DEBUG
68 extern void omap2_pm_dump(int mode, int resume, unsigned int us);
69 extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds);
70 extern int omap2_pm_debug;
71 extern u32 enable_off_mode;
72 extern u32 sleep_while_idle;
73 #else
74 #define omap2_pm_dump(mode, resume, us) do {} while (0);
75 #define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0);
76 #define omap2_pm_debug 0
77 #define enable_off_mode 0
78 #define sleep_while_idle 0
79 #endif
81 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
82 extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
83 extern int pm_dbg_regset_save(int reg_set);
84 extern int pm_dbg_regset_init(int reg_set);
85 #else
86 #define pm_dbg_update_time(pwrdm, prev) do {} while (0);
87 #define pm_dbg_regset_save(reg_set) do {} while (0);
88 #define pm_dbg_regset_init(reg_set) do {} while (0);
89 #endif /* CONFIG_PM_DEBUG */
91 extern void omap24xx_idle_loop_suspend(void);
93 extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
94 void __iomem *sdrc_power);
95 extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
96 extern int save_secure_ram_context(u32 *addr);
97 extern void omap3_save_scratchpad_contents(void);
99 extern unsigned int omap24xx_idle_loop_suspend_sz;
100 extern unsigned int save_secure_ram_context_sz;
101 extern unsigned int omap24xx_cpu_suspend_sz;
102 extern unsigned int omap34xx_cpu_suspend_sz;
104 #define PM_RTA_ERRATUM_i608 (1 << 0)
105 #define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1)
107 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
108 extern u16 pm34xx_errata;
109 #define IS_PM34XX_ERRATUM(id) (pm34xx_errata & (id))
110 extern void enable_omap3630_toggle_l2_on_restore(void);
111 #else
112 #define IS_PM34XX_ERRATUM(id) 0
113 static inline void enable_omap3630_toggle_l2_on_restore(void) { }
114 #endif /* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
116 #ifdef CONFIG_OMAP_SMARTREFLEX
117 extern int omap_devinit_smartreflex(void);
118 extern void omap_enable_smartreflex_on_init(void);
119 #else
120 static inline int omap_devinit_smartreflex(void)
122 return -EINVAL;
125 static inline void omap_enable_smartreflex_on_init(void) {}
126 #endif
128 #ifdef CONFIG_TWL4030_CORE
129 extern int omap3_twl_init(void);
130 extern int omap4_twl_init(void);
131 extern int omap3_twl_set_sr_bit(bool enable);
132 #else
133 static inline int omap3_twl_init(void)
135 return -EINVAL;
137 static inline int omap4_twl_init(void)
139 return -EINVAL;
141 #endif
143 #endif