ARM: 7409/1: Do not call flush_cache_user_range with mmap_sem held
[linux/fpc-iii.git] / arch / arm / plat-nomadik / timer.c
blobef74e157a9d5d0074e8b58d94863301603348624
1 /*
2 * linux/arch/arm/plat-nomadik/timer.c
4 * Copyright (C) 2008 STMicroelectronics
5 * Copyright (C) 2010 Alessandro Rubini
6 * Copyright (C) 2010 Linus Walleij for ST-Ericsson
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2, as
10 * published by the Free Software Foundation.
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/io.h>
16 #include <linux/clockchips.h>
17 #include <linux/clk.h>
18 #include <linux/jiffies.h>
19 #include <linux/err.h>
20 #include <linux/sched.h>
21 #include <asm/mach/time.h>
22 #include <asm/sched_clock.h>
24 #include <plat/mtu.h>
26 void __iomem *mtu_base; /* Assigned by machine code */
29 * Override the global weak sched_clock symbol with this
30 * local implementation which uses the clocksource to get some
31 * better resolution when scheduling the kernel.
33 static DEFINE_CLOCK_DATA(cd);
35 unsigned long long notrace sched_clock(void)
37 u32 cyc;
39 if (unlikely(!mtu_base))
40 return 0;
42 cyc = -readl(mtu_base + MTU_VAL(0));
43 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
46 static void notrace nomadik_update_sched_clock(void)
48 u32 cyc = -readl(mtu_base + MTU_VAL(0));
49 update_sched_clock(&cd, cyc, (u32)~0);
52 /* Clockevent device: use one-shot mode */
53 static void nmdk_clkevt_mode(enum clock_event_mode mode,
54 struct clock_event_device *dev)
56 u32 cr;
58 switch (mode) {
59 case CLOCK_EVT_MODE_PERIODIC:
60 pr_err("%s: periodic mode not supported\n", __func__);
61 break;
62 case CLOCK_EVT_MODE_ONESHOT:
63 /* Load highest value, enable device, enable interrupts */
64 cr = readl(mtu_base + MTU_CR(1));
65 writel(0, mtu_base + MTU_LR(1));
66 writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(1));
67 writel(1 << 1, mtu_base + MTU_IMSC);
68 break;
69 case CLOCK_EVT_MODE_SHUTDOWN:
70 case CLOCK_EVT_MODE_UNUSED:
71 /* disable irq */
72 writel(0, mtu_base + MTU_IMSC);
73 /* disable timer */
74 cr = readl(mtu_base + MTU_CR(1));
75 cr &= ~MTU_CRn_ENA;
76 writel(cr, mtu_base + MTU_CR(1));
77 /* load some high default value */
78 writel(0xffffffff, mtu_base + MTU_LR(1));
79 break;
80 case CLOCK_EVT_MODE_RESUME:
81 break;
85 static int nmdk_clkevt_next(unsigned long evt, struct clock_event_device *ev)
87 /* writing the value has immediate effect */
88 writel(evt, mtu_base + MTU_LR(1));
89 return 0;
92 static struct clock_event_device nmdk_clkevt = {
93 .name = "mtu_1",
94 .features = CLOCK_EVT_FEAT_ONESHOT,
95 .rating = 200,
96 .set_mode = nmdk_clkevt_mode,
97 .set_next_event = nmdk_clkevt_next,
101 * IRQ Handler for timer 1 of the MTU block.
103 static irqreturn_t nmdk_timer_interrupt(int irq, void *dev_id)
105 struct clock_event_device *evdev = dev_id;
107 writel(1 << 1, mtu_base + MTU_ICR); /* Interrupt clear reg */
108 evdev->event_handler(evdev);
109 return IRQ_HANDLED;
112 static struct irqaction nmdk_timer_irq = {
113 .name = "Nomadik Timer Tick",
114 .flags = IRQF_DISABLED | IRQF_TIMER,
115 .handler = nmdk_timer_interrupt,
116 .dev_id = &nmdk_clkevt,
119 void __init nmdk_timer_init(void)
121 unsigned long rate;
122 struct clk *clk0;
123 u32 cr = MTU_CRn_32BITS;
125 clk0 = clk_get_sys("mtu0", NULL);
126 BUG_ON(IS_ERR(clk0));
128 clk_enable(clk0);
131 * Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz
132 * for ux500.
133 * Use a divide-by-16 counter if the tick rate is more than 32MHz.
134 * At 32 MHz, the timer (with 32 bit counter) can be programmed
135 * to wake-up at a max 127s a head in time. Dividing a 2.4 MHz timer
136 * with 16 gives too low timer resolution.
138 rate = clk_get_rate(clk0);
139 if (rate > 32000000) {
140 rate /= 16;
141 cr |= MTU_CRn_PRESCALE_16;
142 } else {
143 cr |= MTU_CRn_PRESCALE_1;
146 /* Timer 0 is the free running clocksource */
147 writel(cr, mtu_base + MTU_CR(0));
148 writel(0, mtu_base + MTU_LR(0));
149 writel(0, mtu_base + MTU_BGLR(0));
150 writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0));
152 if (clocksource_mmio_init(mtu_base + MTU_VAL(0), "mtu_0",
153 rate, 200, 32, clocksource_mmio_readl_down))
154 pr_err("timer: failed to initialize clock source %s\n",
155 "mtu_0");
157 init_sched_clock(&cd, nomadik_update_sched_clock, 32, rate);
159 /* Timer 1 is used for events */
161 clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE);
163 writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */
165 nmdk_clkevt.max_delta_ns =
166 clockevent_delta2ns(0xffffffff, &nmdk_clkevt);
167 nmdk_clkevt.min_delta_ns =
168 clockevent_delta2ns(0x00000002, &nmdk_clkevt);
169 nmdk_clkevt.cpumask = cpumask_of(0);
171 /* Register irq and clockevents */
172 setup_irq(IRQ_MTU0, &nmdk_timer_irq);
173 clockevents_register_device(&nmdk_clkevt);