arch/mn10300/unit-asb2305/include/unit/timex.h

   1 /* ASB2305-specific timer specifications
   2  *
   3  * Copyright (C) 2007, 2010 Red Hat, Inc. All Rights Reserved.
   4  * Written by David Howells (dhowells@redhat.com)
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public Licence
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the Licence, or (at your option) any later version.
  10  */
  11 #ifndef _ASM_UNIT_TIMEX_H
  12 #define _ASM_UNIT_TIMEX_H
  13
  14 #ifndef __ASSEMBLY__
  15 #include <linux/irq.h>
  16 #endif /* __ASSEMBLY__ */
  17
  18 #include <asm/timer-regs.h>
  19 #include <unit/clock.h>
  20 #include <asm/param.h>
  21
  22 /*
  23  * jiffies counter specifications
  24  */
  25
  26 #define TMJCBR_MAX              0xffff
  27 #define TMJCIRQ                 TM1IRQ
  28 #define TMJCICR                 TM1ICR
  29
  30 #ifndef __ASSEMBLY__
  31
  32 #define MN10300_SRC_IOCLK       MN10300_IOCLK
  33
  34 #ifndef HZ
  35 # error HZ undeclared.
  36 #endif /* !HZ */
  37 /* use as little prescaling as possible to avoid losing accuracy */
  38 #if (MN10300_SRC_IOCLK + HZ / 2) / HZ - 1 <= TMJCBR_MAX
  39 # define IOCLK_PRESCALE         1
  40 # define JC_TIMER_CLKSRC        TM0MD_SRC_IOCLK
  41 # define TSC_TIMER_CLKSRC       TM4MD_SRC_IOCLK
  42 #elif (MN10300_SRC_IOCLK / 8 + HZ / 2) / HZ - 1 <= TMJCBR_MAX
  43 # define IOCLK_PRESCALE         8
  44 # define JC_TIMER_CLKSRC        TM0MD_SRC_IOCLK_8
  45 # define TSC_TIMER_CLKSRC       TM4MD_SRC_IOCLK_8
  46 #elif (MN10300_SRC_IOCLK / 32 + HZ / 2) / HZ - 1 <= TMJCBR_MAX
  47 # define IOCLK_PRESCALE         32
  48 # define JC_TIMER_CLKSRC        TM0MD_SRC_IOCLK_32
  49 # define TSC_TIMER_CLKSRC       TM4MD_SRC_IOCLK_32
  50 #else
  51 # error You lose.
  52 #endif
  53
  54 #define MN10300_JCCLK           (MN10300_SRC_IOCLK / IOCLK_PRESCALE)
  55 #define MN10300_TSCCLK          (MN10300_SRC_IOCLK / IOCLK_PRESCALE)
  56
  57 #define MN10300_JC_PER_HZ       ((MN10300_JCCLK + HZ / 2) / HZ)
  58 #define MN10300_TSC_PER_HZ      ((MN10300_TSCCLK + HZ / 2) / HZ)
  59
  60 static inline void stop_jiffies_counter(void)
  61 {
  62         u16 tmp;
  63         TM01MD = JC_TIMER_CLKSRC | TM1MD_SRC_TM0CASCADE << 8;
  64         tmp = TM01MD;
  65 }
  66
  67 static inline void reload_jiffies_counter(u32 cnt)
  68 {
  69         u32 tmp;
  70
  71         TM01BR = cnt;
  72         tmp = TM01BR;
  73
  74         TM01MD = JC_TIMER_CLKSRC |              \
  75                  TM1MD_SRC_TM0CASCADE << 8 |    \
  76                  TM0MD_INIT_COUNTER |           \
  77                  TM1MD_INIT_COUNTER << 8;
  78
  79
  80         TM01MD = JC_TIMER_CLKSRC |              \
  81                  TM1MD_SRC_TM0CASCADE << 8 |    \
  82                  TM0MD_COUNT_ENABLE |           \
  83                  TM1MD_COUNT_ENABLE << 8;
  84
  85         tmp = TM01MD;
  86 }
  87
  88 #endif /* !__ASSEMBLY__ */
  89
  90
  91 /*
  92  * timestamp counter specifications
  93  */
  94
  95 #define TMTSCBR_MAX             0xffffffff
  96 #define TMTSCBC                 TM45BC
  97
  98 #ifndef __ASSEMBLY__
  99
 100 static inline void startup_timestamp_counter(void)
 101 {
 102         u32 t32;
 103
 104         /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time
 105          * - count down from 4Gig-1 to 0 and wrap at IOCLK rate
 106          */
 107         TM45BR = TMTSCBR_MAX;
 108         t32 = TM45BR;
 109
 110         TM4MD = TSC_TIMER_CLKSRC;
 111         TM4MD |= TM4MD_INIT_COUNTER;
 112         TM4MD &= ~TM4MD_INIT_COUNTER;
 113         TM4ICR = 0;
 114         t32 = TM4ICR;
 115
 116         TM5MD = TM5MD_SRC_TM4CASCADE;
 117         TM5MD |= TM5MD_INIT_COUNTER;
 118         TM5MD &= ~TM5MD_INIT_COUNTER;
 119         TM5ICR = 0;
 120         t32 = TM5ICR;
 121
 122         TM5MD |= TM5MD_COUNT_ENABLE;
 123         TM4MD |= TM4MD_COUNT_ENABLE;
 124         t32 = TM5MD;
 125         t32 = TM4MD;
 126 }
 127
 128 static inline void shutdown_timestamp_counter(void)
 129 {
 130         u8 t8;
 131         TM4MD = 0;
 132         TM5MD = 0;
 133         t8 = TM4MD;
 134         t8 = TM5MD;
 135 }
 136
 137 /*
 138  * we use a cascaded pair of 16-bit down-counting timers to count I/O
 139  * clock cycles for the purposes of time keeping
 140  */
 141 typedef unsigned long cycles_t;
 142
 143 static inline cycles_t read_timestamp_counter(void)
 144 {
 145         return (cycles_t)~TMTSCBC;
 146 }
 147
 148 #endif /* !__ASSEMBLY__ */
 149
 150 #endif /* _ASM_UNIT_TIMEX_H */