drivers/i2c/busses/i2c-isch.c

   1 /*
   2     i2c-isch.c - Linux kernel driver for Intel SCH chipset SMBus
   3     - Based on i2c-piix4.c
   4     Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and
   5     Philip Edelbrock <phil@netroedge.com>
   6     - Intel SCH support
   7     Copyright (c) 2007 - 2008 Jacob Jun Pan <jacob.jun.pan@intel.com>
   8
   9     This program is free software; you can redistribute it and/or modify
  10     it under the terms of the GNU General Public License version 2 as
  11     published by the Free Software Foundation.
  12
  13     This program is distributed in the hope that it will be useful,
  14     but WITHOUT ANY WARRANTY; without even the implied warranty of
  15     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16     GNU General Public License for more details.
  17
  18     You should have received a copy of the GNU General Public License
  19     along with this program; if not, write to the Free Software
  20     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21 */
  22
  23 /*
  24    Supports:
  25         Intel SCH chipsets (AF82US15W, AF82US15L, AF82UL11L)
  26    Note: we assume there can only be one device, with one SMBus interface.
  27 */
  28
  29 #include <linux/module.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/kernel.h>
  32 #include <linux/delay.h>
  33 #include <linux/stddef.h>
  34 #include <linux/ioport.h>
  35 #include <linux/i2c.h>
  36 #include <linux/init.h>
  37 #include <linux/io.h>
  38 #include <linux/acpi.h>
  39
  40 /* SCH SMBus address offsets */
  41 #define SMBHSTCNT       (0 + sch_smba)
  42 #define SMBHSTSTS       (1 + sch_smba)
  43 #define SMBHSTADD       (4 + sch_smba) /* TSA */
  44 #define SMBHSTCMD       (5 + sch_smba)
  45 #define SMBHSTDAT0      (6 + sch_smba)
  46 #define SMBHSTDAT1      (7 + sch_smba)
  47 #define SMBBLKDAT       (0x20 + sch_smba)
  48
  49 /* Other settings */
  50 #define MAX_TIMEOUT     500
  51
  52 /* I2C constants */
  53 #define SCH_QUICK               0x00
  54 #define SCH_BYTE                0x01
  55 #define SCH_BYTE_DATA           0x02
  56 #define SCH_WORD_DATA           0x03
  57 #define SCH_BLOCK_DATA          0x05
  58
  59 static unsigned short sch_smba;
  60 static struct i2c_adapter sch_adapter;
  61
  62 /*
  63  * Start the i2c transaction -- the i2c_access will prepare the transaction
  64  * and this function will execute it.
  65  * return 0 for success and others for failure.
  66  */
  67 static int sch_transaction(void)
  68 {
  69         int temp;
  70         int result = 0;
  71         int timeout = 0;
  72
  73         dev_dbg(&sch_adapter.dev, "Transaction (pre): CNT=%02x, CMD=%02x, "
  74                 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb(SMBHSTCNT),
  75                 inb(SMBHSTCMD), inb(SMBHSTADD), inb(SMBHSTDAT0),
  76                 inb(SMBHSTDAT1));
  77
  78         /* Make sure the SMBus host is ready to start transmitting */
  79         temp = inb(SMBHSTSTS) & 0x0f;
  80         if (temp) {
  81                 /* Can not be busy since we checked it in sch_access */
  82                 if (temp & 0x01) {
  83                         dev_dbg(&sch_adapter.dev, "Completion (%02x). "
  84                                 "Clear...\n", temp);
  85                 }
  86                 if (temp & 0x06) {
  87                         dev_dbg(&sch_adapter.dev, "SMBus error (%02x). "
  88                                 "Resetting...\n", temp);
  89                 }
  90                 outb(temp, SMBHSTSTS);
  91                 temp = inb(SMBHSTSTS) & 0x0f;
  92                 if (temp) {
  93                         dev_err(&sch_adapter.dev,
  94                                 "SMBus is not ready: (%02x)\n", temp);
  95                         return -EAGAIN;
  96                 }
  97         }
  98
  99         /* start the transaction by setting bit 4 */
 100         outb(inb(SMBHSTCNT) | 0x10, SMBHSTCNT);
 101
 102         do {
 103                 msleep(1);
 104                 temp = inb(SMBHSTSTS) & 0x0f;
 105         } while ((temp & 0x08) && (timeout++ < MAX_TIMEOUT));
 106
 107         /* If the SMBus is still busy, we give up */
 108         if (timeout > MAX_TIMEOUT) {
 109                 dev_err(&sch_adapter.dev, "SMBus Timeout!\n");
 110                 result = -ETIMEDOUT;
 111         }
 112         if (temp & 0x04) {
 113                 result = -EIO;
 114                 dev_dbg(&sch_adapter.dev, "Bus collision! SMBus may be "
 115                         "locked until next hard reset. (sorry!)\n");
 116                 /* Clock stops and slave is stuck in mid-transmission */
 117         } else if (temp & 0x02) {
 118                 result = -EIO;
 119                 dev_err(&sch_adapter.dev, "Error: no response!\n");
 120         } else if (temp & 0x01) {
 121                 dev_dbg(&sch_adapter.dev, "Post complete!\n");
 122                 outb(temp, SMBHSTSTS);
 123                 temp = inb(SMBHSTSTS) & 0x07;
 124                 if (temp & 0x06) {
 125                         /* Completion clear failed */
 126                         dev_dbg(&sch_adapter.dev, "Failed reset at end of "
 127                                 "transaction (%02x), Bus error!\n", temp);
 128                 }
 129         } else {
 130                 result = -ENXIO;
 131                 dev_dbg(&sch_adapter.dev, "No such address.\n");
 132         }
 133         dev_dbg(&sch_adapter.dev, "Transaction (post): CNT=%02x, CMD=%02x, "
 134                 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb(SMBHSTCNT),
 135                 inb(SMBHSTCMD), inb(SMBHSTADD), inb(SMBHSTDAT0),
 136                 inb(SMBHSTDAT1));
 137         return result;
 138 }
 139
 140 /*
 141  * This is the main access entry for i2c-sch access
 142  * adap is i2c_adapter pointer, addr is the i2c device bus address, read_write
 143  * (0 for read and 1 for write), size is i2c transaction type and data is the
 144  * union of transaction for data to be transferred or data read from bus.
 145  * return 0 for success and others for failure.
 146  */
 147 static s32 sch_access(struct i2c_adapter *adap, u16 addr,
 148                  unsigned short flags, char read_write,
 149                  u8 command, int size, union i2c_smbus_data *data)
 150 {
 151         int i, len, temp, rc;
 152
 153         /* Make sure the SMBus host is not busy */
 154         temp = inb(SMBHSTSTS) & 0x0f;
 155         if (temp & 0x08) {
 156                 dev_dbg(&sch_adapter.dev, "SMBus busy (%02x)\n", temp);
 157                 return -EAGAIN;
 158         }
 159         dev_dbg(&sch_adapter.dev, "access size: %d %s\n", size,
 160                 (read_write)?"READ":"WRITE");
 161         switch (size) {
 162         case I2C_SMBUS_QUICK:
 163                 outb((addr << 1) | read_write, SMBHSTADD);
 164                 size = SCH_QUICK;
 165                 break;
 166         case I2C_SMBUS_BYTE:
 167                 outb((addr << 1) | read_write, SMBHSTADD);
 168                 if (read_write == I2C_SMBUS_WRITE)
 169                         outb(command, SMBHSTCMD);
 170                 size = SCH_BYTE;
 171                 break;
 172         case I2C_SMBUS_BYTE_DATA:
 173                 outb((addr << 1) | read_write, SMBHSTADD);
 174                 outb(command, SMBHSTCMD);
 175                 if (read_write == I2C_SMBUS_WRITE)
 176                         outb(data->byte, SMBHSTDAT0);
 177                 size = SCH_BYTE_DATA;
 178                 break;
 179         case I2C_SMBUS_WORD_DATA:
 180                 outb((addr << 1) | read_write, SMBHSTADD);
 181                 outb(command, SMBHSTCMD);
 182                 if (read_write == I2C_SMBUS_WRITE) {
 183                         outb(data->word & 0xff, SMBHSTDAT0);
 184                         outb((data->word & 0xff00) >> 8, SMBHSTDAT1);
 185                 }
 186                 size = SCH_WORD_DATA;
 187                 break;
 188         case I2C_SMBUS_BLOCK_DATA:
 189                 outb((addr << 1) | read_write, SMBHSTADD);
 190                 outb(command, SMBHSTCMD);
 191                 if (read_write == I2C_SMBUS_WRITE) {
 192                         len = data->block[0];
 193                         if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
 194                                 return -EINVAL;
 195                         outb(len, SMBHSTDAT0);
 196                         for (i = 1; i <= len; i++)
 197                                 outb(data->block[i], SMBBLKDAT+i-1);
 198                 }
 199                 size = SCH_BLOCK_DATA;
 200                 break;
 201         default:
 202                 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
 203                 return -EOPNOTSUPP;
 204         }
 205         dev_dbg(&sch_adapter.dev, "write size %d to 0x%04x\n", size, SMBHSTCNT);
 206         outb((inb(SMBHSTCNT) & 0xb0) | (size & 0x7), SMBHSTCNT);
 207
 208         rc = sch_transaction();
 209         if (rc) /* Error in transaction */
 210                 return rc;
 211
 212         if ((read_write == I2C_SMBUS_WRITE) || (size == SCH_QUICK))
 213                 return 0;
 214
 215         switch (size) {
 216         case SCH_BYTE:
 217         case SCH_BYTE_DATA:
 218                 data->byte = inb(SMBHSTDAT0);
 219                 break;
 220         case SCH_WORD_DATA:
 221                 data->word = inb(SMBHSTDAT0) + (inb(SMBHSTDAT1) << 8);
 222                 break;
 223         case SCH_BLOCK_DATA:
 224                 data->block[0] = inb(SMBHSTDAT0);
 225                 if (data->block[0] == 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
 226                         return -EPROTO;
 227                 for (i = 1; i <= data->block[0]; i++)
 228                         data->block[i] = inb(SMBBLKDAT+i-1);
 229                 break;
 230         }
 231         return 0;
 232 }
 233
 234 static u32 sch_func(struct i2c_adapter *adapter)
 235 {
 236         return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
 237             I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
 238             I2C_FUNC_SMBUS_BLOCK_DATA;
 239 }
 240
 241 static const struct i2c_algorithm smbus_algorithm = {
 242         .smbus_xfer     = sch_access,
 243         .functionality  = sch_func,
 244 };
 245
 246 static struct i2c_adapter sch_adapter = {
 247         .owner          = THIS_MODULE,
 248         .class          = I2C_CLASS_HWMON | I2C_CLASS_SPD,
 249         .algo           = &smbus_algorithm,
 250 };
 251
 252 static int __devinit smbus_sch_probe(struct platform_device *dev)
 253 {
 254         struct resource *res;
 255         int retval;
 256
 257         res = platform_get_resource(dev, IORESOURCE_IO, 0);
 258         if (!res)
 259                 return -EBUSY;
 260
 261         if (!request_region(res->start, resource_size(res), dev->name)) {
 262                 dev_err(&dev->dev, "SMBus region 0x%x already in use!\n",
 263                         sch_smba);
 264                 return -EBUSY;
 265         }
 266
 267         sch_smba = res->start;
 268
 269         dev_dbg(&dev->dev, "SMBA = 0x%X\n", sch_smba);
 270
 271         /* set up the sysfs linkage to our parent device */
 272         sch_adapter.dev.parent = &dev->dev;
 273
 274         snprintf(sch_adapter.name, sizeof(sch_adapter.name),
 275                 "SMBus SCH adapter at %04x", sch_smba);
 276
 277         retval = i2c_add_adapter(&sch_adapter);
 278         if (retval) {
 279                 dev_err(&dev->dev, "Couldn't register adapter!\n");
 280                 release_region(res->start, resource_size(res));
 281                 sch_smba = 0;
 282         }
 283
 284         return retval;
 285 }
 286
 287 static int __devexit smbus_sch_remove(struct platform_device *pdev)
 288 {
 289         struct resource *res;
 290         if (sch_smba) {
 291                 i2c_del_adapter(&sch_adapter);
 292                 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
 293                 release_region(res->start, resource_size(res));
 294                 sch_smba = 0;
 295         }
 296
 297         return 0;
 298 }
 299
 300 static struct platform_driver smbus_sch_driver = {
 301         .driver = {
 302                 .name = "isch_smbus",
 303                 .owner = THIS_MODULE,
 304         },
 305         .probe          = smbus_sch_probe,
 306         .remove         = __devexit_p(smbus_sch_remove),
 307 };
 308
 309 static int __init i2c_sch_init(void)
 310 {
 311         return platform_driver_register(&smbus_sch_driver);
 312 }
 313
 314 static void __exit i2c_sch_exit(void)
 315 {
 316         platform_driver_unregister(&smbus_sch_driver);
 317 }
 318
 319 MODULE_AUTHOR("Jacob Pan <jacob.jun.pan@intel.com>");
 320 MODULE_DESCRIPTION("Intel SCH SMBus driver");
 321 MODULE_LICENSE("GPL");
 322
 323 module_init(i2c_sch_init);
 324 module_exit(i2c_sch_exit);
 325 MODULE_ALIAS("platform:isch_smbus");