ARM: 7409/1: Do not call flush_cache_user_range with mmap_sem held
[linux/fpc-iii.git] / drivers / mfd / t7l66xb.c
blob91ad21ef7721cddd335e5470717f3f878191bf0d
1 /*
3 * Toshiba T7L66XB core mfd support
5 * Copyright (c) 2005, 2007, 2008 Ian Molton
6 * Copyright (c) 2008 Dmitry Baryshkov
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * T7L66 features:
14 * Supported in this driver:
15 * SD/MMC
16 * SM/NAND flash controller
18 * As yet not supported
19 * GPIO interface (on NAND pins)
20 * Serial interface
21 * TFT 'interface converter'
22 * PCMCIA interface logic
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/err.h>
28 #include <linux/io.h>
29 #include <linux/slab.h>
30 #include <linux/irq.h>
31 #include <linux/clk.h>
32 #include <linux/platform_device.h>
33 #include <linux/mfd/core.h>
34 #include <linux/mfd/tmio.h>
35 #include <linux/mfd/t7l66xb.h>
37 enum {
38 T7L66XB_CELL_NAND,
39 T7L66XB_CELL_MMC,
42 static const struct resource t7l66xb_mmc_resources[] = {
44 .start = 0x800,
45 .end = 0x9ff,
46 .flags = IORESOURCE_MEM,
49 .start = IRQ_T7L66XB_MMC,
50 .end = IRQ_T7L66XB_MMC,
51 .flags = IORESOURCE_IRQ,
55 #define SCR_REVID 0x08 /* b Revision ID */
56 #define SCR_IMR 0x42 /* b Interrupt Mask */
57 #define SCR_DEV_CTL 0xe0 /* b Device control */
58 #define SCR_ISR 0xe1 /* b Interrupt Status */
59 #define SCR_GPO_OC 0xf0 /* b GPO output control */
60 #define SCR_GPO_OS 0xf1 /* b GPO output enable */
61 #define SCR_GPI_S 0xf2 /* w GPI status */
62 #define SCR_APDC 0xf8 /* b Active pullup down ctrl */
64 #define SCR_DEV_CTL_USB BIT(0) /* USB enable */
65 #define SCR_DEV_CTL_MMC BIT(1) /* MMC enable */
67 /*--------------------------------------------------------------------------*/
69 struct t7l66xb {
70 void __iomem *scr;
71 /* Lock to protect registers requiring read/modify/write ops. */
72 spinlock_t lock;
74 struct resource rscr;
75 struct clk *clk48m;
76 struct clk *clk32k;
77 int irq;
78 int irq_base;
81 /*--------------------------------------------------------------------------*/
83 static int t7l66xb_mmc_enable(struct platform_device *mmc)
85 struct platform_device *dev = to_platform_device(mmc->dev.parent);
86 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
87 unsigned long flags;
88 u8 dev_ctl;
90 clk_enable(t7l66xb->clk32k);
92 spin_lock_irqsave(&t7l66xb->lock, flags);
94 dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL);
95 dev_ctl |= SCR_DEV_CTL_MMC;
96 tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL);
98 spin_unlock_irqrestore(&t7l66xb->lock, flags);
100 tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0,
101 t7l66xb_mmc_resources[0].start & 0xfffe);
103 return 0;
106 static int t7l66xb_mmc_disable(struct platform_device *mmc)
108 struct platform_device *dev = to_platform_device(mmc->dev.parent);
109 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
110 unsigned long flags;
111 u8 dev_ctl;
113 spin_lock_irqsave(&t7l66xb->lock, flags);
115 dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL);
116 dev_ctl &= ~SCR_DEV_CTL_MMC;
117 tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL);
119 spin_unlock_irqrestore(&t7l66xb->lock, flags);
121 clk_disable(t7l66xb->clk32k);
123 return 0;
126 static void t7l66xb_mmc_pwr(struct platform_device *mmc, int state)
128 struct platform_device *dev = to_platform_device(mmc->dev.parent);
129 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
131 tmio_core_mmc_pwr(t7l66xb->scr + 0x200, 0, state);
134 static void t7l66xb_mmc_clk_div(struct platform_device *mmc, int state)
136 struct platform_device *dev = to_platform_device(mmc->dev.parent);
137 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
139 tmio_core_mmc_clk_div(t7l66xb->scr + 0x200, 0, state);
142 /*--------------------------------------------------------------------------*/
144 static struct tmio_mmc_data t7166xb_mmc_data = {
145 .hclk = 24000000,
146 .set_pwr = t7l66xb_mmc_pwr,
147 .set_clk_div = t7l66xb_mmc_clk_div,
150 static const struct resource t7l66xb_nand_resources[] = {
152 .start = 0xc00,
153 .end = 0xc07,
154 .flags = IORESOURCE_MEM,
157 .start = 0x0100,
158 .end = 0x01ff,
159 .flags = IORESOURCE_MEM,
162 .start = IRQ_T7L66XB_NAND,
163 .end = IRQ_T7L66XB_NAND,
164 .flags = IORESOURCE_IRQ,
168 static struct mfd_cell t7l66xb_cells[] = {
169 [T7L66XB_CELL_MMC] = {
170 .name = "tmio-mmc",
171 .enable = t7l66xb_mmc_enable,
172 .disable = t7l66xb_mmc_disable,
173 .platform_data = &t7166xb_mmc_data,
174 .pdata_size = sizeof(t7166xb_mmc_data),
175 .num_resources = ARRAY_SIZE(t7l66xb_mmc_resources),
176 .resources = t7l66xb_mmc_resources,
178 [T7L66XB_CELL_NAND] = {
179 .name = "tmio-nand",
180 .num_resources = ARRAY_SIZE(t7l66xb_nand_resources),
181 .resources = t7l66xb_nand_resources,
185 /*--------------------------------------------------------------------------*/
187 /* Handle the T7L66XB interrupt mux */
188 static void t7l66xb_irq(unsigned int irq, struct irq_desc *desc)
190 struct t7l66xb *t7l66xb = irq_get_handler_data(irq);
191 unsigned int isr;
192 unsigned int i, irq_base;
194 irq_base = t7l66xb->irq_base;
196 while ((isr = tmio_ioread8(t7l66xb->scr + SCR_ISR) &
197 ~tmio_ioread8(t7l66xb->scr + SCR_IMR)))
198 for (i = 0; i < T7L66XB_NR_IRQS; i++)
199 if (isr & (1 << i))
200 generic_handle_irq(irq_base + i);
203 static void t7l66xb_irq_mask(struct irq_data *data)
205 struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data);
206 unsigned long flags;
207 u8 imr;
209 spin_lock_irqsave(&t7l66xb->lock, flags);
210 imr = tmio_ioread8(t7l66xb->scr + SCR_IMR);
211 imr |= 1 << (data->irq - t7l66xb->irq_base);
212 tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR);
213 spin_unlock_irqrestore(&t7l66xb->lock, flags);
216 static void t7l66xb_irq_unmask(struct irq_data *data)
218 struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data);
219 unsigned long flags;
220 u8 imr;
222 spin_lock_irqsave(&t7l66xb->lock, flags);
223 imr = tmio_ioread8(t7l66xb->scr + SCR_IMR);
224 imr &= ~(1 << (data->irq - t7l66xb->irq_base));
225 tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR);
226 spin_unlock_irqrestore(&t7l66xb->lock, flags);
229 static struct irq_chip t7l66xb_chip = {
230 .name = "t7l66xb",
231 .irq_ack = t7l66xb_irq_mask,
232 .irq_mask = t7l66xb_irq_mask,
233 .irq_unmask = t7l66xb_irq_unmask,
236 /*--------------------------------------------------------------------------*/
238 /* Install the IRQ handler */
239 static void t7l66xb_attach_irq(struct platform_device *dev)
241 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
242 unsigned int irq, irq_base;
244 irq_base = t7l66xb->irq_base;
246 for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
247 irq_set_chip_and_handler(irq, &t7l66xb_chip, handle_level_irq);
248 irq_set_chip_data(irq, t7l66xb);
249 #ifdef CONFIG_ARM
250 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
251 #endif
254 irq_set_irq_type(t7l66xb->irq, IRQ_TYPE_EDGE_FALLING);
255 irq_set_handler_data(t7l66xb->irq, t7l66xb);
256 irq_set_chained_handler(t7l66xb->irq, t7l66xb_irq);
259 static void t7l66xb_detach_irq(struct platform_device *dev)
261 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
262 unsigned int irq, irq_base;
264 irq_base = t7l66xb->irq_base;
266 irq_set_chained_handler(t7l66xb->irq, NULL);
267 irq_set_handler_data(t7l66xb->irq, NULL);
269 for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
270 #ifdef CONFIG_ARM
271 set_irq_flags(irq, 0);
272 #endif
273 irq_set_chip(irq, NULL);
274 irq_set_chip_data(irq, NULL);
278 /*--------------------------------------------------------------------------*/
280 #ifdef CONFIG_PM
281 static int t7l66xb_suspend(struct platform_device *dev, pm_message_t state)
283 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
284 struct t7l66xb_platform_data *pdata = dev->dev.platform_data;
286 if (pdata && pdata->suspend)
287 pdata->suspend(dev);
288 clk_disable(t7l66xb->clk48m);
290 return 0;
293 static int t7l66xb_resume(struct platform_device *dev)
295 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
296 struct t7l66xb_platform_data *pdata = dev->dev.platform_data;
298 clk_enable(t7l66xb->clk48m);
299 if (pdata && pdata->resume)
300 pdata->resume(dev);
302 tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0,
303 t7l66xb_mmc_resources[0].start & 0xfffe);
305 return 0;
307 #else
308 #define t7l66xb_suspend NULL
309 #define t7l66xb_resume NULL
310 #endif
312 /*--------------------------------------------------------------------------*/
314 static int t7l66xb_probe(struct platform_device *dev)
316 struct t7l66xb_platform_data *pdata = dev->dev.platform_data;
317 struct t7l66xb *t7l66xb;
318 struct resource *iomem, *rscr;
319 int ret;
321 if (pdata == NULL)
322 return -EINVAL;
324 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
325 if (!iomem)
326 return -EINVAL;
328 t7l66xb = kzalloc(sizeof *t7l66xb, GFP_KERNEL);
329 if (!t7l66xb)
330 return -ENOMEM;
332 spin_lock_init(&t7l66xb->lock);
334 platform_set_drvdata(dev, t7l66xb);
336 ret = platform_get_irq(dev, 0);
337 if (ret >= 0)
338 t7l66xb->irq = ret;
339 else
340 goto err_noirq;
342 t7l66xb->irq_base = pdata->irq_base;
344 t7l66xb->clk32k = clk_get(&dev->dev, "CLK_CK32K");
345 if (IS_ERR(t7l66xb->clk32k)) {
346 ret = PTR_ERR(t7l66xb->clk32k);
347 goto err_clk32k_get;
350 t7l66xb->clk48m = clk_get(&dev->dev, "CLK_CK48M");
351 if (IS_ERR(t7l66xb->clk48m)) {
352 ret = PTR_ERR(t7l66xb->clk48m);
353 goto err_clk48m_get;
356 rscr = &t7l66xb->rscr;
357 rscr->name = "t7l66xb-core";
358 rscr->start = iomem->start;
359 rscr->end = iomem->start + 0xff;
360 rscr->flags = IORESOURCE_MEM;
362 ret = request_resource(iomem, rscr);
363 if (ret)
364 goto err_request_scr;
366 t7l66xb->scr = ioremap(rscr->start, resource_size(rscr));
367 if (!t7l66xb->scr) {
368 ret = -ENOMEM;
369 goto err_ioremap;
372 clk_enable(t7l66xb->clk48m);
374 if (pdata && pdata->enable)
375 pdata->enable(dev);
377 /* Mask all interrupts */
378 tmio_iowrite8(0xbf, t7l66xb->scr + SCR_IMR);
380 printk(KERN_INFO "%s rev %d @ 0x%08lx, irq %d\n",
381 dev->name, tmio_ioread8(t7l66xb->scr + SCR_REVID),
382 (unsigned long)iomem->start, t7l66xb->irq);
384 t7l66xb_attach_irq(dev);
386 t7l66xb_cells[T7L66XB_CELL_NAND].platform_data = pdata->nand_data;
387 t7l66xb_cells[T7L66XB_CELL_NAND].pdata_size = sizeof(*pdata->nand_data);
389 ret = mfd_add_devices(&dev->dev, dev->id,
390 t7l66xb_cells, ARRAY_SIZE(t7l66xb_cells),
391 iomem, t7l66xb->irq_base);
393 if (!ret)
394 return 0;
396 t7l66xb_detach_irq(dev);
397 iounmap(t7l66xb->scr);
398 err_ioremap:
399 release_resource(&t7l66xb->rscr);
400 err_request_scr:
401 clk_put(t7l66xb->clk48m);
402 err_clk48m_get:
403 clk_put(t7l66xb->clk32k);
404 err_clk32k_get:
405 err_noirq:
406 kfree(t7l66xb);
407 return ret;
410 static int t7l66xb_remove(struct platform_device *dev)
412 struct t7l66xb_platform_data *pdata = dev->dev.platform_data;
413 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
414 int ret;
416 ret = pdata->disable(dev);
417 clk_disable(t7l66xb->clk48m);
418 clk_put(t7l66xb->clk48m);
419 clk_disable(t7l66xb->clk32k);
420 clk_put(t7l66xb->clk32k);
421 t7l66xb_detach_irq(dev);
422 iounmap(t7l66xb->scr);
423 release_resource(&t7l66xb->rscr);
424 mfd_remove_devices(&dev->dev);
425 platform_set_drvdata(dev, NULL);
426 kfree(t7l66xb);
428 return ret;
432 static struct platform_driver t7l66xb_platform_driver = {
433 .driver = {
434 .name = "t7l66xb",
435 .owner = THIS_MODULE,
437 .suspend = t7l66xb_suspend,
438 .resume = t7l66xb_resume,
439 .probe = t7l66xb_probe,
440 .remove = t7l66xb_remove,
443 /*--------------------------------------------------------------------------*/
445 static int __init t7l66xb_init(void)
447 int retval = 0;
449 retval = platform_driver_register(&t7l66xb_platform_driver);
450 return retval;
453 static void __exit t7l66xb_exit(void)
455 platform_driver_unregister(&t7l66xb_platform_driver);
458 module_init(t7l66xb_init);
459 module_exit(t7l66xb_exit);
461 MODULE_DESCRIPTION("Toshiba T7L66XB core driver");
462 MODULE_LICENSE("GPL v2");
463 MODULE_AUTHOR("Ian Molton");
464 MODULE_ALIAS("platform:t7l66xb");