2 * OpenFirmware bindings for Secure Digital Host Controller Interface.
4 * Copyright (c) 2007 Freescale Semiconductor, Inc.
5 * Copyright (c) 2009 MontaVista Software, Inc.
7 * Authors: Xiaobo Xie <X.Xie@freescale.com>
8 * Anton Vorontsov <avorontsov@ru.mvista.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
16 #include <linux/err.h>
17 #include <linux/module.h>
18 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/delay.h>
23 #include <linux/of_platform.h>
24 #include <linux/of_address.h>
25 #include <linux/of_irq.h>
26 #include <linux/mmc/host.h>
28 #include <asm/machdep.h>
33 #ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
36 * These accessors are designed for big endian hosts doing I/O to
37 * little endian controllers incorporating a 32-bit hardware byte swapper.
40 u32
sdhci_be32bs_readl(struct sdhci_host
*host
, int reg
)
42 return in_be32(host
->ioaddr
+ reg
);
45 u16
sdhci_be32bs_readw(struct sdhci_host
*host
, int reg
)
47 return in_be16(host
->ioaddr
+ (reg
^ 0x2));
50 u8
sdhci_be32bs_readb(struct sdhci_host
*host
, int reg
)
52 return in_8(host
->ioaddr
+ (reg
^ 0x3));
55 void sdhci_be32bs_writel(struct sdhci_host
*host
, u32 val
, int reg
)
57 out_be32(host
->ioaddr
+ reg
, val
);
60 void sdhci_be32bs_writew(struct sdhci_host
*host
, u16 val
, int reg
)
62 struct sdhci_of_host
*of_host
= sdhci_priv(host
);
63 int base
= reg
& ~0x3;
64 int shift
= (reg
& 0x2) * 8;
67 case SDHCI_TRANSFER_MODE
:
69 * Postpone this write, we must do it together with a
70 * command write that is down below.
72 of_host
->xfer_mode_shadow
= val
;
75 sdhci_be32bs_writel(host
, val
<< 16 | of_host
->xfer_mode_shadow
,
79 clrsetbits_be32(host
->ioaddr
+ base
, 0xffff << shift
, val
<< shift
);
82 void sdhci_be32bs_writeb(struct sdhci_host
*host
, u8 val
, int reg
)
84 int base
= reg
& ~0x3;
85 int shift
= (reg
& 0x3) * 8;
87 clrsetbits_be32(host
->ioaddr
+ base
, 0xff << shift
, val
<< shift
);
89 #endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
93 static int sdhci_of_suspend(struct platform_device
*ofdev
, pm_message_t state
)
95 struct sdhci_host
*host
= dev_get_drvdata(&ofdev
->dev
);
97 return mmc_suspend_host(host
->mmc
);
100 static int sdhci_of_resume(struct platform_device
*ofdev
)
102 struct sdhci_host
*host
= dev_get_drvdata(&ofdev
->dev
);
104 return mmc_resume_host(host
->mmc
);
109 #define sdhci_of_suspend NULL
110 #define sdhci_of_resume NULL
114 static bool __devinit
sdhci_of_wp_inverted(struct device_node
*np
)
116 if (of_get_property(np
, "sdhci,wp-inverted", NULL
))
119 /* Old device trees don't have the wp-inverted property. */
121 return machine_is(mpc837x_rdb
) || machine_is(mpc837x_mds
);
127 static const struct of_device_id sdhci_of_match
[];
128 static int __devinit
sdhci_of_probe(struct platform_device
*ofdev
)
130 const struct of_device_id
*match
;
131 struct device_node
*np
= ofdev
->dev
.of_node
;
132 struct sdhci_of_data
*sdhci_of_data
;
133 struct sdhci_host
*host
;
134 struct sdhci_of_host
*of_host
;
139 match
= of_match_device(sdhci_of_match
, &ofdev
->dev
);
142 sdhci_of_data
= match
->data
;
144 if (!of_device_is_available(np
))
147 host
= sdhci_alloc_host(&ofdev
->dev
, sizeof(*of_host
));
151 of_host
= sdhci_priv(host
);
152 dev_set_drvdata(&ofdev
->dev
, host
);
154 host
->ioaddr
= of_iomap(np
, 0);
160 host
->irq
= irq_of_parse_and_map(np
, 0);
166 host
->hw_name
= dev_name(&ofdev
->dev
);
168 host
->quirks
= sdhci_of_data
->quirks
;
169 host
->ops
= &sdhci_of_data
->ops
;
172 if (of_get_property(np
, "sdhci,auto-cmd12", NULL
))
173 host
->quirks
|= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12
;
176 if (of_get_property(np
, "sdhci,1-bit-only", NULL
))
177 host
->quirks
|= SDHCI_QUIRK_FORCE_1_BIT_DATA
;
179 if (sdhci_of_wp_inverted(np
))
180 host
->quirks
|= SDHCI_QUIRK_INVERTED_WRITE_PROTECT
;
182 clk
= of_get_property(np
, "clock-frequency", &size
);
183 if (clk
&& size
== sizeof(*clk
) && *clk
)
184 of_host
->clock
= be32_to_cpup(clk
);
186 ret
= sdhci_add_host(host
);
193 irq_dispose_mapping(host
->irq
);
195 iounmap(host
->ioaddr
);
197 sdhci_free_host(host
);
201 static int __devexit
sdhci_of_remove(struct platform_device
*ofdev
)
203 struct sdhci_host
*host
= dev_get_drvdata(&ofdev
->dev
);
205 sdhci_remove_host(host
, 0);
206 sdhci_free_host(host
);
207 irq_dispose_mapping(host
->irq
);
208 iounmap(host
->ioaddr
);
212 static const struct of_device_id sdhci_of_match
[] = {
213 #ifdef CONFIG_MMC_SDHCI_OF_ESDHC
214 { .compatible
= "fsl,mpc8379-esdhc", .data
= &sdhci_esdhc
, },
215 { .compatible
= "fsl,mpc8536-esdhc", .data
= &sdhci_esdhc
, },
216 { .compatible
= "fsl,esdhc", .data
= &sdhci_esdhc
, },
218 #ifdef CONFIG_MMC_SDHCI_OF_HLWD
219 { .compatible
= "nintendo,hollywood-sdhci", .data
= &sdhci_hlwd
, },
221 { .compatible
= "generic-sdhci", },
224 MODULE_DEVICE_TABLE(of
, sdhci_of_match
);
226 static struct platform_driver sdhci_of_driver
= {
229 .owner
= THIS_MODULE
,
230 .of_match_table
= sdhci_of_match
,
232 .probe
= sdhci_of_probe
,
233 .remove
= __devexit_p(sdhci_of_remove
),
234 .suspend
= sdhci_of_suspend
,
235 .resume
= sdhci_of_resume
,
238 static int __init
sdhci_of_init(void)
240 return platform_driver_register(&sdhci_of_driver
);
242 module_init(sdhci_of_init
);
244 static void __exit
sdhci_of_exit(void)
246 platform_driver_unregister(&sdhci_of_driver
);
248 module_exit(sdhci_of_exit
);
250 MODULE_DESCRIPTION("Secure Digital Host Controller Interface OF driver");
251 MODULE_AUTHOR("Xiaobo Xie <X.Xie@freescale.com>, "
252 "Anton Vorontsov <avorontsov@ru.mvista.com>");
253 MODULE_LICENSE("GPL");