2 * Atmel MACB Ethernet Controller driver
4 * Copyright (C) 2004-2006 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/clk.h>
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/slab.h>
17 #include <linux/init.h>
18 #include <linux/netdevice.h>
19 #include <linux/etherdevice.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/platform_device.h>
22 #include <linux/phy.h>
24 #include <mach/board.h>
29 #define RX_BUFFER_SIZE 128
30 #define RX_RING_SIZE 512
31 #define RX_RING_BYTES (sizeof(struct dma_desc) * RX_RING_SIZE)
33 /* Make the IP header word-aligned (the ethernet header is 14 bytes) */
36 #define TX_RING_SIZE 128
37 #define DEF_TX_RING_PENDING (TX_RING_SIZE - 1)
38 #define TX_RING_BYTES (sizeof(struct dma_desc) * TX_RING_SIZE)
40 #define TX_RING_GAP(bp) \
41 (TX_RING_SIZE - (bp)->tx_pending)
42 #define TX_BUFFS_AVAIL(bp) \
43 (((bp)->tx_tail <= (bp)->tx_head) ? \
44 (bp)->tx_tail + (bp)->tx_pending - (bp)->tx_head : \
45 (bp)->tx_tail - (bp)->tx_head - TX_RING_GAP(bp))
46 #define NEXT_TX(n) (((n) + 1) & (TX_RING_SIZE - 1))
48 #define NEXT_RX(n) (((n) + 1) & (RX_RING_SIZE - 1))
50 /* minimum number of free TX descriptors before waking up TX process */
51 #define MACB_TX_WAKEUP_THRESH (TX_RING_SIZE / 4)
53 #define MACB_RX_INT_FLAGS (MACB_BIT(RCOMP) | MACB_BIT(RXUBR) \
56 static void __macb_set_hwaddr(struct macb
*bp
)
61 bottom
= cpu_to_le32(*((u32
*)bp
->dev
->dev_addr
));
62 macb_writel(bp
, SA1B
, bottom
);
63 top
= cpu_to_le16(*((u16
*)(bp
->dev
->dev_addr
+ 4)));
64 macb_writel(bp
, SA1T
, top
);
67 static void __init
macb_get_hwaddr(struct macb
*bp
)
73 bottom
= macb_readl(bp
, SA1B
);
74 top
= macb_readl(bp
, SA1T
);
76 addr
[0] = bottom
& 0xff;
77 addr
[1] = (bottom
>> 8) & 0xff;
78 addr
[2] = (bottom
>> 16) & 0xff;
79 addr
[3] = (bottom
>> 24) & 0xff;
81 addr
[5] = (top
>> 8) & 0xff;
83 if (is_valid_ether_addr(addr
)) {
84 memcpy(bp
->dev
->dev_addr
, addr
, sizeof(addr
));
86 dev_info(&bp
->pdev
->dev
, "invalid hw address, using random\n");
87 random_ether_addr(bp
->dev
->dev_addr
);
91 static int macb_mdio_read(struct mii_bus
*bus
, int mii_id
, int regnum
)
93 struct macb
*bp
= bus
->priv
;
96 macb_writel(bp
, MAN
, (MACB_BF(SOF
, MACB_MAN_SOF
)
97 | MACB_BF(RW
, MACB_MAN_READ
)
98 | MACB_BF(PHYA
, mii_id
)
99 | MACB_BF(REGA
, regnum
)
100 | MACB_BF(CODE
, MACB_MAN_CODE
)));
102 /* wait for end of transfer */
103 while (!MACB_BFEXT(IDLE
, macb_readl(bp
, NSR
)))
106 value
= MACB_BFEXT(DATA
, macb_readl(bp
, MAN
));
111 static int macb_mdio_write(struct mii_bus
*bus
, int mii_id
, int regnum
,
114 struct macb
*bp
= bus
->priv
;
116 macb_writel(bp
, MAN
, (MACB_BF(SOF
, MACB_MAN_SOF
)
117 | MACB_BF(RW
, MACB_MAN_WRITE
)
118 | MACB_BF(PHYA
, mii_id
)
119 | MACB_BF(REGA
, regnum
)
120 | MACB_BF(CODE
, MACB_MAN_CODE
)
121 | MACB_BF(DATA
, value
)));
123 /* wait for end of transfer */
124 while (!MACB_BFEXT(IDLE
, macb_readl(bp
, NSR
)))
130 static int macb_mdio_reset(struct mii_bus
*bus
)
135 static void macb_handle_link_change(struct net_device
*dev
)
137 struct macb
*bp
= netdev_priv(dev
);
138 struct phy_device
*phydev
= bp
->phy_dev
;
141 int status_change
= 0;
143 spin_lock_irqsave(&bp
->lock
, flags
);
146 if ((bp
->speed
!= phydev
->speed
) ||
147 (bp
->duplex
!= phydev
->duplex
)) {
150 reg
= macb_readl(bp
, NCFGR
);
151 reg
&= ~(MACB_BIT(SPD
) | MACB_BIT(FD
));
155 if (phydev
->speed
== SPEED_100
)
156 reg
|= MACB_BIT(SPD
);
158 macb_writel(bp
, NCFGR
, reg
);
160 bp
->speed
= phydev
->speed
;
161 bp
->duplex
= phydev
->duplex
;
166 if (phydev
->link
!= bp
->link
) {
171 bp
->link
= phydev
->link
;
176 spin_unlock_irqrestore(&bp
->lock
, flags
);
180 printk(KERN_INFO
"%s: link up (%d/%s)\n",
181 dev
->name
, phydev
->speed
,
182 DUPLEX_FULL
== phydev
->duplex
? "Full":"Half");
184 printk(KERN_INFO
"%s: link down\n", dev
->name
);
188 /* based on au1000_eth. c*/
189 static int macb_mii_probe(struct net_device
*dev
)
191 struct macb
*bp
= netdev_priv(dev
);
192 struct phy_device
*phydev
;
193 struct eth_platform_data
*pdata
;
196 phydev
= phy_find_first(bp
->mii_bus
);
198 printk (KERN_ERR
"%s: no PHY found\n", dev
->name
);
202 pdata
= bp
->pdev
->dev
.platform_data
;
203 /* TODO : add pin_irq */
205 /* attach the mac to the phy */
206 ret
= phy_connect_direct(dev
, phydev
, &macb_handle_link_change
, 0,
207 pdata
&& pdata
->is_rmii
?
208 PHY_INTERFACE_MODE_RMII
:
209 PHY_INTERFACE_MODE_MII
);
211 printk(KERN_ERR
"%s: Could not attach to PHY\n", dev
->name
);
215 /* mask with MAC supported features */
216 phydev
->supported
&= PHY_BASIC_FEATURES
;
218 phydev
->advertising
= phydev
->supported
;
223 bp
->phy_dev
= phydev
;
228 static int macb_mii_init(struct macb
*bp
)
230 struct eth_platform_data
*pdata
;
233 /* Enable management port */
234 macb_writel(bp
, NCR
, MACB_BIT(MPE
));
236 bp
->mii_bus
= mdiobus_alloc();
237 if (bp
->mii_bus
== NULL
) {
242 bp
->mii_bus
->name
= "MACB_mii_bus";
243 bp
->mii_bus
->read
= &macb_mdio_read
;
244 bp
->mii_bus
->write
= &macb_mdio_write
;
245 bp
->mii_bus
->reset
= &macb_mdio_reset
;
246 snprintf(bp
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%x", bp
->pdev
->id
);
247 bp
->mii_bus
->priv
= bp
;
248 bp
->mii_bus
->parent
= &bp
->dev
->dev
;
249 pdata
= bp
->pdev
->dev
.platform_data
;
252 bp
->mii_bus
->phy_mask
= pdata
->phy_mask
;
254 bp
->mii_bus
->irq
= kmalloc(sizeof(int)*PHY_MAX_ADDR
, GFP_KERNEL
);
255 if (!bp
->mii_bus
->irq
) {
257 goto err_out_free_mdiobus
;
260 for (i
= 0; i
< PHY_MAX_ADDR
; i
++)
261 bp
->mii_bus
->irq
[i
] = PHY_POLL
;
263 dev_set_drvdata(&bp
->dev
->dev
, bp
->mii_bus
);
265 if (mdiobus_register(bp
->mii_bus
))
266 goto err_out_free_mdio_irq
;
268 if (macb_mii_probe(bp
->dev
) != 0) {
269 goto err_out_unregister_bus
;
274 err_out_unregister_bus
:
275 mdiobus_unregister(bp
->mii_bus
);
276 err_out_free_mdio_irq
:
277 kfree(bp
->mii_bus
->irq
);
278 err_out_free_mdiobus
:
279 mdiobus_free(bp
->mii_bus
);
284 static void macb_update_stats(struct macb
*bp
)
286 u32 __iomem
*reg
= bp
->regs
+ MACB_PFR
;
287 u32
*p
= &bp
->hw_stats
.rx_pause_frames
;
288 u32
*end
= &bp
->hw_stats
.tx_pause_frames
+ 1;
290 WARN_ON((unsigned long)(end
- p
- 1) != (MACB_TPF
- MACB_PFR
) / 4);
292 for(; p
< end
; p
++, reg
++)
293 *p
+= __raw_readl(reg
);
296 static void macb_tx(struct macb
*bp
)
302 status
= macb_readl(bp
, TSR
);
303 macb_writel(bp
, TSR
, status
);
305 dev_dbg(&bp
->pdev
->dev
, "macb_tx status = %02lx\n",
306 (unsigned long)status
);
308 if (status
& (MACB_BIT(UND
) | MACB_BIT(TSR_RLE
))) {
310 printk(KERN_ERR
"%s: TX %s, resetting buffers\n",
311 bp
->dev
->name
, status
& MACB_BIT(UND
) ?
312 "underrun" : "retry limit exceeded");
314 /* Transfer ongoing, disable transmitter, to avoid confusion */
315 if (status
& MACB_BIT(TGO
))
316 macb_writel(bp
, NCR
, macb_readl(bp
, NCR
) & ~MACB_BIT(TE
));
320 /*Mark all the buffer as used to avoid sending a lost buffer*/
321 for (i
= 0; i
< TX_RING_SIZE
; i
++)
322 bp
->tx_ring
[i
].ctrl
= MACB_BIT(TX_USED
);
324 /* free transmit buffer in upper layer*/
325 for (tail
= bp
->tx_tail
; tail
!= head
; tail
= NEXT_TX(tail
)) {
326 struct ring_info
*rp
= &bp
->tx_skb
[tail
];
327 struct sk_buff
*skb
= rp
->skb
;
333 dma_unmap_single(&bp
->pdev
->dev
, rp
->mapping
, skb
->len
,
336 dev_kfree_skb_irq(skb
);
339 bp
->tx_head
= bp
->tx_tail
= 0;
341 /* Enable the transmitter again */
342 if (status
& MACB_BIT(TGO
))
343 macb_writel(bp
, NCR
, macb_readl(bp
, NCR
) | MACB_BIT(TE
));
346 if (!(status
& MACB_BIT(COMP
)))
348 * This may happen when a buffer becomes complete
349 * between reading the ISR and scanning the
350 * descriptors. Nothing to worry about.
355 for (tail
= bp
->tx_tail
; tail
!= head
; tail
= NEXT_TX(tail
)) {
356 struct ring_info
*rp
= &bp
->tx_skb
[tail
];
357 struct sk_buff
*skb
= rp
->skb
;
363 bufstat
= bp
->tx_ring
[tail
].ctrl
;
365 if (!(bufstat
& MACB_BIT(TX_USED
)))
368 dev_dbg(&bp
->pdev
->dev
, "skb %u (data %p) TX complete\n",
370 dma_unmap_single(&bp
->pdev
->dev
, rp
->mapping
, skb
->len
,
372 bp
->stats
.tx_packets
++;
373 bp
->stats
.tx_bytes
+= skb
->len
;
375 dev_kfree_skb_irq(skb
);
379 if (netif_queue_stopped(bp
->dev
) &&
380 TX_BUFFS_AVAIL(bp
) > MACB_TX_WAKEUP_THRESH
)
381 netif_wake_queue(bp
->dev
);
384 static int macb_rx_frame(struct macb
*bp
, unsigned int first_frag
,
385 unsigned int last_frag
)
389 unsigned int offset
= 0;
392 len
= MACB_BFEXT(RX_FRMLEN
, bp
->rx_ring
[last_frag
].ctrl
);
394 dev_dbg(&bp
->pdev
->dev
, "macb_rx_frame frags %u - %u (len %u)\n",
395 first_frag
, last_frag
, len
);
397 skb
= dev_alloc_skb(len
+ RX_OFFSET
);
399 bp
->stats
.rx_dropped
++;
400 for (frag
= first_frag
; ; frag
= NEXT_RX(frag
)) {
401 bp
->rx_ring
[frag
].addr
&= ~MACB_BIT(RX_USED
);
402 if (frag
== last_frag
)
409 skb_reserve(skb
, RX_OFFSET
);
410 skb_checksum_none_assert(skb
);
413 for (frag
= first_frag
; ; frag
= NEXT_RX(frag
)) {
414 unsigned int frag_len
= RX_BUFFER_SIZE
;
416 if (offset
+ frag_len
> len
) {
417 BUG_ON(frag
!= last_frag
);
418 frag_len
= len
- offset
;
420 skb_copy_to_linear_data_offset(skb
, offset
,
422 (RX_BUFFER_SIZE
* frag
)),
424 offset
+= RX_BUFFER_SIZE
;
425 bp
->rx_ring
[frag
].addr
&= ~MACB_BIT(RX_USED
);
428 if (frag
== last_frag
)
432 skb
->protocol
= eth_type_trans(skb
, bp
->dev
);
434 bp
->stats
.rx_packets
++;
435 bp
->stats
.rx_bytes
+= len
;
436 dev_dbg(&bp
->pdev
->dev
, "received skb of length %u, csum: %08x\n",
437 skb
->len
, skb
->csum
);
438 netif_receive_skb(skb
);
443 /* Mark DMA descriptors from begin up to and not including end as unused */
444 static void discard_partial_frame(struct macb
*bp
, unsigned int begin
,
449 for (frag
= begin
; frag
!= end
; frag
= NEXT_RX(frag
))
450 bp
->rx_ring
[frag
].addr
&= ~MACB_BIT(RX_USED
);
454 * When this happens, the hardware stats registers for
455 * whatever caused this is updated, so we don't have to record
460 static int macb_rx(struct macb
*bp
, int budget
)
463 unsigned int tail
= bp
->rx_tail
;
466 for (; budget
> 0; tail
= NEXT_RX(tail
)) {
470 addr
= bp
->rx_ring
[tail
].addr
;
471 ctrl
= bp
->rx_ring
[tail
].ctrl
;
473 if (!(addr
& MACB_BIT(RX_USED
)))
476 if (ctrl
& MACB_BIT(RX_SOF
)) {
477 if (first_frag
!= -1)
478 discard_partial_frame(bp
, first_frag
, tail
);
482 if (ctrl
& MACB_BIT(RX_EOF
)) {
484 BUG_ON(first_frag
== -1);
486 dropped
= macb_rx_frame(bp
, first_frag
, tail
);
495 if (first_frag
!= -1)
496 bp
->rx_tail
= first_frag
;
503 static int macb_poll(struct napi_struct
*napi
, int budget
)
505 struct macb
*bp
= container_of(napi
, struct macb
, napi
);
509 status
= macb_readl(bp
, RSR
);
510 macb_writel(bp
, RSR
, status
);
514 dev_dbg(&bp
->pdev
->dev
, "poll: status = %08lx, budget = %d\n",
515 (unsigned long)status
, budget
);
517 work_done
= macb_rx(bp
, budget
);
518 if (work_done
< budget
) {
522 * We've done what we can to clean the buffers. Make sure we
523 * get notified when new packets arrive.
525 macb_writel(bp
, IER
, MACB_RX_INT_FLAGS
);
528 /* TODO: Handle errors */
533 static irqreturn_t
macb_interrupt(int irq
, void *dev_id
)
535 struct net_device
*dev
= dev_id
;
536 struct macb
*bp
= netdev_priv(dev
);
539 status
= macb_readl(bp
, ISR
);
541 if (unlikely(!status
))
544 spin_lock(&bp
->lock
);
547 /* close possible race with dev_close */
548 if (unlikely(!netif_running(dev
))) {
549 macb_writel(bp
, IDR
, ~0UL);
553 if (status
& MACB_RX_INT_FLAGS
) {
555 * There's no point taking any more interrupts
556 * until we have processed the buffers. The
557 * scheduling call may fail if the poll routine
558 * is already scheduled, so disable interrupts
561 macb_writel(bp
, IDR
, MACB_RX_INT_FLAGS
);
563 if (napi_schedule_prep(&bp
->napi
)) {
564 dev_dbg(&bp
->pdev
->dev
,
565 "scheduling RX softirq\n");
566 __napi_schedule(&bp
->napi
);
570 if (status
& (MACB_BIT(TCOMP
) | MACB_BIT(ISR_TUND
) |
575 * Link change detection isn't possible with RMII, so we'll
576 * add that if/when we get our hands on a full-blown MII PHY.
579 if (status
& MACB_BIT(ISR_ROVR
)) {
580 /* We missed at least one packet */
581 bp
->hw_stats
.rx_overruns
++;
584 if (status
& MACB_BIT(HRESP
)) {
586 * TODO: Reset the hardware, and maybe move the printk
587 * to a lower-priority context as well (work queue?)
589 printk(KERN_ERR
"%s: DMA bus error: HRESP not OK\n",
593 status
= macb_readl(bp
, ISR
);
596 spin_unlock(&bp
->lock
);
601 #ifdef CONFIG_NET_POLL_CONTROLLER
603 * Polling receive - used by netconsole and other diagnostic tools
604 * to allow network i/o with interrupts disabled.
606 static void macb_poll_controller(struct net_device
*dev
)
610 local_irq_save(flags
);
611 macb_interrupt(dev
->irq
, dev
);
612 local_irq_restore(flags
);
616 static int macb_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
618 struct macb
*bp
= netdev_priv(dev
);
620 unsigned int len
, entry
;
626 dev_dbg(&bp
->pdev
->dev
,
627 "start_xmit: len %u head %p data %p tail %p end %p\n",
628 skb
->len
, skb
->head
, skb
->data
,
629 skb_tail_pointer(skb
), skb_end_pointer(skb
));
630 dev_dbg(&bp
->pdev
->dev
,
632 for (i
= 0; i
< 16; i
++)
633 printk(" %02x", (unsigned int)skb
->data
[i
]);
638 spin_lock_irqsave(&bp
->lock
, flags
);
640 /* This is a hard error, log it. */
641 if (TX_BUFFS_AVAIL(bp
) < 1) {
642 netif_stop_queue(dev
);
643 spin_unlock_irqrestore(&bp
->lock
, flags
);
644 dev_err(&bp
->pdev
->dev
,
645 "BUG! Tx Ring full when queue awake!\n");
646 dev_dbg(&bp
->pdev
->dev
, "tx_head = %u, tx_tail = %u\n",
647 bp
->tx_head
, bp
->tx_tail
);
648 return NETDEV_TX_BUSY
;
652 dev_dbg(&bp
->pdev
->dev
, "Allocated ring entry %u\n", entry
);
653 mapping
= dma_map_single(&bp
->pdev
->dev
, skb
->data
,
655 bp
->tx_skb
[entry
].skb
= skb
;
656 bp
->tx_skb
[entry
].mapping
= mapping
;
657 dev_dbg(&bp
->pdev
->dev
, "Mapped skb data %p to DMA addr %08lx\n",
658 skb
->data
, (unsigned long)mapping
);
660 ctrl
= MACB_BF(TX_FRMLEN
, len
);
661 ctrl
|= MACB_BIT(TX_LAST
);
662 if (entry
== (TX_RING_SIZE
- 1))
663 ctrl
|= MACB_BIT(TX_WRAP
);
665 bp
->tx_ring
[entry
].addr
= mapping
;
666 bp
->tx_ring
[entry
].ctrl
= ctrl
;
669 entry
= NEXT_TX(entry
);
672 macb_writel(bp
, NCR
, macb_readl(bp
, NCR
) | MACB_BIT(TSTART
));
674 if (TX_BUFFS_AVAIL(bp
) < 1)
675 netif_stop_queue(dev
);
677 spin_unlock_irqrestore(&bp
->lock
, flags
);
682 static void macb_free_consistent(struct macb
*bp
)
689 dma_free_coherent(&bp
->pdev
->dev
, RX_RING_BYTES
,
690 bp
->rx_ring
, bp
->rx_ring_dma
);
694 dma_free_coherent(&bp
->pdev
->dev
, TX_RING_BYTES
,
695 bp
->tx_ring
, bp
->tx_ring_dma
);
698 if (bp
->rx_buffers
) {
699 dma_free_coherent(&bp
->pdev
->dev
,
700 RX_RING_SIZE
* RX_BUFFER_SIZE
,
701 bp
->rx_buffers
, bp
->rx_buffers_dma
);
702 bp
->rx_buffers
= NULL
;
706 static int macb_alloc_consistent(struct macb
*bp
)
710 size
= TX_RING_SIZE
* sizeof(struct ring_info
);
711 bp
->tx_skb
= kmalloc(size
, GFP_KERNEL
);
715 size
= RX_RING_BYTES
;
716 bp
->rx_ring
= dma_alloc_coherent(&bp
->pdev
->dev
, size
,
717 &bp
->rx_ring_dma
, GFP_KERNEL
);
720 dev_dbg(&bp
->pdev
->dev
,
721 "Allocated RX ring of %d bytes at %08lx (mapped %p)\n",
722 size
, (unsigned long)bp
->rx_ring_dma
, bp
->rx_ring
);
724 size
= TX_RING_BYTES
;
725 bp
->tx_ring
= dma_alloc_coherent(&bp
->pdev
->dev
, size
,
726 &bp
->tx_ring_dma
, GFP_KERNEL
);
729 dev_dbg(&bp
->pdev
->dev
,
730 "Allocated TX ring of %d bytes at %08lx (mapped %p)\n",
731 size
, (unsigned long)bp
->tx_ring_dma
, bp
->tx_ring
);
733 size
= RX_RING_SIZE
* RX_BUFFER_SIZE
;
734 bp
->rx_buffers
= dma_alloc_coherent(&bp
->pdev
->dev
, size
,
735 &bp
->rx_buffers_dma
, GFP_KERNEL
);
738 dev_dbg(&bp
->pdev
->dev
,
739 "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n",
740 size
, (unsigned long)bp
->rx_buffers_dma
, bp
->rx_buffers
);
745 macb_free_consistent(bp
);
749 static void macb_init_rings(struct macb
*bp
)
754 addr
= bp
->rx_buffers_dma
;
755 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
756 bp
->rx_ring
[i
].addr
= addr
;
757 bp
->rx_ring
[i
].ctrl
= 0;
758 addr
+= RX_BUFFER_SIZE
;
760 bp
->rx_ring
[RX_RING_SIZE
- 1].addr
|= MACB_BIT(RX_WRAP
);
762 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
763 bp
->tx_ring
[i
].addr
= 0;
764 bp
->tx_ring
[i
].ctrl
= MACB_BIT(TX_USED
);
766 bp
->tx_ring
[TX_RING_SIZE
- 1].ctrl
|= MACB_BIT(TX_WRAP
);
768 bp
->rx_tail
= bp
->tx_head
= bp
->tx_tail
= 0;
771 static void macb_reset_hw(struct macb
*bp
)
773 /* Make sure we have the write buffer for ourselves */
777 * Disable RX and TX (XXX: Should we halt the transmission
780 macb_writel(bp
, NCR
, 0);
782 /* Clear the stats registers (XXX: Update stats first?) */
783 macb_writel(bp
, NCR
, MACB_BIT(CLRSTAT
));
785 /* Clear all status flags */
786 macb_writel(bp
, TSR
, ~0UL);
787 macb_writel(bp
, RSR
, ~0UL);
789 /* Disable all interrupts */
790 macb_writel(bp
, IDR
, ~0UL);
794 static void macb_init_hw(struct macb
*bp
)
799 __macb_set_hwaddr(bp
);
801 config
= macb_readl(bp
, NCFGR
) & MACB_BF(CLK
, -1L);
802 config
|= MACB_BIT(PAE
); /* PAuse Enable */
803 config
|= MACB_BIT(DRFCS
); /* Discard Rx FCS */
804 config
|= MACB_BIT(BIG
); /* Receive oversized frames */
805 if (bp
->dev
->flags
& IFF_PROMISC
)
806 config
|= MACB_BIT(CAF
); /* Copy All Frames */
807 if (!(bp
->dev
->flags
& IFF_BROADCAST
))
808 config
|= MACB_BIT(NBC
); /* No BroadCast */
809 macb_writel(bp
, NCFGR
, config
);
811 /* Initialize TX and RX buffers */
812 macb_writel(bp
, RBQP
, bp
->rx_ring_dma
);
813 macb_writel(bp
, TBQP
, bp
->tx_ring_dma
);
815 /* Enable TX and RX */
816 macb_writel(bp
, NCR
, MACB_BIT(RE
) | MACB_BIT(TE
) | MACB_BIT(MPE
));
818 /* Enable interrupts */
819 macb_writel(bp
, IER
, (MACB_BIT(RCOMP
)
831 * The hash address register is 64 bits long and takes up two
832 * locations in the memory map. The least significant bits are stored
833 * in EMAC_HSL and the most significant bits in EMAC_HSH.
835 * The unicast hash enable and the multicast hash enable bits in the
836 * network configuration register enable the reception of hash matched
837 * frames. The destination address is reduced to a 6 bit index into
838 * the 64 bit hash register using the following hash function. The
839 * hash function is an exclusive or of every sixth bit of the
840 * destination address.
842 * hi[5] = da[5] ^ da[11] ^ da[17] ^ da[23] ^ da[29] ^ da[35] ^ da[41] ^ da[47]
843 * hi[4] = da[4] ^ da[10] ^ da[16] ^ da[22] ^ da[28] ^ da[34] ^ da[40] ^ da[46]
844 * hi[3] = da[3] ^ da[09] ^ da[15] ^ da[21] ^ da[27] ^ da[33] ^ da[39] ^ da[45]
845 * hi[2] = da[2] ^ da[08] ^ da[14] ^ da[20] ^ da[26] ^ da[32] ^ da[38] ^ da[44]
846 * hi[1] = da[1] ^ da[07] ^ da[13] ^ da[19] ^ da[25] ^ da[31] ^ da[37] ^ da[43]
847 * hi[0] = da[0] ^ da[06] ^ da[12] ^ da[18] ^ da[24] ^ da[30] ^ da[36] ^ da[42]
849 * da[0] represents the least significant bit of the first byte
850 * received, that is, the multicast/unicast indicator, and da[47]
851 * represents the most significant bit of the last byte received. If
852 * the hash index, hi[n], points to a bit that is set in the hash
853 * register then the frame will be matched according to whether the
854 * frame is multicast or unicast. A multicast match will be signalled
855 * if the multicast hash enable bit is set, da[0] is 1 and the hash
856 * index points to a bit set in the hash register. A unicast match
857 * will be signalled if the unicast hash enable bit is set, da[0] is 0
858 * and the hash index points to a bit set in the hash register. To
859 * receive all multicast frames, the hash register should be set with
860 * all ones and the multicast hash enable bit should be set in the
861 * network configuration register.
864 static inline int hash_bit_value(int bitnr
, __u8
*addr
)
866 if (addr
[bitnr
/ 8] & (1 << (bitnr
% 8)))
872 * Return the hash index value for the specified address.
874 static int hash_get_index(__u8
*addr
)
879 for (j
= 0; j
< 6; j
++) {
880 for (i
= 0, bitval
= 0; i
< 8; i
++)
881 bitval
^= hash_bit_value(i
*6 + j
, addr
);
883 hash_index
|= (bitval
<< j
);
890 * Add multicast addresses to the internal multicast-hash table.
892 static void macb_sethashtable(struct net_device
*dev
)
894 struct netdev_hw_addr
*ha
;
895 unsigned long mc_filter
[2];
897 struct macb
*bp
= netdev_priv(dev
);
899 mc_filter
[0] = mc_filter
[1] = 0;
901 netdev_for_each_mc_addr(ha
, dev
) {
902 bitnr
= hash_get_index(ha
->addr
);
903 mc_filter
[bitnr
>> 5] |= 1 << (bitnr
& 31);
906 macb_writel(bp
, HRB
, mc_filter
[0]);
907 macb_writel(bp
, HRT
, mc_filter
[1]);
911 * Enable/Disable promiscuous and multicast modes.
913 static void macb_set_rx_mode(struct net_device
*dev
)
916 struct macb
*bp
= netdev_priv(dev
);
918 cfg
= macb_readl(bp
, NCFGR
);
920 if (dev
->flags
& IFF_PROMISC
)
921 /* Enable promiscuous mode */
922 cfg
|= MACB_BIT(CAF
);
923 else if (dev
->flags
& (~IFF_PROMISC
))
924 /* Disable promiscuous mode */
925 cfg
&= ~MACB_BIT(CAF
);
927 if (dev
->flags
& IFF_ALLMULTI
) {
928 /* Enable all multicast mode */
929 macb_writel(bp
, HRB
, -1);
930 macb_writel(bp
, HRT
, -1);
931 cfg
|= MACB_BIT(NCFGR_MTI
);
932 } else if (!netdev_mc_empty(dev
)) {
933 /* Enable specific multicasts */
934 macb_sethashtable(dev
);
935 cfg
|= MACB_BIT(NCFGR_MTI
);
936 } else if (dev
->flags
& (~IFF_ALLMULTI
)) {
937 /* Disable all multicast mode */
938 macb_writel(bp
, HRB
, 0);
939 macb_writel(bp
, HRT
, 0);
940 cfg
&= ~MACB_BIT(NCFGR_MTI
);
943 macb_writel(bp
, NCFGR
, cfg
);
946 static int macb_open(struct net_device
*dev
)
948 struct macb
*bp
= netdev_priv(dev
);
951 dev_dbg(&bp
->pdev
->dev
, "open\n");
953 /* if the phy is not yet register, retry later*/
957 if (!is_valid_ether_addr(dev
->dev_addr
))
958 return -EADDRNOTAVAIL
;
960 err
= macb_alloc_consistent(bp
);
963 "%s: Unable to allocate DMA memory (error %d)\n",
968 napi_enable(&bp
->napi
);
973 /* schedule a link state check */
974 phy_start(bp
->phy_dev
);
976 netif_start_queue(dev
);
981 static int macb_close(struct net_device
*dev
)
983 struct macb
*bp
= netdev_priv(dev
);
986 netif_stop_queue(dev
);
987 napi_disable(&bp
->napi
);
990 phy_stop(bp
->phy_dev
);
992 spin_lock_irqsave(&bp
->lock
, flags
);
994 netif_carrier_off(dev
);
995 spin_unlock_irqrestore(&bp
->lock
, flags
);
997 macb_free_consistent(bp
);
1002 static struct net_device_stats
*macb_get_stats(struct net_device
*dev
)
1004 struct macb
*bp
= netdev_priv(dev
);
1005 struct net_device_stats
*nstat
= &bp
->stats
;
1006 struct macb_stats
*hwstat
= &bp
->hw_stats
;
1008 /* read stats from hardware */
1009 macb_update_stats(bp
);
1011 /* Convert HW stats into netdevice stats */
1012 nstat
->rx_errors
= (hwstat
->rx_fcs_errors
+
1013 hwstat
->rx_align_errors
+
1014 hwstat
->rx_resource_errors
+
1015 hwstat
->rx_overruns
+
1016 hwstat
->rx_oversize_pkts
+
1017 hwstat
->rx_jabbers
+
1018 hwstat
->rx_undersize_pkts
+
1019 hwstat
->sqe_test_errors
+
1020 hwstat
->rx_length_mismatch
);
1021 nstat
->tx_errors
= (hwstat
->tx_late_cols
+
1022 hwstat
->tx_excessive_cols
+
1023 hwstat
->tx_underruns
+
1024 hwstat
->tx_carrier_errors
);
1025 nstat
->collisions
= (hwstat
->tx_single_cols
+
1026 hwstat
->tx_multiple_cols
+
1027 hwstat
->tx_excessive_cols
);
1028 nstat
->rx_length_errors
= (hwstat
->rx_oversize_pkts
+
1029 hwstat
->rx_jabbers
+
1030 hwstat
->rx_undersize_pkts
+
1031 hwstat
->rx_length_mismatch
);
1032 nstat
->rx_over_errors
= hwstat
->rx_resource_errors
+
1033 hwstat
->rx_overruns
;
1034 nstat
->rx_crc_errors
= hwstat
->rx_fcs_errors
;
1035 nstat
->rx_frame_errors
= hwstat
->rx_align_errors
;
1036 nstat
->rx_fifo_errors
= hwstat
->rx_overruns
;
1037 /* XXX: What does "missed" mean? */
1038 nstat
->tx_aborted_errors
= hwstat
->tx_excessive_cols
;
1039 nstat
->tx_carrier_errors
= hwstat
->tx_carrier_errors
;
1040 nstat
->tx_fifo_errors
= hwstat
->tx_underruns
;
1041 /* Don't know about heartbeat or window errors... */
1046 static int macb_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1048 struct macb
*bp
= netdev_priv(dev
);
1049 struct phy_device
*phydev
= bp
->phy_dev
;
1054 return phy_ethtool_gset(phydev
, cmd
);
1057 static int macb_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1059 struct macb
*bp
= netdev_priv(dev
);
1060 struct phy_device
*phydev
= bp
->phy_dev
;
1065 return phy_ethtool_sset(phydev
, cmd
);
1068 static void macb_get_drvinfo(struct net_device
*dev
,
1069 struct ethtool_drvinfo
*info
)
1071 struct macb
*bp
= netdev_priv(dev
);
1073 strcpy(info
->driver
, bp
->pdev
->dev
.driver
->name
);
1074 strcpy(info
->version
, "$Revision: 1.14 $");
1075 strcpy(info
->bus_info
, dev_name(&bp
->pdev
->dev
));
1078 static const struct ethtool_ops macb_ethtool_ops
= {
1079 .get_settings
= macb_get_settings
,
1080 .set_settings
= macb_set_settings
,
1081 .get_drvinfo
= macb_get_drvinfo
,
1082 .get_link
= ethtool_op_get_link
,
1085 static int macb_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
1087 struct macb
*bp
= netdev_priv(dev
);
1088 struct phy_device
*phydev
= bp
->phy_dev
;
1090 if (!netif_running(dev
))
1096 return phy_mii_ioctl(phydev
, rq
, cmd
);
1099 static const struct net_device_ops macb_netdev_ops
= {
1100 .ndo_open
= macb_open
,
1101 .ndo_stop
= macb_close
,
1102 .ndo_start_xmit
= macb_start_xmit
,
1103 .ndo_set_multicast_list
= macb_set_rx_mode
,
1104 .ndo_get_stats
= macb_get_stats
,
1105 .ndo_do_ioctl
= macb_ioctl
,
1106 .ndo_validate_addr
= eth_validate_addr
,
1107 .ndo_change_mtu
= eth_change_mtu
,
1108 .ndo_set_mac_address
= eth_mac_addr
,
1109 #ifdef CONFIG_NET_POLL_CONTROLLER
1110 .ndo_poll_controller
= macb_poll_controller
,
1114 static int __init
macb_probe(struct platform_device
*pdev
)
1116 struct eth_platform_data
*pdata
;
1117 struct resource
*regs
;
1118 struct net_device
*dev
;
1120 struct phy_device
*phydev
;
1121 unsigned long pclk_hz
;
1125 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1127 dev_err(&pdev
->dev
, "no mmio resource defined\n");
1132 dev
= alloc_etherdev(sizeof(*bp
));
1134 dev_err(&pdev
->dev
, "etherdev alloc failed, aborting.\n");
1138 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1140 /* TODO: Actually, we have some interesting features... */
1143 bp
= netdev_priv(dev
);
1147 spin_lock_init(&bp
->lock
);
1149 #if defined(CONFIG_ARCH_AT91)
1150 bp
->pclk
= clk_get(&pdev
->dev
, "macb_clk");
1151 if (IS_ERR(bp
->pclk
)) {
1152 dev_err(&pdev
->dev
, "failed to get macb_clk\n");
1153 goto err_out_free_dev
;
1155 clk_enable(bp
->pclk
);
1157 bp
->pclk
= clk_get(&pdev
->dev
, "pclk");
1158 if (IS_ERR(bp
->pclk
)) {
1159 dev_err(&pdev
->dev
, "failed to get pclk\n");
1160 goto err_out_free_dev
;
1162 bp
->hclk
= clk_get(&pdev
->dev
, "hclk");
1163 if (IS_ERR(bp
->hclk
)) {
1164 dev_err(&pdev
->dev
, "failed to get hclk\n");
1165 goto err_out_put_pclk
;
1168 clk_enable(bp
->pclk
);
1169 clk_enable(bp
->hclk
);
1172 bp
->regs
= ioremap(regs
->start
, regs
->end
- regs
->start
+ 1);
1174 dev_err(&pdev
->dev
, "failed to map registers, aborting.\n");
1176 goto err_out_disable_clocks
;
1179 dev
->irq
= platform_get_irq(pdev
, 0);
1180 err
= request_irq(dev
->irq
, macb_interrupt
, 0, dev
->name
, dev
);
1183 "%s: Unable to request IRQ %d (error %d)\n",
1184 dev
->name
, dev
->irq
, err
);
1185 goto err_out_iounmap
;
1188 dev
->netdev_ops
= &macb_netdev_ops
;
1189 netif_napi_add(dev
, &bp
->napi
, macb_poll
, 64);
1190 dev
->ethtool_ops
= &macb_ethtool_ops
;
1192 dev
->base_addr
= regs
->start
;
1194 /* Set MII management clock divider */
1195 pclk_hz
= clk_get_rate(bp
->pclk
);
1196 if (pclk_hz
<= 20000000)
1197 config
= MACB_BF(CLK
, MACB_CLK_DIV8
);
1198 else if (pclk_hz
<= 40000000)
1199 config
= MACB_BF(CLK
, MACB_CLK_DIV16
);
1200 else if (pclk_hz
<= 80000000)
1201 config
= MACB_BF(CLK
, MACB_CLK_DIV32
);
1203 config
= MACB_BF(CLK
, MACB_CLK_DIV64
);
1204 macb_writel(bp
, NCFGR
, config
);
1206 macb_get_hwaddr(bp
);
1207 pdata
= pdev
->dev
.platform_data
;
1209 if (pdata
&& pdata
->is_rmii
)
1210 #if defined(CONFIG_ARCH_AT91)
1211 macb_writel(bp
, USRIO
, (MACB_BIT(RMII
) | MACB_BIT(CLKEN
)) );
1213 macb_writel(bp
, USRIO
, 0);
1216 #if defined(CONFIG_ARCH_AT91)
1217 macb_writel(bp
, USRIO
, MACB_BIT(CLKEN
));
1219 macb_writel(bp
, USRIO
, MACB_BIT(MII
));
1222 bp
->tx_pending
= DEF_TX_RING_PENDING
;
1224 err
= register_netdev(dev
);
1226 dev_err(&pdev
->dev
, "Cannot register net device, aborting.\n");
1227 goto err_out_free_irq
;
1230 if (macb_mii_init(bp
) != 0) {
1231 goto err_out_unregister_netdev
;
1234 platform_set_drvdata(pdev
, dev
);
1236 printk(KERN_INFO
"%s: Atmel MACB at 0x%08lx irq %d (%pM)\n",
1237 dev
->name
, dev
->base_addr
, dev
->irq
, dev
->dev_addr
);
1239 phydev
= bp
->phy_dev
;
1240 printk(KERN_INFO
"%s: attached PHY driver [%s] "
1241 "(mii_bus:phy_addr=%s, irq=%d)\n", dev
->name
,
1242 phydev
->drv
->name
, dev_name(&phydev
->dev
), phydev
->irq
);
1246 err_out_unregister_netdev
:
1247 unregister_netdev(dev
);
1249 free_irq(dev
->irq
, dev
);
1252 err_out_disable_clocks
:
1253 #ifndef CONFIG_ARCH_AT91
1254 clk_disable(bp
->hclk
);
1257 clk_disable(bp
->pclk
);
1258 #ifndef CONFIG_ARCH_AT91
1265 platform_set_drvdata(pdev
, NULL
);
1269 static int __exit
macb_remove(struct platform_device
*pdev
)
1271 struct net_device
*dev
;
1274 dev
= platform_get_drvdata(pdev
);
1277 bp
= netdev_priv(dev
);
1279 phy_disconnect(bp
->phy_dev
);
1280 mdiobus_unregister(bp
->mii_bus
);
1281 kfree(bp
->mii_bus
->irq
);
1282 mdiobus_free(bp
->mii_bus
);
1283 unregister_netdev(dev
);
1284 free_irq(dev
->irq
, dev
);
1286 #ifndef CONFIG_ARCH_AT91
1287 clk_disable(bp
->hclk
);
1290 clk_disable(bp
->pclk
);
1293 platform_set_drvdata(pdev
, NULL
);
1300 static int macb_suspend(struct platform_device
*pdev
, pm_message_t state
)
1302 struct net_device
*netdev
= platform_get_drvdata(pdev
);
1303 struct macb
*bp
= netdev_priv(netdev
);
1305 netif_device_detach(netdev
);
1307 #ifndef CONFIG_ARCH_AT91
1308 clk_disable(bp
->hclk
);
1310 clk_disable(bp
->pclk
);
1315 static int macb_resume(struct platform_device
*pdev
)
1317 struct net_device
*netdev
= platform_get_drvdata(pdev
);
1318 struct macb
*bp
= netdev_priv(netdev
);
1320 clk_enable(bp
->pclk
);
1321 #ifndef CONFIG_ARCH_AT91
1322 clk_enable(bp
->hclk
);
1325 netif_device_attach(netdev
);
1330 #define macb_suspend NULL
1331 #define macb_resume NULL
1334 static struct platform_driver macb_driver
= {
1335 .remove
= __exit_p(macb_remove
),
1336 .suspend
= macb_suspend
,
1337 .resume
= macb_resume
,
1340 .owner
= THIS_MODULE
,
1344 static int __init
macb_init(void)
1346 return platform_driver_probe(&macb_driver
, macb_probe
);
1349 static void __exit
macb_exit(void)
1351 platform_driver_unregister(&macb_driver
);
1354 module_init(macb_init
);
1355 module_exit(macb_exit
);
1357 MODULE_LICENSE("GPL");
1358 MODULE_DESCRIPTION("Atmel MACB Ethernet driver");
1359 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
1360 MODULE_ALIAS("platform:macb");