ARM: 7409/1: Do not call flush_cache_user_range with mmap_sem held
[linux/fpc-iii.git] / drivers / video / offb.c
blob3251a0236d5639660f47fdca631f98bd5299015c
1 /*
2 * linux/drivers/video/offb.c -- Open Firmware based frame buffer device
4 * Copyright (C) 1997 Geert Uytterhoeven
6 * This driver is partly based on the PowerMac console driver:
8 * Copyright (C) 1996 Paul Mackerras
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive for
12 * more details.
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/errno.h>
18 #include <linux/string.h>
19 #include <linux/mm.h>
20 #include <linux/vmalloc.h>
21 #include <linux/delay.h>
22 #include <linux/of.h>
23 #include <linux/of_address.h>
24 #include <linux/interrupt.h>
25 #include <linux/fb.h>
26 #include <linux/init.h>
27 #include <linux/ioport.h>
28 #include <linux/pci.h>
29 #include <asm/io.h>
31 #ifdef CONFIG_PPC64
32 #include <asm/pci-bridge.h>
33 #endif
35 #ifdef CONFIG_PPC32
36 #include <asm/bootx.h>
37 #endif
39 #include "macmodes.h"
41 /* Supported palette hacks */
42 enum {
43 cmap_unknown,
44 cmap_m64, /* ATI Mach64 */
45 cmap_r128, /* ATI Rage128 */
46 cmap_M3A, /* ATI Rage Mobility M3 Head A */
47 cmap_M3B, /* ATI Rage Mobility M3 Head B */
48 cmap_radeon, /* ATI Radeon */
49 cmap_gxt2000, /* IBM GXT2000 */
50 cmap_avivo, /* ATI R5xx */
53 struct offb_par {
54 volatile void __iomem *cmap_adr;
55 volatile void __iomem *cmap_data;
56 int cmap_type;
57 int blanked;
60 struct offb_par default_par;
62 #ifdef CONFIG_PPC32
63 extern boot_infos_t *boot_infos;
64 #endif
66 /* Definitions used by the Avivo palette hack */
67 #define AVIVO_DC_LUT_RW_SELECT 0x6480
68 #define AVIVO_DC_LUT_RW_MODE 0x6484
69 #define AVIVO_DC_LUT_RW_INDEX 0x6488
70 #define AVIVO_DC_LUT_SEQ_COLOR 0x648c
71 #define AVIVO_DC_LUT_PWL_DATA 0x6490
72 #define AVIVO_DC_LUT_30_COLOR 0x6494
73 #define AVIVO_DC_LUT_READ_PIPE_SELECT 0x6498
74 #define AVIVO_DC_LUT_WRITE_EN_MASK 0x649c
75 #define AVIVO_DC_LUT_AUTOFILL 0x64a0
77 #define AVIVO_DC_LUTA_CONTROL 0x64c0
78 #define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE 0x64c4
79 #define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN 0x64c8
80 #define AVIVO_DC_LUTA_BLACK_OFFSET_RED 0x64cc
81 #define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE 0x64d0
82 #define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN 0x64d4
83 #define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8
85 #define AVIVO_DC_LUTB_CONTROL 0x6cc0
86 #define AVIVO_DC_LUTB_BLACK_OFFSET_BLUE 0x6cc4
87 #define AVIVO_DC_LUTB_BLACK_OFFSET_GREEN 0x6cc8
88 #define AVIVO_DC_LUTB_BLACK_OFFSET_RED 0x6ccc
89 #define AVIVO_DC_LUTB_WHITE_OFFSET_BLUE 0x6cd0
90 #define AVIVO_DC_LUTB_WHITE_OFFSET_GREEN 0x6cd4
91 #define AVIVO_DC_LUTB_WHITE_OFFSET_RED 0x6cd8
94 * Set a single color register. The values supplied are already
95 * rounded down to the hardware's capabilities (according to the
96 * entries in the var structure). Return != 0 for invalid regno.
99 static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
100 u_int transp, struct fb_info *info)
102 struct offb_par *par = (struct offb_par *) info->par;
104 if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
105 u32 *pal = info->pseudo_palette;
106 u32 cr = red >> (16 - info->var.red.length);
107 u32 cg = green >> (16 - info->var.green.length);
108 u32 cb = blue >> (16 - info->var.blue.length);
109 u32 value;
111 if (regno >= 16)
112 return -EINVAL;
114 value = (cr << info->var.red.offset) |
115 (cg << info->var.green.offset) |
116 (cb << info->var.blue.offset);
117 if (info->var.transp.length > 0) {
118 u32 mask = (1 << info->var.transp.length) - 1;
119 mask <<= info->var.transp.offset;
120 value |= mask;
122 pal[regno] = value;
123 return 0;
126 if (regno > 255)
127 return -EINVAL;
129 red >>= 8;
130 green >>= 8;
131 blue >>= 8;
133 if (!par->cmap_adr)
134 return 0;
136 switch (par->cmap_type) {
137 case cmap_m64:
138 writeb(regno, par->cmap_adr);
139 writeb(red, par->cmap_data);
140 writeb(green, par->cmap_data);
141 writeb(blue, par->cmap_data);
142 break;
143 case cmap_M3A:
144 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
145 out_le32(par->cmap_adr + 0x58,
146 in_le32(par->cmap_adr + 0x58) & ~0x20);
147 case cmap_r128:
148 /* Set palette index & data */
149 out_8(par->cmap_adr + 0xb0, regno);
150 out_le32(par->cmap_adr + 0xb4,
151 (red << 16 | green << 8 | blue));
152 break;
153 case cmap_M3B:
154 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
155 out_le32(par->cmap_adr + 0x58,
156 in_le32(par->cmap_adr + 0x58) | 0x20);
157 /* Set palette index & data */
158 out_8(par->cmap_adr + 0xb0, regno);
159 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
160 break;
161 case cmap_radeon:
162 /* Set palette index & data (could be smarter) */
163 out_8(par->cmap_adr + 0xb0, regno);
164 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
165 break;
166 case cmap_gxt2000:
167 out_le32(((unsigned __iomem *) par->cmap_adr) + regno,
168 (red << 16 | green << 8 | blue));
169 break;
170 case cmap_avivo:
171 /* Write to both LUTs for now */
172 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
173 writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
174 writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
175 par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
176 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
177 writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
178 writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
179 par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
180 break;
183 return 0;
187 * Blank the display.
190 static int offb_blank(int blank, struct fb_info *info)
192 struct offb_par *par = (struct offb_par *) info->par;
193 int i, j;
195 if (!par->cmap_adr)
196 return 0;
198 if (!par->blanked)
199 if (!blank)
200 return 0;
202 par->blanked = blank;
204 if (blank)
205 for (i = 0; i < 256; i++) {
206 switch (par->cmap_type) {
207 case cmap_m64:
208 writeb(i, par->cmap_adr);
209 for (j = 0; j < 3; j++)
210 writeb(0, par->cmap_data);
211 break;
212 case cmap_M3A:
213 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
214 out_le32(par->cmap_adr + 0x58,
215 in_le32(par->cmap_adr + 0x58) & ~0x20);
216 case cmap_r128:
217 /* Set palette index & data */
218 out_8(par->cmap_adr + 0xb0, i);
219 out_le32(par->cmap_adr + 0xb4, 0);
220 break;
221 case cmap_M3B:
222 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
223 out_le32(par->cmap_adr + 0x58,
224 in_le32(par->cmap_adr + 0x58) | 0x20);
225 /* Set palette index & data */
226 out_8(par->cmap_adr + 0xb0, i);
227 out_le32(par->cmap_adr + 0xb4, 0);
228 break;
229 case cmap_radeon:
230 out_8(par->cmap_adr + 0xb0, i);
231 out_le32(par->cmap_adr + 0xb4, 0);
232 break;
233 case cmap_gxt2000:
234 out_le32(((unsigned __iomem *) par->cmap_adr) + i,
236 break;
237 case cmap_avivo:
238 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
239 writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
240 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
241 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
242 writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
243 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
244 break;
246 } else
247 fb_set_cmap(&info->cmap, info);
248 return 0;
251 static int offb_set_par(struct fb_info *info)
253 struct offb_par *par = (struct offb_par *) info->par;
255 /* On avivo, initialize palette control */
256 if (par->cmap_type == cmap_avivo) {
257 writel(0, par->cmap_adr + AVIVO_DC_LUTA_CONTROL);
258 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_BLUE);
259 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_GREEN);
260 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_RED);
261 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_BLUE);
262 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_GREEN);
263 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_RED);
264 writel(0, par->cmap_adr + AVIVO_DC_LUTB_CONTROL);
265 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_BLUE);
266 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_GREEN);
267 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_RED);
268 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_BLUE);
269 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_GREEN);
270 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_RED);
271 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
272 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
273 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
274 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
275 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
276 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
278 return 0;
281 static void offb_destroy(struct fb_info *info)
283 if (info->screen_base)
284 iounmap(info->screen_base);
285 release_mem_region(info->apertures->ranges[0].base, info->apertures->ranges[0].size);
286 framebuffer_release(info);
289 static struct fb_ops offb_ops = {
290 .owner = THIS_MODULE,
291 .fb_destroy = offb_destroy,
292 .fb_setcolreg = offb_setcolreg,
293 .fb_set_par = offb_set_par,
294 .fb_blank = offb_blank,
295 .fb_fillrect = cfb_fillrect,
296 .fb_copyarea = cfb_copyarea,
297 .fb_imageblit = cfb_imageblit,
300 static void __iomem *offb_map_reg(struct device_node *np, int index,
301 unsigned long offset, unsigned long size)
303 const u32 *addrp;
304 u64 asize, taddr;
305 unsigned int flags;
307 addrp = of_get_pci_address(np, index, &asize, &flags);
308 if (addrp == NULL)
309 addrp = of_get_address(np, index, &asize, &flags);
310 if (addrp == NULL)
311 return NULL;
312 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
313 return NULL;
314 if ((offset + size) > asize)
315 return NULL;
316 taddr = of_translate_address(np, addrp);
317 if (taddr == OF_BAD_ADDR)
318 return NULL;
319 return ioremap(taddr + offset, size);
322 static void offb_init_palette_hacks(struct fb_info *info, struct device_node *dp,
323 const char *name, unsigned long address)
325 struct offb_par *par = (struct offb_par *) info->par;
327 if (dp && !strncmp(name, "ATY,Rage128", 11)) {
328 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
329 if (par->cmap_adr)
330 par->cmap_type = cmap_r128;
331 } else if (dp && (!strncmp(name, "ATY,RageM3pA", 12)
332 || !strncmp(name, "ATY,RageM3p12A", 14))) {
333 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
334 if (par->cmap_adr)
335 par->cmap_type = cmap_M3A;
336 } else if (dp && !strncmp(name, "ATY,RageM3pB", 12)) {
337 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
338 if (par->cmap_adr)
339 par->cmap_type = cmap_M3B;
340 } else if (dp && !strncmp(name, "ATY,Rage6", 9)) {
341 par->cmap_adr = offb_map_reg(dp, 1, 0, 0x1fff);
342 if (par->cmap_adr)
343 par->cmap_type = cmap_radeon;
344 } else if (!strncmp(name, "ATY,", 4)) {
345 unsigned long base = address & 0xff000000UL;
346 par->cmap_adr =
347 ioremap(base + 0x7ff000, 0x1000) + 0xcc0;
348 par->cmap_data = par->cmap_adr + 1;
349 par->cmap_type = cmap_m64;
350 } else if (dp && (of_device_is_compatible(dp, "pci1014,b7") ||
351 of_device_is_compatible(dp, "pci1014,21c"))) {
352 par->cmap_adr = offb_map_reg(dp, 0, 0x6000, 0x1000);
353 if (par->cmap_adr)
354 par->cmap_type = cmap_gxt2000;
355 } else if (dp && !strncmp(name, "vga,Display-", 12)) {
356 /* Look for AVIVO initialized by SLOF */
357 struct device_node *pciparent = of_get_parent(dp);
358 const u32 *vid, *did;
359 vid = of_get_property(pciparent, "vendor-id", NULL);
360 did = of_get_property(pciparent, "device-id", NULL);
361 /* This will match most R5xx */
362 if (vid && did && *vid == 0x1002 &&
363 ((*did >= 0x7100 && *did < 0x7800) ||
364 (*did >= 0x9400))) {
365 par->cmap_adr = offb_map_reg(pciparent, 2, 0, 0x10000);
366 if (par->cmap_adr)
367 par->cmap_type = cmap_avivo;
369 of_node_put(pciparent);
371 info->fix.visual = (par->cmap_type != cmap_unknown) ?
372 FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_STATIC_PSEUDOCOLOR;
375 static void __init offb_init_fb(const char *name, const char *full_name,
376 int width, int height, int depth,
377 int pitch, unsigned long address,
378 int foreign_endian, struct device_node *dp)
380 unsigned long res_size = pitch * height;
381 struct offb_par *par = &default_par;
382 unsigned long res_start = address;
383 struct fb_fix_screeninfo *fix;
384 struct fb_var_screeninfo *var;
385 struct fb_info *info;
387 if (!request_mem_region(res_start, res_size, "offb"))
388 return;
390 printk(KERN_INFO
391 "Using unsupported %dx%d %s at %lx, depth=%d, pitch=%d\n",
392 width, height, name, address, depth, pitch);
393 if (depth != 8 && depth != 15 && depth != 16 && depth != 32) {
394 printk(KERN_ERR "%s: can't use depth = %d\n", full_name,
395 depth);
396 release_mem_region(res_start, res_size);
397 return;
400 info = framebuffer_alloc(sizeof(u32) * 16, NULL);
402 if (info == 0) {
403 release_mem_region(res_start, res_size);
404 return;
407 fix = &info->fix;
408 var = &info->var;
409 info->par = par;
411 strcpy(fix->id, "OFfb ");
412 strncat(fix->id, name, sizeof(fix->id) - sizeof("OFfb "));
413 fix->id[sizeof(fix->id) - 1] = '\0';
415 var->xres = var->xres_virtual = width;
416 var->yres = var->yres_virtual = height;
417 fix->line_length = pitch;
419 fix->smem_start = address;
420 fix->smem_len = pitch * height;
421 fix->type = FB_TYPE_PACKED_PIXELS;
422 fix->type_aux = 0;
424 par->cmap_type = cmap_unknown;
425 if (depth == 8)
426 offb_init_palette_hacks(info, dp, name, address);
427 else
428 fix->visual = FB_VISUAL_TRUECOLOR;
430 var->xoffset = var->yoffset = 0;
431 switch (depth) {
432 case 8:
433 var->bits_per_pixel = 8;
434 var->red.offset = 0;
435 var->red.length = 8;
436 var->green.offset = 0;
437 var->green.length = 8;
438 var->blue.offset = 0;
439 var->blue.length = 8;
440 var->transp.offset = 0;
441 var->transp.length = 0;
442 break;
443 case 15: /* RGB 555 */
444 var->bits_per_pixel = 16;
445 var->red.offset = 10;
446 var->red.length = 5;
447 var->green.offset = 5;
448 var->green.length = 5;
449 var->blue.offset = 0;
450 var->blue.length = 5;
451 var->transp.offset = 0;
452 var->transp.length = 0;
453 break;
454 case 16: /* RGB 565 */
455 var->bits_per_pixel = 16;
456 var->red.offset = 11;
457 var->red.length = 5;
458 var->green.offset = 5;
459 var->green.length = 6;
460 var->blue.offset = 0;
461 var->blue.length = 5;
462 var->transp.offset = 0;
463 var->transp.length = 0;
464 break;
465 case 32: /* RGB 888 */
466 var->bits_per_pixel = 32;
467 var->red.offset = 16;
468 var->red.length = 8;
469 var->green.offset = 8;
470 var->green.length = 8;
471 var->blue.offset = 0;
472 var->blue.length = 8;
473 var->transp.offset = 24;
474 var->transp.length = 8;
475 break;
477 var->red.msb_right = var->green.msb_right = var->blue.msb_right =
478 var->transp.msb_right = 0;
479 var->grayscale = 0;
480 var->nonstd = 0;
481 var->activate = 0;
482 var->height = var->width = -1;
483 var->pixclock = 10000;
484 var->left_margin = var->right_margin = 16;
485 var->upper_margin = var->lower_margin = 16;
486 var->hsync_len = var->vsync_len = 8;
487 var->sync = 0;
488 var->vmode = FB_VMODE_NONINTERLACED;
490 /* set offb aperture size for generic probing */
491 info->apertures = alloc_apertures(1);
492 if (!info->apertures)
493 goto out_aper;
494 info->apertures->ranges[0].base = address;
495 info->apertures->ranges[0].size = fix->smem_len;
497 info->fbops = &offb_ops;
498 info->screen_base = ioremap(address, fix->smem_len);
499 info->pseudo_palette = (void *) (info + 1);
500 info->flags = FBINFO_DEFAULT | FBINFO_MISC_FIRMWARE | foreign_endian;
502 fb_alloc_cmap(&info->cmap, 256, 0);
504 if (register_framebuffer(info) < 0)
505 goto out_err;
507 printk(KERN_INFO "fb%d: Open Firmware frame buffer device on %s\n",
508 info->node, full_name);
509 return;
511 out_err:
512 iounmap(info->screen_base);
513 out_aper:
514 iounmap(par->cmap_adr);
515 par->cmap_adr = NULL;
516 framebuffer_release(info);
517 release_mem_region(res_start, res_size);
521 static void __init offb_init_nodriver(struct device_node *dp, int no_real_node)
523 unsigned int len;
524 int i, width = 640, height = 480, depth = 8, pitch = 640;
525 unsigned int flags, rsize, addr_prop = 0;
526 unsigned long max_size = 0;
527 u64 rstart, address = OF_BAD_ADDR;
528 const u32 *pp, *addrp, *up;
529 u64 asize;
530 int foreign_endian = 0;
532 #ifdef __BIG_ENDIAN
533 if (of_get_property(dp, "little-endian", NULL))
534 foreign_endian = FBINFO_FOREIGN_ENDIAN;
535 #else
536 if (of_get_property(dp, "big-endian", NULL))
537 foreign_endian = FBINFO_FOREIGN_ENDIAN;
538 #endif
540 pp = of_get_property(dp, "linux,bootx-depth", &len);
541 if (pp == NULL)
542 pp = of_get_property(dp, "depth", &len);
543 if (pp && len == sizeof(u32))
544 depth = *pp;
546 pp = of_get_property(dp, "linux,bootx-width", &len);
547 if (pp == NULL)
548 pp = of_get_property(dp, "width", &len);
549 if (pp && len == sizeof(u32))
550 width = *pp;
552 pp = of_get_property(dp, "linux,bootx-height", &len);
553 if (pp == NULL)
554 pp = of_get_property(dp, "height", &len);
555 if (pp && len == sizeof(u32))
556 height = *pp;
558 pp = of_get_property(dp, "linux,bootx-linebytes", &len);
559 if (pp == NULL)
560 pp = of_get_property(dp, "linebytes", &len);
561 if (pp && len == sizeof(u32) && (*pp != 0xffffffffu))
562 pitch = *pp;
563 else
564 pitch = width * ((depth + 7) / 8);
566 rsize = (unsigned long)pitch * (unsigned long)height;
568 /* Ok, now we try to figure out the address of the framebuffer.
570 * Unfortunately, Open Firmware doesn't provide a standard way to do
571 * so. All we can do is a dodgy heuristic that happens to work in
572 * practice. On most machines, the "address" property contains what
573 * we need, though not on Matrox cards found in IBM machines. What I've
574 * found that appears to give good results is to go through the PCI
575 * ranges and pick one that is both big enough and if possible encloses
576 * the "address" property. If none match, we pick the biggest
578 up = of_get_property(dp, "linux,bootx-addr", &len);
579 if (up == NULL)
580 up = of_get_property(dp, "address", &len);
581 if (up && len == sizeof(u32))
582 addr_prop = *up;
584 /* Hack for when BootX is passing us */
585 if (no_real_node)
586 goto skip_addr;
588 for (i = 0; (addrp = of_get_address(dp, i, &asize, &flags))
589 != NULL; i++) {
590 int match_addrp = 0;
592 if (!(flags & IORESOURCE_MEM))
593 continue;
594 if (asize < rsize)
595 continue;
596 rstart = of_translate_address(dp, addrp);
597 if (rstart == OF_BAD_ADDR)
598 continue;
599 if (addr_prop && (rstart <= addr_prop) &&
600 ((rstart + asize) >= (addr_prop + rsize)))
601 match_addrp = 1;
602 if (match_addrp) {
603 address = addr_prop;
604 break;
606 if (rsize > max_size) {
607 max_size = rsize;
608 address = OF_BAD_ADDR;
611 if (address == OF_BAD_ADDR)
612 address = rstart;
614 skip_addr:
615 if (address == OF_BAD_ADDR && addr_prop)
616 address = (u64)addr_prop;
617 if (address != OF_BAD_ADDR) {
618 /* kludge for valkyrie */
619 if (strcmp(dp->name, "valkyrie") == 0)
620 address += 0x1000;
621 offb_init_fb(no_real_node ? "bootx" : dp->name,
622 no_real_node ? "display" : dp->full_name,
623 width, height, depth, pitch, address,
624 foreign_endian, no_real_node ? NULL : dp);
628 static int __init offb_init(void)
630 struct device_node *dp = NULL, *boot_disp = NULL;
632 if (fb_get_options("offb", NULL))
633 return -ENODEV;
635 /* Check if we have a MacOS display without a node spec */
636 if (of_get_property(of_chosen, "linux,bootx-noscreen", NULL) != NULL) {
637 /* The old code tried to work out which node was the MacOS
638 * display based on the address. I'm dropping that since the
639 * lack of a node spec only happens with old BootX versions
640 * (users can update) and with this code, they'll still get
641 * a display (just not the palette hacks).
643 offb_init_nodriver(of_chosen, 1);
646 for (dp = NULL; (dp = of_find_node_by_type(dp, "display"));) {
647 if (of_get_property(dp, "linux,opened", NULL) &&
648 of_get_property(dp, "linux,boot-display", NULL)) {
649 boot_disp = dp;
650 offb_init_nodriver(dp, 0);
653 for (dp = NULL; (dp = of_find_node_by_type(dp, "display"));) {
654 if (of_get_property(dp, "linux,opened", NULL) &&
655 dp != boot_disp)
656 offb_init_nodriver(dp, 0);
659 return 0;
663 module_init(offb_init);
664 MODULE_LICENSE("GPL");