drivers/watchdog/it87_wdt.c

   1 /*
   2  *      Watchdog Timer Driver
   3  *         for ITE IT87xx Environment Control - Low Pin Count Input / Output
   4  *
   5  *      (c) Copyright 2007  Oliver Schuster <olivers137@aol.com>
   6  *
   7  *      Based on softdog.c      by Alan Cox,
   8  *               83977f_wdt.c   by Jose Goncalves,
   9  *               it87.c         by Chris Gauthron, Jean Delvare
  10  *
  11  *      Data-sheets: Publicly available at the ITE website
  12  *                  http://www.ite.com.tw/
  13  *
  14  *      Support of the watchdog timers, which are available on
  15  *      IT8702, IT8712, IT8716, IT8718, IT8720, IT8721 and IT8726.
  16  *
  17  *      This program is free software; you can redistribute it and/or
  18  *      modify it under the terms of the GNU General Public License
  19  *      as published by the Free Software Foundation; either version
  20  *      2 of the License, or (at your option) any later version.
  21  *
  22  *      This program is distributed in the hope that it will be useful,
  23  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  *      GNU General Public License for more details.
  26  *
  27  *      You should have received a copy of the GNU General Public License
  28  *      along with this program; if not, write to the Free Software
  29  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  30  */
  31
  32 #include <linux/module.h>
  33 #include <linux/moduleparam.h>
  34 #include <linux/types.h>
  35 #include <linux/kernel.h>
  36 #include <linux/fs.h>
  37 #include <linux/miscdevice.h>
  38 #include <linux/init.h>
  39 #include <linux/ioport.h>
  40 #include <linux/watchdog.h>
  41 #include <linux/notifier.h>
  42 #include <linux/reboot.h>
  43 #include <linux/uaccess.h>
  44 #include <linux/io.h>
  45
  46 #include <asm/system.h>
  47
  48 #define WATCHDOG_VERSION        "1.14"
  49 #define WATCHDOG_NAME           "IT87 WDT"
  50 #define PFX                     WATCHDOG_NAME ": "
  51 #define DRIVER_VERSION          WATCHDOG_NAME " driver, v" WATCHDOG_VERSION "\n"
  52 #define WD_MAGIC                'V'
  53
  54 /* Defaults for Module Parameter */
  55 #define DEFAULT_NOGAMEPORT      0
  56 #define DEFAULT_EXCLUSIVE       1
  57 #define DEFAULT_TIMEOUT         60
  58 #define DEFAULT_TESTMODE        0
  59 #define DEFAULT_NOWAYOUT        WATCHDOG_NOWAYOUT
  60
  61 /* IO Ports */
  62 #define REG             0x2e
  63 #define VAL             0x2f
  64
  65 /* Logical device Numbers LDN */
  66 #define GPIO            0x07
  67 #define GAMEPORT        0x09
  68 #define CIR             0x0a
  69
  70 /* Configuration Registers and Functions */
  71 #define LDNREG          0x07
  72 #define CHIPID          0x20
  73 #define CHIPREV         0x22
  74 #define ACTREG          0x30
  75 #define BASEREG         0x60
  76
  77 /* Chip Id numbers */
  78 #define NO_DEV_ID       0xffff
  79 #define IT8702_ID       0x8702
  80 #define IT8705_ID       0x8705
  81 #define IT8712_ID       0x8712
  82 #define IT8716_ID       0x8716
  83 #define IT8718_ID       0x8718
  84 #define IT8720_ID       0x8720
  85 #define IT8721_ID       0x8721
  86 #define IT8726_ID       0x8726  /* the data sheet suggest wrongly 0x8716 */
  87
  88 /* GPIO Configuration Registers LDN=0x07 */
  89 #define WDTCTRL         0x71
  90 #define WDTCFG          0x72
  91 #define WDTVALLSB       0x73
  92 #define WDTVALMSB       0x74
  93
  94 /* GPIO Bits WDTCTRL */
  95 #define WDT_CIRINT      0x80
  96 #define WDT_MOUSEINT    0x40
  97 #define WDT_KYBINT      0x20
  98 #define WDT_GAMEPORT    0x10 /* not in it8718, it8720, it8721 */
  99 #define WDT_FORCE       0x02
 100 #define WDT_ZERO        0x01
 101
 102 /* GPIO Bits WDTCFG */
 103 #define WDT_TOV1        0x80
 104 #define WDT_KRST        0x40
 105 #define WDT_TOVE        0x20
 106 #define WDT_PWROK       0x10 /* not in it8721 */
 107 #define WDT_INT_MASK    0x0f
 108
 109 /* CIR Configuration Register LDN=0x0a */
 110 #define CIR_ILS         0x70
 111
 112 /* The default Base address is not always available, we use this */
 113 #define CIR_BASE        0x0208
 114
 115 /* CIR Controller */
 116 #define CIR_DR(b)       (b)
 117 #define CIR_IER(b)      (b + 1)
 118 #define CIR_RCR(b)      (b + 2)
 119 #define CIR_TCR1(b)     (b + 3)
 120 #define CIR_TCR2(b)     (b + 4)
 121 #define CIR_TSR(b)      (b + 5)
 122 #define CIR_RSR(b)      (b + 6)
 123 #define CIR_BDLR(b)     (b + 5)
 124 #define CIR_BDHR(b)     (b + 6)
 125 #define CIR_IIR(b)      (b + 7)
 126
 127 /* Default Base address of Game port */
 128 #define GP_BASE_DEFAULT 0x0201
 129
 130 /* wdt_status */
 131 #define WDTS_TIMER_RUN  0
 132 #define WDTS_DEV_OPEN   1
 133 #define WDTS_KEEPALIVE  2
 134 #define WDTS_LOCKED     3
 135 #define WDTS_USE_GP     4
 136 #define WDTS_EXPECTED   5
 137
 138 static  unsigned int base, gpact, ciract, max_units, chip_type;
 139 static  unsigned long wdt_status;
 140 static  DEFINE_SPINLOCK(spinlock);
 141
 142 static  int nogameport = DEFAULT_NOGAMEPORT;
 143 static  int exclusive  = DEFAULT_EXCLUSIVE;
 144 static  int timeout    = DEFAULT_TIMEOUT;
 145 static  int testmode   = DEFAULT_TESTMODE;
 146 static  int nowayout   = DEFAULT_NOWAYOUT;
 147
 148 module_param(nogameport, int, 0);
 149 MODULE_PARM_DESC(nogameport, "Forbid the activation of game port, default="
 150                 __MODULE_STRING(DEFAULT_NOGAMEPORT));
 151 module_param(exclusive, int, 0);
 152 MODULE_PARM_DESC(exclusive, "Watchdog exclusive device open, default="
 153                 __MODULE_STRING(DEFAULT_EXCLUSIVE));
 154 module_param(timeout, int, 0);
 155 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, default="
 156                 __MODULE_STRING(DEFAULT_TIMEOUT));
 157 module_param(testmode, int, 0);
 158 MODULE_PARM_DESC(testmode, "Watchdog test mode (1 = no reboot), default="
 159                 __MODULE_STRING(DEFAULT_TESTMODE));
 160 module_param(nowayout, int, 0);
 161 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started, default="
 162                 __MODULE_STRING(WATCHDOG_NOWAYOUT));
 163
 164 /* Superio Chip */
 165
 166 static inline void superio_enter(void)
 167 {
 168         outb(0x87, REG);
 169         outb(0x01, REG);
 170         outb(0x55, REG);
 171         outb(0x55, REG);
 172 }
 173
 174 static inline void superio_exit(void)
 175 {
 176         outb(0x02, REG);
 177         outb(0x02, VAL);
 178 }
 179
 180 static inline void superio_select(int ldn)
 181 {
 182         outb(LDNREG, REG);
 183         outb(ldn, VAL);
 184 }
 185
 186 static inline int superio_inb(int reg)
 187 {
 188         outb(reg, REG);
 189         return inb(VAL);
 190 }
 191
 192 static inline void superio_outb(int val, int reg)
 193 {
 194         outb(reg, REG);
 195         outb(val, VAL);
 196 }
 197
 198 static inline int superio_inw(int reg)
 199 {
 200         int val;
 201         outb(reg++, REG);
 202         val = inb(VAL) << 8;
 203         outb(reg, REG);
 204         val |= inb(VAL);
 205         return val;
 206 }
 207
 208 static inline void superio_outw(int val, int reg)
 209 {
 210         outb(reg++, REG);
 211         outb(val >> 8, VAL);
 212         outb(reg, REG);
 213         outb(val, VAL);
 214 }
 215
 216 /* Internal function, should be called after superio_select(GPIO) */
 217 static void wdt_update_timeout(void)
 218 {
 219         unsigned char cfg = WDT_KRST;
 220         int tm = timeout;
 221
 222         if (testmode)
 223                 cfg = 0;
 224
 225         if (tm <= max_units)
 226                 cfg |= WDT_TOV1;
 227         else
 228                 tm /= 60;
 229
 230         if (chip_type != IT8721_ID)
 231                 cfg |= WDT_PWROK;
 232
 233         superio_outb(cfg, WDTCFG);
 234         superio_outb(tm, WDTVALLSB);
 235         if (max_units > 255)
 236                 superio_outb(tm>>8, WDTVALMSB);
 237 }
 238
 239 static int wdt_round_time(int t)
 240 {
 241         t += 59;
 242         t -= t % 60;
 243         return t;
 244 }
 245
 246 /* watchdog timer handling */
 247
 248 static void wdt_keepalive(void)
 249 {
 250         if (test_bit(WDTS_USE_GP, &wdt_status))
 251                 inb(base);
 252         else
 253                 /* The timer reloads with around 5 msec delay */
 254                 outb(0x55, CIR_DR(base));
 255         set_bit(WDTS_KEEPALIVE, &wdt_status);
 256 }
 257
 258 static void wdt_start(void)
 259 {
 260         unsigned long flags;
 261
 262         spin_lock_irqsave(&spinlock, flags);
 263         superio_enter();
 264
 265         superio_select(GPIO);
 266         if (test_bit(WDTS_USE_GP, &wdt_status))
 267                 superio_outb(WDT_GAMEPORT, WDTCTRL);
 268         else
 269                 superio_outb(WDT_CIRINT, WDTCTRL);
 270         wdt_update_timeout();
 271
 272         superio_exit();
 273         spin_unlock_irqrestore(&spinlock, flags);
 274 }
 275
 276 static void wdt_stop(void)
 277 {
 278         unsigned long flags;
 279
 280         spin_lock_irqsave(&spinlock, flags);
 281         superio_enter();
 282
 283         superio_select(GPIO);
 284         superio_outb(0x00, WDTCTRL);
 285         superio_outb(WDT_TOV1, WDTCFG);
 286         superio_outb(0x00, WDTVALLSB);
 287         if (max_units > 255)
 288                 superio_outb(0x00, WDTVALMSB);
 289
 290         superio_exit();
 291         spin_unlock_irqrestore(&spinlock, flags);
 292 }
 293
 294 /**
 295  *      wdt_set_timeout - set a new timeout value with watchdog ioctl
 296  *      @t: timeout value in seconds
 297  *
 298  *      The hardware device has a 8 or 16 bit watchdog timer (depends on
 299  *      chip version) that can be configured to count seconds or minutes.
 300  *
 301  *      Used within WDIOC_SETTIMEOUT watchdog device ioctl.
 302  */
 303
 304 static int wdt_set_timeout(int t)
 305 {
 306         unsigned long flags;
 307
 308         if (t < 1 || t > max_units * 60)
 309                 return -EINVAL;
 310
 311         if (t > max_units)
 312                 timeout = wdt_round_time(t);
 313         else
 314                 timeout = t;
 315
 316         spin_lock_irqsave(&spinlock, flags);
 317         if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
 318                 superio_enter();
 319                 superio_select(GPIO);
 320                 wdt_update_timeout();
 321                 superio_exit();
 322         }
 323         spin_unlock_irqrestore(&spinlock, flags);
 324         return 0;
 325 }
 326
 327 /**
 328  *      wdt_get_status - determines the status supported by watchdog ioctl
 329  *      @status: status returned to user space
 330  *
 331  *      The status bit of the device does not allow to distinguish
 332  *      between a regular system reset and a watchdog forced reset.
 333  *      But, in test mode it is useful, so it is supported through
 334  *      WDIOC_GETSTATUS watchdog ioctl. Additionally the driver
 335  *      reports the keepalive signal and the acception of the magic.
 336  *
 337  *      Used within WDIOC_GETSTATUS watchdog device ioctl.
 338  */
 339
 340 static int wdt_get_status(int *status)
 341 {
 342         unsigned long flags;
 343
 344         *status = 0;
 345         if (testmode) {
 346                 spin_lock_irqsave(&spinlock, flags);
 347                 superio_enter();
 348                 superio_select(GPIO);
 349                 if (superio_inb(WDTCTRL) & WDT_ZERO) {
 350                         superio_outb(0x00, WDTCTRL);
 351                         clear_bit(WDTS_TIMER_RUN, &wdt_status);
 352                         *status |= WDIOF_CARDRESET;
 353                 }
 354
 355                 superio_exit();
 356                 spin_unlock_irqrestore(&spinlock, flags);
 357         }
 358         if (test_and_clear_bit(WDTS_KEEPALIVE, &wdt_status))
 359                 *status |= WDIOF_KEEPALIVEPING;
 360         if (test_bit(WDTS_EXPECTED, &wdt_status))
 361                 *status |= WDIOF_MAGICCLOSE;
 362         return 0;
 363 }
 364
 365 /* /dev/watchdog handling */
 366
 367 /**
 368  *      wdt_open - watchdog file_operations .open
 369  *      @inode: inode of the device
 370  *      @file: file handle to the device
 371  *
 372  *      The watchdog timer starts by opening the device.
 373  *
 374  *      Used within the file operation of the watchdog device.
 375  */
 376
 377 static int wdt_open(struct inode *inode, struct file *file)
 378 {
 379         if (exclusive && test_and_set_bit(WDTS_DEV_OPEN, &wdt_status))
 380                 return -EBUSY;
 381         if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status)) {
 382                 if (nowayout && !test_and_set_bit(WDTS_LOCKED, &wdt_status))
 383                         __module_get(THIS_MODULE);
 384                 wdt_start();
 385         }
 386         return nonseekable_open(inode, file);
 387 }
 388
 389 /**
 390  *      wdt_release - watchdog file_operations .release
 391  *      @inode: inode of the device
 392  *      @file: file handle to the device
 393  *
 394  *      Closing the watchdog device either stops the watchdog timer
 395  *      or in the case, that nowayout is set or the magic character
 396  *      wasn't written, a critical warning about an running watchdog
 397  *      timer is given.
 398  *
 399  *      Used within the file operation of the watchdog device.
 400  */
 401
 402 static int wdt_release(struct inode *inode, struct file *file)
 403 {
 404         if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
 405                 if (test_and_clear_bit(WDTS_EXPECTED, &wdt_status)) {
 406                         wdt_stop();
 407                         clear_bit(WDTS_TIMER_RUN, &wdt_status);
 408                 } else {
 409                         wdt_keepalive();
 410                         printk(KERN_CRIT PFX
 411                                "unexpected close, not stopping watchdog!\n");
 412                 }
 413         }
 414         clear_bit(WDTS_DEV_OPEN, &wdt_status);
 415         return 0;
 416 }
 417
 418 /**
 419  *      wdt_write - watchdog file_operations .write
 420  *      @file: file handle to the watchdog
 421  *      @buf: buffer to write
 422  *      @count: count of bytes
 423  *      @ppos: pointer to the position to write. No seeks allowed
 424  *
 425  *      A write to a watchdog device is defined as a keepalive signal. Any
 426  *      write of data will do, as we don't define content meaning.
 427  *
 428  *      Used within the file operation of the watchdog device.
 429  */
 430
 431 static ssize_t wdt_write(struct file *file, const char __user *buf,
 432                             size_t count, loff_t *ppos)
 433 {
 434         if (count) {
 435                 clear_bit(WDTS_EXPECTED, &wdt_status);
 436                 wdt_keepalive();
 437         }
 438         if (!nowayout) {
 439                 size_t ofs;
 440
 441         /* note: just in case someone wrote the magic character long ago */
 442                 for (ofs = 0; ofs != count; ofs++) {
 443                         char c;
 444                         if (get_user(c, buf + ofs))
 445                                 return -EFAULT;
 446                         if (c == WD_MAGIC)
 447                                 set_bit(WDTS_EXPECTED, &wdt_status);
 448                 }
 449         }
 450         return count;
 451 }
 452
 453 static const struct watchdog_info ident = {
 454         .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
 455         .firmware_version =     1,
 456         .identity = WATCHDOG_NAME,
 457 };
 458
 459 /**
 460  *      wdt_ioctl - watchdog file_operations .unlocked_ioctl
 461  *      @file: file handle to the device
 462  *      @cmd: watchdog command
 463  *      @arg: argument pointer
 464  *
 465  *      The watchdog API defines a common set of functions for all watchdogs
 466  *      according to their available features.
 467  *
 468  *      Used within the file operation of the watchdog device.
 469  */
 470
 471 static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 472 {
 473         int rc = 0, status, new_options, new_timeout;
 474         union {
 475                 struct watchdog_info __user *ident;
 476                 int __user *i;
 477         } uarg;
 478
 479         uarg.i = (int __user *)arg;
 480
 481         switch (cmd) {
 482         case WDIOC_GETSUPPORT:
 483                 return copy_to_user(uarg.ident,
 484                                     &ident, sizeof(ident)) ? -EFAULT : 0;
 485
 486         case WDIOC_GETSTATUS:
 487                 wdt_get_status(&status);
 488                 return put_user(status, uarg.i);
 489
 490         case WDIOC_GETBOOTSTATUS:
 491                 return put_user(0, uarg.i);
 492
 493         case WDIOC_KEEPALIVE:
 494                 wdt_keepalive();
 495                 return 0;
 496
 497         case WDIOC_SETOPTIONS:
 498                 if (get_user(new_options, uarg.i))
 499                         return -EFAULT;
 500
 501                 switch (new_options) {
 502                 case WDIOS_DISABLECARD:
 503                         if (test_bit(WDTS_TIMER_RUN, &wdt_status))
 504                                 wdt_stop();
 505                         clear_bit(WDTS_TIMER_RUN, &wdt_status);
 506                         return 0;
 507
 508                 case WDIOS_ENABLECARD:
 509                         if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status))
 510                                 wdt_start();
 511                         return 0;
 512
 513                 default:
 514                         return -EFAULT;
 515                 }
 516
 517         case WDIOC_SETTIMEOUT:
 518                 if (get_user(new_timeout, uarg.i))
 519                         return -EFAULT;
 520                 rc = wdt_set_timeout(new_timeout);
 521         case WDIOC_GETTIMEOUT:
 522                 if (put_user(timeout, uarg.i))
 523                         return -EFAULT;
 524                 return rc;
 525
 526         default:
 527                 return -ENOTTY;
 528         }
 529 }
 530
 531 static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
 532         void *unused)
 533 {
 534         if (code == SYS_DOWN || code == SYS_HALT)
 535                 wdt_stop();
 536         return NOTIFY_DONE;
 537 }
 538
 539 static const struct file_operations wdt_fops = {
 540         .owner          = THIS_MODULE,
 541         .llseek         = no_llseek,
 542         .write          = wdt_write,
 543         .unlocked_ioctl = wdt_ioctl,
 544         .open           = wdt_open,
 545         .release        = wdt_release,
 546 };
 547
 548 static struct miscdevice wdt_miscdev = {
 549         .minor          = WATCHDOG_MINOR,
 550         .name           = "watchdog",
 551         .fops           = &wdt_fops,
 552 };
 553
 554 static struct notifier_block wdt_notifier = {
 555         .notifier_call = wdt_notify_sys,
 556 };
 557
 558 static int __init it87_wdt_init(void)
 559 {
 560         int rc = 0;
 561         int try_gameport = !nogameport;
 562         u8  chip_rev;
 563         unsigned long flags;
 564
 565         wdt_status = 0;
 566
 567         spin_lock_irqsave(&spinlock, flags);
 568         superio_enter();
 569         chip_type = superio_inw(CHIPID);
 570         chip_rev  = superio_inb(CHIPREV) & 0x0f;
 571         superio_exit();
 572         spin_unlock_irqrestore(&spinlock, flags);
 573
 574         switch (chip_type) {
 575         case IT8702_ID:
 576                 max_units = 255;
 577                 break;
 578         case IT8712_ID:
 579                 max_units = (chip_rev < 8) ? 255 : 65535;
 580                 break;
 581         case IT8716_ID:
 582         case IT8726_ID:
 583                 max_units = 65535;
 584                 break;
 585         case IT8718_ID:
 586         case IT8720_ID:
 587         case IT8721_ID:
 588                 max_units = 65535;
 589                 try_gameport = 0;
 590                 break;
 591         case IT8705_ID:
 592                 printk(KERN_ERR PFX
 593                        "Unsupported Chip found, Chip %04x Revision %02x\n",
 594                        chip_type, chip_rev);
 595                 return -ENODEV;
 596         case NO_DEV_ID:
 597                 printk(KERN_ERR PFX "no device\n");
 598                 return -ENODEV;
 599         default:
 600                 printk(KERN_ERR PFX
 601                        "Unknown Chip found, Chip %04x Revision %04x\n",
 602                        chip_type, chip_rev);
 603                 return -ENODEV;
 604         }
 605
 606         spin_lock_irqsave(&spinlock, flags);
 607         superio_enter();
 608
 609         superio_select(GPIO);
 610         superio_outb(WDT_TOV1, WDTCFG);
 611         superio_outb(0x00, WDTCTRL);
 612
 613         /* First try to get Gameport support */
 614         if (try_gameport) {
 615                 superio_select(GAMEPORT);
 616                 base = superio_inw(BASEREG);
 617                 if (!base) {
 618                         base = GP_BASE_DEFAULT;
 619                         superio_outw(base, BASEREG);
 620                 }
 621                 gpact = superio_inb(ACTREG);
 622                 superio_outb(0x01, ACTREG);
 623                 superio_exit();
 624                 spin_unlock_irqrestore(&spinlock, flags);
 625                 if (request_region(base, 1, WATCHDOG_NAME))
 626                         set_bit(WDTS_USE_GP, &wdt_status);
 627                 else
 628                         rc = -EIO;
 629         } else {
 630                 superio_exit();
 631                 spin_unlock_irqrestore(&spinlock, flags);
 632         }
 633
 634         /* If we haven't Gameport support, try to get CIR support */
 635         if (!test_bit(WDTS_USE_GP, &wdt_status)) {
 636                 if (!request_region(CIR_BASE, 8, WATCHDOG_NAME)) {
 637                         if (rc == -EIO)
 638                                 printk(KERN_ERR PFX
 639                                         "I/O Address 0x%04x and 0x%04x"
 640                                         " already in use\n", base, CIR_BASE);
 641                         else
 642                                 printk(KERN_ERR PFX
 643                                         "I/O Address 0x%04x already in use\n",
 644                                         CIR_BASE);
 645                         rc = -EIO;
 646                         goto err_out;
 647                 }
 648                 base = CIR_BASE;
 649                 spin_lock_irqsave(&spinlock, flags);
 650                 superio_enter();
 651
 652                 superio_select(CIR);
 653                 superio_outw(base, BASEREG);
 654                 superio_outb(0x00, CIR_ILS);
 655                 ciract = superio_inb(ACTREG);
 656                 superio_outb(0x01, ACTREG);
 657                 if (rc == -EIO) {
 658                         superio_select(GAMEPORT);
 659                         superio_outb(gpact, ACTREG);
 660                 }
 661
 662                 superio_exit();
 663                 spin_unlock_irqrestore(&spinlock, flags);
 664         }
 665
 666         if (timeout < 1 || timeout > max_units * 60) {
 667                 timeout = DEFAULT_TIMEOUT;
 668                 printk(KERN_WARNING PFX
 669                        "Timeout value out of range, use default %d sec\n",
 670                        DEFAULT_TIMEOUT);
 671         }
 672
 673         if (timeout > max_units)
 674                 timeout = wdt_round_time(timeout);
 675
 676         rc = register_reboot_notifier(&wdt_notifier);
 677         if (rc) {
 678                 printk(KERN_ERR PFX
 679                        "Cannot register reboot notifier (err=%d)\n", rc);
 680                 goto err_out_region;
 681         }
 682
 683         rc = misc_register(&wdt_miscdev);
 684         if (rc) {
 685                 printk(KERN_ERR PFX
 686                        "Cannot register miscdev on minor=%d (err=%d)\n",
 687                         wdt_miscdev.minor, rc);
 688                 goto err_out_reboot;
 689         }
 690
 691         /* Initialize CIR to use it as keepalive source */
 692         if (!test_bit(WDTS_USE_GP, &wdt_status)) {
 693                 outb(0x00, CIR_RCR(base));
 694                 outb(0xc0, CIR_TCR1(base));
 695                 outb(0x5c, CIR_TCR2(base));
 696                 outb(0x10, CIR_IER(base));
 697                 outb(0x00, CIR_BDHR(base));
 698                 outb(0x01, CIR_BDLR(base));
 699                 outb(0x09, CIR_IER(base));
 700         }
 701
 702         printk(KERN_INFO PFX "Chip IT%04x revision %d initialized. "
 703                 "timeout=%d sec (nowayout=%d testmode=%d exclusive=%d "
 704                 "nogameport=%d)\n", chip_type, chip_rev, timeout,
 705                 nowayout, testmode, exclusive, nogameport);
 706
 707         return 0;
 708
 709 err_out_reboot:
 710         unregister_reboot_notifier(&wdt_notifier);
 711 err_out_region:
 712         release_region(base, test_bit(WDTS_USE_GP, &wdt_status) ? 1 : 8);
 713         if (!test_bit(WDTS_USE_GP, &wdt_status)) {
 714                 spin_lock_irqsave(&spinlock, flags);
 715                 superio_enter();
 716                 superio_select(CIR);
 717                 superio_outb(ciract, ACTREG);
 718                 superio_exit();
 719                 spin_unlock_irqrestore(&spinlock, flags);
 720         }
 721 err_out:
 722         if (try_gameport) {
 723                 spin_lock_irqsave(&spinlock, flags);
 724                 superio_enter();
 725                 superio_select(GAMEPORT);
 726                 superio_outb(gpact, ACTREG);
 727                 superio_exit();
 728                 spin_unlock_irqrestore(&spinlock, flags);
 729         }
 730
 731         return rc;
 732 }
 733
 734 static void __exit it87_wdt_exit(void)
 735 {
 736         unsigned long flags;
 737         int nolock;
 738
 739         nolock = !spin_trylock_irqsave(&spinlock, flags);
 740         superio_enter();
 741         superio_select(GPIO);
 742         superio_outb(0x00, WDTCTRL);
 743         superio_outb(0x00, WDTCFG);
 744         superio_outb(0x00, WDTVALLSB);
 745         if (max_units > 255)
 746                 superio_outb(0x00, WDTVALMSB);
 747         if (test_bit(WDTS_USE_GP, &wdt_status)) {
 748                 superio_select(GAMEPORT);
 749                 superio_outb(gpact, ACTREG);
 750         } else {
 751                 superio_select(CIR);
 752                 superio_outb(ciract, ACTREG);
 753         }
 754         superio_exit();
 755         if (!nolock)
 756                 spin_unlock_irqrestore(&spinlock, flags);
 757
 758         misc_deregister(&wdt_miscdev);
 759         unregister_reboot_notifier(&wdt_notifier);
 760         release_region(base, test_bit(WDTS_USE_GP, &wdt_status) ? 1 : 8);
 761 }
 762
 763 module_init(it87_wdt_init);
 764 module_exit(it87_wdt_exit);
 765
 766 MODULE_AUTHOR("Oliver Schuster");
 767 MODULE_DESCRIPTION("Hardware Watchdog Device Driver for IT87xx EC-LPC I/O");
 768 MODULE_LICENSE("GPL");
 769 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);