ARM: 7409/1: Do not call flush_cache_user_range with mmap_sem held
[linux/fpc-iii.git] / drivers / watchdog / max63xx_wdt.c
blob73ba2fd8e591435c485bfa2574d2d8b2d70bf274
1 /*
2 * drivers/char/watchdog/max63xx_wdt.c
4 * Driver for max63{69,70,71,72,73,74} watchdog timers
6 * Copyright (C) 2009 Marc Zyngier <maz@misterjones.org>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
12 * This driver assumes the watchdog pins are memory mapped (as it is
13 * the case for the Arcom Zeus). Should it be connected over GPIOs or
14 * another interface, some abstraction will have to be introduced.
17 #include <linux/module.h>
18 #include <linux/moduleparam.h>
19 #include <linux/types.h>
20 #include <linux/kernel.h>
21 #include <linux/fs.h>
22 #include <linux/miscdevice.h>
23 #include <linux/watchdog.h>
24 #include <linux/init.h>
25 #include <linux/bitops.h>
26 #include <linux/platform_device.h>
27 #include <linux/spinlock.h>
28 #include <linux/uaccess.h>
29 #include <linux/io.h>
30 #include <linux/device.h>
31 #include <linux/slab.h>
33 #define DEFAULT_HEARTBEAT 60
34 #define MAX_HEARTBEAT 60
36 static int heartbeat = DEFAULT_HEARTBEAT;
37 static int nowayout = WATCHDOG_NOWAYOUT;
40 * Memory mapping: a single byte, 3 first lower bits to select bit 3
41 * to ping the watchdog.
43 #define MAX6369_WDSET (7 << 0)
44 #define MAX6369_WDI (1 << 3)
46 static DEFINE_SPINLOCK(io_lock);
48 static unsigned long wdt_status;
49 #define WDT_IN_USE 0
50 #define WDT_RUNNING 1
51 #define WDT_OK_TO_CLOSE 2
53 static int nodelay;
54 static struct resource *wdt_mem;
55 static void __iomem *wdt_base;
56 static struct platform_device *max63xx_pdev;
59 * The timeout values used are actually the absolute minimum the chip
60 * offers. Typical values on my board are slightly over twice as long
61 * (10s setting ends up with a 25s timeout), and can be up to 3 times
62 * the nominal setting (according to the datasheet). So please take
63 * these values with a grain of salt. Same goes for the initial delay
64 * "feature". Only max6373/74 have a few settings without this initial
65 * delay (selected with the "nodelay" parameter).
67 * I also decided to remove from the tables any timeout smaller than a
68 * second, as it looked completly overkill...
71 /* Timeouts in second */
72 struct max63xx_timeout {
73 u8 wdset;
74 u8 tdelay;
75 u8 twd;
78 static struct max63xx_timeout max6369_table[] = {
79 { 5, 1, 1 },
80 { 6, 10, 10 },
81 { 7, 60, 60 },
82 { },
85 static struct max63xx_timeout max6371_table[] = {
86 { 6, 60, 3 },
87 { 7, 60, 60 },
88 { },
91 static struct max63xx_timeout max6373_table[] = {
92 { 2, 60, 1 },
93 { 5, 0, 1 },
94 { 1, 3, 3 },
95 { 7, 60, 10 },
96 { 6, 0, 10 },
97 { },
100 static struct max63xx_timeout *current_timeout;
102 static struct max63xx_timeout *
103 max63xx_select_timeout(struct max63xx_timeout *table, int value)
105 while (table->twd) {
106 if (value <= table->twd) {
107 if (nodelay && table->tdelay == 0)
108 return table;
110 if (!nodelay)
111 return table;
114 table++;
117 return NULL;
120 static void max63xx_wdt_ping(void)
122 u8 val;
124 spin_lock(&io_lock);
126 val = __raw_readb(wdt_base);
128 __raw_writeb(val | MAX6369_WDI, wdt_base);
129 __raw_writeb(val & ~MAX6369_WDI, wdt_base);
131 spin_unlock(&io_lock);
134 static void max63xx_wdt_enable(struct max63xx_timeout *entry)
136 u8 val;
138 if (test_and_set_bit(WDT_RUNNING, &wdt_status))
139 return;
141 spin_lock(&io_lock);
143 val = __raw_readb(wdt_base);
144 val &= ~MAX6369_WDSET;
145 val |= entry->wdset;
146 __raw_writeb(val, wdt_base);
148 spin_unlock(&io_lock);
150 /* check for a edge triggered startup */
151 if (entry->tdelay == 0)
152 max63xx_wdt_ping();
155 static void max63xx_wdt_disable(void)
157 u8 val;
159 spin_lock(&io_lock);
161 val = __raw_readb(wdt_base);
162 val &= ~MAX6369_WDSET;
163 val |= 3;
164 __raw_writeb(val, wdt_base);
166 spin_unlock(&io_lock);
168 clear_bit(WDT_RUNNING, &wdt_status);
171 static int max63xx_wdt_open(struct inode *inode, struct file *file)
173 if (test_and_set_bit(WDT_IN_USE, &wdt_status))
174 return -EBUSY;
176 max63xx_wdt_enable(current_timeout);
177 clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
179 return nonseekable_open(inode, file);
182 static ssize_t max63xx_wdt_write(struct file *file, const char *data,
183 size_t len, loff_t *ppos)
185 if (len) {
186 if (!nowayout) {
187 size_t i;
189 clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
190 for (i = 0; i != len; i++) {
191 char c;
193 if (get_user(c, data + i))
194 return -EFAULT;
196 if (c == 'V')
197 set_bit(WDT_OK_TO_CLOSE, &wdt_status);
201 max63xx_wdt_ping();
204 return len;
207 static const struct watchdog_info ident = {
208 .options = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
209 .identity = "max63xx Watchdog",
212 static long max63xx_wdt_ioctl(struct file *file, unsigned int cmd,
213 unsigned long arg)
215 int ret = -ENOTTY;
217 switch (cmd) {
218 case WDIOC_GETSUPPORT:
219 ret = copy_to_user((struct watchdog_info *)arg, &ident,
220 sizeof(ident)) ? -EFAULT : 0;
221 break;
223 case WDIOC_GETSTATUS:
224 case WDIOC_GETBOOTSTATUS:
225 ret = put_user(0, (int *)arg);
226 break;
228 case WDIOC_KEEPALIVE:
229 max63xx_wdt_ping();
230 ret = 0;
231 break;
233 case WDIOC_GETTIMEOUT:
234 ret = put_user(heartbeat, (int *)arg);
235 break;
237 return ret;
240 static int max63xx_wdt_release(struct inode *inode, struct file *file)
242 if (test_bit(WDT_OK_TO_CLOSE, &wdt_status))
243 max63xx_wdt_disable();
244 else
245 dev_crit(&max63xx_pdev->dev,
246 "device closed unexpectedly - timer will not stop\n");
248 clear_bit(WDT_IN_USE, &wdt_status);
249 clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
251 return 0;
254 static const struct file_operations max63xx_wdt_fops = {
255 .owner = THIS_MODULE,
256 .llseek = no_llseek,
257 .write = max63xx_wdt_write,
258 .unlocked_ioctl = max63xx_wdt_ioctl,
259 .open = max63xx_wdt_open,
260 .release = max63xx_wdt_release,
263 static struct miscdevice max63xx_wdt_miscdev = {
264 .minor = WATCHDOG_MINOR,
265 .name = "watchdog",
266 .fops = &max63xx_wdt_fops,
269 static int __devinit max63xx_wdt_probe(struct platform_device *pdev)
271 int ret = 0;
272 int size;
273 struct device *dev = &pdev->dev;
274 struct max63xx_timeout *table;
276 table = (struct max63xx_timeout *)pdev->id_entry->driver_data;
278 if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
279 heartbeat = DEFAULT_HEARTBEAT;
281 dev_info(dev, "requesting %ds heartbeat\n", heartbeat);
282 current_timeout = max63xx_select_timeout(table, heartbeat);
284 if (!current_timeout) {
285 dev_err(dev, "unable to satisfy heartbeat request\n");
286 return -EINVAL;
289 dev_info(dev, "using %ds heartbeat with %ds initial delay\n",
290 current_timeout->twd, current_timeout->tdelay);
292 heartbeat = current_timeout->twd;
294 max63xx_pdev = pdev;
296 wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
297 if (wdt_mem == NULL) {
298 dev_err(dev, "failed to get memory region resource\n");
299 return -ENOENT;
302 size = resource_size(wdt_mem);
303 if (!request_mem_region(wdt_mem->start, size, pdev->name)) {
304 dev_err(dev, "failed to get memory region\n");
305 return -ENOENT;
308 wdt_base = ioremap(wdt_mem->start, size);
309 if (!wdt_base) {
310 dev_err(dev, "failed to map memory region\n");
311 ret = -ENOMEM;
312 goto out_request;
315 ret = misc_register(&max63xx_wdt_miscdev);
316 if (ret < 0) {
317 dev_err(dev, "cannot register misc device\n");
318 goto out_unmap;
321 return 0;
323 out_unmap:
324 iounmap(wdt_base);
325 out_request:
326 release_mem_region(wdt_mem->start, size);
327 wdt_mem = NULL;
329 return ret;
332 static int __devexit max63xx_wdt_remove(struct platform_device *pdev)
334 misc_deregister(&max63xx_wdt_miscdev);
335 if (wdt_mem) {
336 release_mem_region(wdt_mem->start, resource_size(wdt_mem));
337 wdt_mem = NULL;
340 if (wdt_base)
341 iounmap(wdt_base);
343 return 0;
346 static struct platform_device_id max63xx_id_table[] = {
347 { "max6369_wdt", (kernel_ulong_t)max6369_table, },
348 { "max6370_wdt", (kernel_ulong_t)max6369_table, },
349 { "max6371_wdt", (kernel_ulong_t)max6371_table, },
350 { "max6372_wdt", (kernel_ulong_t)max6371_table, },
351 { "max6373_wdt", (kernel_ulong_t)max6373_table, },
352 { "max6374_wdt", (kernel_ulong_t)max6373_table, },
353 { },
355 MODULE_DEVICE_TABLE(platform, max63xx_id_table);
357 static struct platform_driver max63xx_wdt_driver = {
358 .probe = max63xx_wdt_probe,
359 .remove = __devexit_p(max63xx_wdt_remove),
360 .id_table = max63xx_id_table,
361 .driver = {
362 .name = "max63xx_wdt",
363 .owner = THIS_MODULE,
367 static int __init max63xx_wdt_init(void)
369 return platform_driver_register(&max63xx_wdt_driver);
372 static void __exit max63xx_wdt_exit(void)
374 platform_driver_unregister(&max63xx_wdt_driver);
377 module_init(max63xx_wdt_init);
378 module_exit(max63xx_wdt_exit);
380 MODULE_AUTHOR("Marc Zyngier <maz@misterjones.org>");
381 MODULE_DESCRIPTION("max63xx Watchdog Driver");
383 module_param(heartbeat, int, 0);
384 MODULE_PARM_DESC(heartbeat,
385 "Watchdog heartbeat period in seconds from 1 to "
386 __MODULE_STRING(MAX_HEARTBEAT) ", default "
387 __MODULE_STRING(DEFAULT_HEARTBEAT));
389 module_param(nowayout, int, 0);
390 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
391 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
393 module_param(nodelay, int, 0);
394 MODULE_PARM_DESC(nodelay,
395 "Force selection of a timeout setting without initial delay "
396 "(max6373/74 only, default=0)");
398 MODULE_LICENSE("GPL");
399 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);