arch/arm/mach-davinci/include/mach/gpio.h

   1 /*
   2  * TI DaVinci GPIO Support
   3  *
   4  * Copyright (c) 2006 David Brownell
   5  * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  */
  12
  13 #ifndef __DAVINCI_GPIO_H
  14 #define __DAVINCI_GPIO_H
  15
  16 #include <linux/io.h>
  17 #include <asm-generic/gpio.h>
  18
  19 #include <mach/irqs.h>
  20 #include <mach/common.h>
  21
  22 #define DAVINCI_GPIO_BASE 0x01C67000
  23
  24 /*
  25  * basic gpio routines
  26  *
  27  * board-specific init should be done by arch/.../.../board-XXX.c (maybe
  28  * initializing banks together) rather than boot loaders; kexec() won't
  29  * go through boot loaders.
  30  *
  31  * the gpio clock will be turned on when gpios are used, and you may also
  32  * need to pay attention to PINMUX registers to be sure those pins are
  33  * used as gpios, not with other peripherals.
  34  *
  35  * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1).  For documentation,
  36  * and maybe for later updates, code may write GPIO(N).  These may be
  37  * all 1.8V signals, all 3.3V ones, or a mix of the two.  A given chip
  38  * may not support all the GPIOs in that range.
  39  *
  40  * GPIOs can also be on external chips, numbered after the ones built-in
  41  * to the DaVinci chip.  For now, they won't be usable as IRQ sources.
  42  */
  43 #define GPIO(X)         (X)             /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
  44
  45 struct gpio_controller {
  46         u32     dir;
  47         u32     out_data;
  48         u32     set_data;
  49         u32     clr_data;
  50         u32     in_data;
  51         u32     set_rising;
  52         u32     clr_rising;
  53         u32     set_falling;
  54         u32     clr_falling;
  55         u32     intstat;
  56 };
  57
  58 /* The __gpio_to_controller() and __gpio_mask() functions inline to constants
  59  * with constant parameters; or in outlined code they execute at runtime.
  60  *
  61  * You'd access the controller directly when reading or writing more than
  62  * one gpio value at a time, and to support wired logic where the value
  63  * being driven by the cpu need not match the value read back.
  64  *
  65  * These are NOT part of the cross-platform GPIO interface
  66  */
  67 static inline struct gpio_controller *__iomem
  68 __gpio_to_controller(unsigned gpio)
  69 {
  70         void *__iomem ptr;
  71         void __iomem *base = davinci_soc_info.gpio_base;
  72
  73         if (gpio < 32 * 1)
  74                 ptr = base + 0x10;
  75         else if (gpio < 32 * 2)
  76                 ptr = base + 0x38;
  77         else if (gpio < 32 * 3)
  78                 ptr = base + 0x60;
  79         else if (gpio < 32 * 4)
  80                 ptr = base + 0x88;
  81         else
  82                 ptr = NULL;
  83         return ptr;
  84 }
  85
  86 static inline u32 __gpio_mask(unsigned gpio)
  87 {
  88         return 1 << (gpio % 32);
  89 }
  90
  91 /* The get/set/clear functions will inline when called with constant
  92  * parameters referencing built-in GPIOs, for low-overhead bitbanging.
  93  *
  94  * Otherwise, calls with variable parameters or referencing external
  95  * GPIOs (e.g. on GPIO expander chips) use outlined functions.
  96  */
  97 static inline void gpio_set_value(unsigned gpio, int value)
  98 {
  99         if (__builtin_constant_p(value) && gpio < DAVINCI_N_GPIO) {
 100                 struct gpio_controller  *__iomem g;
 101                 u32                     mask;
 102
 103                 g = __gpio_to_controller(gpio);
 104                 mask = __gpio_mask(gpio);
 105                 if (value)
 106                         __raw_writel(mask, &g->set_data);
 107                 else
 108                         __raw_writel(mask, &g->clr_data);
 109                 return;
 110         }
 111
 112         __gpio_set_value(gpio, value);
 113 }
 114
 115 /* Returns zero or nonzero; works for gpios configured as inputs OR
 116  * as outputs, at least for built-in GPIOs.
 117  *
 118  * NOTE: for built-in GPIOs, changes in reported values are synchronized
 119  * to the GPIO clock.  This is easily seen after calling gpio_set_value()
 120  * and then immediately gpio_get_value(), where the gpio_get_value() will
 121  * return the old value until the GPIO clock ticks and the new value gets
 122  * latched.
 123  */
 124 static inline int gpio_get_value(unsigned gpio)
 125 {
 126         struct gpio_controller  *__iomem g;
 127
 128         if (!__builtin_constant_p(gpio) || gpio >= DAVINCI_N_GPIO)
 129                 return __gpio_get_value(gpio);
 130
 131         g = __gpio_to_controller(gpio);
 132         return __gpio_mask(gpio) & __raw_readl(&g->in_data);
 133 }
 134
 135 static inline int gpio_cansleep(unsigned gpio)
 136 {
 137         if (__builtin_constant_p(gpio) && gpio < DAVINCI_N_GPIO)
 138                 return 0;
 139         else
 140                 return __gpio_cansleep(gpio);
 141 }
 142
 143 static inline int gpio_to_irq(unsigned gpio)
 144 {
 145         if (gpio >= DAVINCI_N_GPIO)
 146                 return -EINVAL;
 147         return davinci_soc_info.intc_irq_num + gpio;
 148 }
 149
 150 static inline int irq_to_gpio(unsigned irq)
 151 {
 152         /* caller guarantees gpio_to_irq() succeeded */
 153         return irq - davinci_soc_info.intc_irq_num;
 154 }
 155
 156 #endif                          /* __DAVINCI_GPIO_H */