arch/sh/boards/mach-se/7724/setup.c

   1 /*
   2  * linux/arch/sh/boards/se/7724/setup.c
   3  *
   4  * Copyright (C) 2009 Renesas Solutions Corp.
   5  *
   6  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
   7  *
   8  * This file is subject to the terms and conditions of the GNU General Public
   9  * License.  See the file "COPYING" in the main directory of this archive
  10  * for more details.
  11  */
  12
  13 #include <linux/init.h>
  14 #include <linux/device.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/mtd/physmap.h>
  18 #include <linux/delay.h>
  19 #include <linux/smc91x.h>
  20 #include <linux/gpio.h>
  21 #include <linux/input.h>
  22 #include <linux/usb/r8a66597.h>
  23 #include <video/sh_mobile_lcdc.h>
  24 #include <media/sh_mobile_ceu.h>
  25 #include <asm/io.h>
  26 #include <asm/heartbeat.h>
  27 #include <asm/sh_eth.h>
  28 #include <asm/clock.h>
  29 #include <asm/sh_keysc.h>
  30 #include <cpu/sh7724.h>
  31 #include <mach-se/mach/se7724.h>
  32
  33 /*
  34  * SWx    1234 5678
  35  * ------------------------------------
  36  * SW31 : 1001 1100    : default
  37  * SW32 : 0111 1111    : use on board flash
  38  *
  39  * SW41 : abxx xxxx  -> a = 0 : Analog  monitor
  40  *                          1 : Digital monitor
  41  *                      b = 0 : VGA
  42  *                          1 : SVGA
  43  */
  44
  45 /* Heartbeat */
  46 static struct heartbeat_data heartbeat_data = {
  47         .regsize = 16,
  48 };
  49
  50 static struct resource heartbeat_resources[] = {
  51         [0] = {
  52                 .start  = PA_LED,
  53                 .end    = PA_LED,
  54                 .flags  = IORESOURCE_MEM,
  55         },
  56 };
  57
  58 static struct platform_device heartbeat_device = {
  59         .name           = "heartbeat",
  60         .id             = -1,
  61         .dev = {
  62                 .platform_data = &heartbeat_data,
  63         },
  64         .num_resources  = ARRAY_SIZE(heartbeat_resources),
  65         .resource       = heartbeat_resources,
  66 };
  67
  68 /* LAN91C111 */
  69 static struct smc91x_platdata smc91x_info = {
  70         .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  71 };
  72
  73 static struct resource smc91x_eth_resources[] = {
  74         [0] = {
  75                 .name   = "SMC91C111" ,
  76                 .start  = 0x1a300300,
  77                 .end    = 0x1a30030f,
  78                 .flags  = IORESOURCE_MEM,
  79         },
  80         [1] = {
  81                 .start  = IRQ0_SMC,
  82                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  83         },
  84 };
  85
  86 static struct platform_device smc91x_eth_device = {
  87         .name   = "smc91x",
  88         .num_resources  = ARRAY_SIZE(smc91x_eth_resources),
  89         .resource       = smc91x_eth_resources,
  90         .dev    = {
  91                 .platform_data  = &smc91x_info,
  92         },
  93 };
  94
  95 /* MTD */
  96 static struct mtd_partition nor_flash_partitions[] = {
  97         {
  98                 .name = "uboot",
  99                 .offset = 0,
 100                 .size = (1 * 1024 * 1024),
 101                 .mask_flags = MTD_WRITEABLE,    /* Read-only */
 102         }, {
 103                 .name = "kernel",
 104                 .offset = MTDPART_OFS_APPEND,
 105                 .size = (2 * 1024 * 1024),
 106         }, {
 107                 .name = "free-area",
 108                 .offset = MTDPART_OFS_APPEND,
 109                 .size = MTDPART_SIZ_FULL,
 110         },
 111 };
 112
 113 static struct physmap_flash_data nor_flash_data = {
 114         .width          = 2,
 115         .parts          = nor_flash_partitions,
 116         .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
 117 };
 118
 119 static struct resource nor_flash_resources[] = {
 120         [0] = {
 121                 .name   = "NOR Flash",
 122                 .start  = 0x00000000,
 123                 .end    = 0x01ffffff,
 124                 .flags  = IORESOURCE_MEM,
 125         }
 126 };
 127
 128 static struct platform_device nor_flash_device = {
 129         .name           = "physmap-flash",
 130         .resource       = nor_flash_resources,
 131         .num_resources  = ARRAY_SIZE(nor_flash_resources),
 132         .dev            = {
 133                 .platform_data = &nor_flash_data,
 134         },
 135 };
 136
 137 /* LCDC */
 138 static struct sh_mobile_lcdc_info lcdc_info = {
 139         .clock_source = LCDC_CLK_EXTERNAL,
 140         .ch[0] = {
 141                 .chan = LCDC_CHAN_MAINLCD,
 142                 .bpp = 16,
 143                 .clock_divider = 1,
 144                 .lcd_cfg = {
 145                         .name = "LB070WV1",
 146                         .sync = 0, /* hsync and vsync are active low */
 147                 },
 148                 .lcd_size_cfg = { /* 7.0 inch */
 149                         .width = 152,
 150                         .height = 91,
 151                 },
 152                 .board_cfg = {
 153                 },
 154         }
 155 };
 156
 157 static struct resource lcdc_resources[] = {
 158         [0] = {
 159                 .name   = "LCDC",
 160                 .start  = 0xfe940000,
 161                 .end    = 0xfe941fff,
 162                 .flags  = IORESOURCE_MEM,
 163         },
 164         [1] = {
 165                 .start  = 106,
 166                 .flags  = IORESOURCE_IRQ,
 167         },
 168 };
 169
 170 static struct platform_device lcdc_device = {
 171         .name           = "sh_mobile_lcdc_fb",
 172         .num_resources  = ARRAY_SIZE(lcdc_resources),
 173         .resource       = lcdc_resources,
 174         .dev            = {
 175                 .platform_data  = &lcdc_info,
 176         },
 177 };
 178
 179 /* CEU0 */
 180 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
 181         .flags = SH_CEU_FLAG_USE_8BIT_BUS,
 182 };
 183
 184 static struct resource ceu0_resources[] = {
 185         [0] = {
 186                 .name   = "CEU0",
 187                 .start  = 0xfe910000,
 188                 .end    = 0xfe91009f,
 189                 .flags  = IORESOURCE_MEM,
 190         },
 191         [1] = {
 192                 .start  = 52,
 193                 .flags  = IORESOURCE_IRQ,
 194         },
 195         [2] = {
 196                 /* place holder for contiguous memory */
 197         },
 198 };
 199
 200 static struct platform_device ceu0_device = {
 201         .name           = "sh_mobile_ceu",
 202         .id             = 0, /* "ceu0" clock */
 203         .num_resources  = ARRAY_SIZE(ceu0_resources),
 204         .resource       = ceu0_resources,
 205         .dev    = {
 206                 .platform_data  = &sh_mobile_ceu0_info,
 207         },
 208 };
 209
 210 /* CEU1 */
 211 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
 212         .flags = SH_CEU_FLAG_USE_8BIT_BUS,
 213 };
 214
 215 static struct resource ceu1_resources[] = {
 216         [0] = {
 217                 .name   = "CEU1",
 218                 .start  = 0xfe914000,
 219                 .end    = 0xfe91409f,
 220                 .flags  = IORESOURCE_MEM,
 221         },
 222         [1] = {
 223                 .start  = 63,
 224                 .flags  = IORESOURCE_IRQ,
 225         },
 226         [2] = {
 227                 /* place holder for contiguous memory */
 228         },
 229 };
 230
 231 static struct platform_device ceu1_device = {
 232         .name           = "sh_mobile_ceu",
 233         .id             = 1, /* "ceu1" clock */
 234         .num_resources  = ARRAY_SIZE(ceu1_resources),
 235         .resource       = ceu1_resources,
 236         .dev    = {
 237                 .platform_data  = &sh_mobile_ceu1_info,
 238         },
 239 };
 240
 241 /* KEYSC in SoC (Needs SW33-2 set to ON) */
 242 static struct sh_keysc_info keysc_info = {
 243         .mode = SH_KEYSC_MODE_1,
 244         .scan_timing = 10,
 245         .delay = 50,
 246         .keycodes = {
 247                 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
 248                 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
 249                 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
 250                 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
 251                 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
 252                 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
 253         },
 254 };
 255
 256 static struct resource keysc_resources[] = {
 257         [0] = {
 258                 .name   = "KEYSC",
 259                 .start  = 0x044b0000,
 260                 .end    = 0x044b000f,
 261                 .flags  = IORESOURCE_MEM,
 262         },
 263         [1] = {
 264                 .start  = 79,
 265                 .flags  = IORESOURCE_IRQ,
 266         },
 267 };
 268
 269 static struct platform_device keysc_device = {
 270         .name           = "sh_keysc",
 271         .id             = 0, /* "keysc0" clock */
 272         .num_resources  = ARRAY_SIZE(keysc_resources),
 273         .resource       = keysc_resources,
 274         .dev    = {
 275                 .platform_data  = &keysc_info,
 276         },
 277 };
 278
 279 /* SH Eth */
 280 static struct resource sh_eth_resources[] = {
 281         [0] = {
 282                 .start = SH_ETH_ADDR,
 283                 .end   = SH_ETH_ADDR + 0x1FC,
 284                 .flags = IORESOURCE_MEM,
 285         },
 286         [1] = {
 287                 .start = 91,
 288                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 289         },
 290 };
 291
 292 struct sh_eth_plat_data sh_eth_plat = {
 293         .phy = 0x1f, /* SMSC LAN8187 */
 294         .edmac_endian = EDMAC_LITTLE_ENDIAN,
 295 };
 296
 297 static struct platform_device sh_eth_device = {
 298         .name = "sh-eth",
 299         .id     = 0,
 300         .dev = {
 301                 .platform_data = &sh_eth_plat,
 302         },
 303         .num_resources = ARRAY_SIZE(sh_eth_resources),
 304         .resource = sh_eth_resources,
 305 };
 306
 307 static struct r8a66597_platdata sh7724_usb0_host_data = {
 308 };
 309
 310 static struct resource sh7724_usb0_host_resources[] = {
 311         [0] = {
 312                 .start  = 0xa4d80000,
 313                 .end    = 0xa4d800ff,
 314                 .flags  = IORESOURCE_MEM,
 315         },
 316         [1] = {
 317                 .start  = 65,
 318                 .end    = 65,
 319                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 320         },
 321 };
 322
 323 static struct platform_device sh7724_usb0_host_device = {
 324         .name           = "r8a66597_hcd",
 325         .id             = 0,
 326         .dev = {
 327                 .dma_mask               = NULL,         /*  not use dma */
 328                 .coherent_dma_mask      = 0xffffffff,
 329                 .platform_data          = &sh7724_usb0_host_data,
 330         },
 331         .num_resources  = ARRAY_SIZE(sh7724_usb0_host_resources),
 332         .resource       = sh7724_usb0_host_resources,
 333 };
 334
 335 static struct platform_device *ms7724se_devices[] __initdata = {
 336         &heartbeat_device,
 337         &smc91x_eth_device,
 338         &lcdc_device,
 339         &nor_flash_device,
 340         &ceu0_device,
 341         &ceu1_device,
 342         &keysc_device,
 343         &sh_eth_device,
 344         &sh7724_usb0_host_device,
 345 };
 346
 347 #define EEPROM_OP   0xBA206000
 348 #define EEPROM_ADR  0xBA206004
 349 #define EEPROM_DATA 0xBA20600C
 350 #define EEPROM_STAT 0xBA206010
 351 #define EEPROM_STRT 0xBA206014
 352 static int __init sh_eth_is_eeprom_ready(void)
 353 {
 354         int t = 10000;
 355
 356         while (t--) {
 357                 if (!ctrl_inw(EEPROM_STAT))
 358                         return 1;
 359                 cpu_relax();
 360         }
 361
 362         printk(KERN_ERR "ms7724se can not access to eeprom\n");
 363         return 0;
 364 }
 365
 366 static void __init sh_eth_init(void)
 367 {
 368         int i;
 369         u16 mac[3];
 370
 371         /* check EEPROM status */
 372         if (!sh_eth_is_eeprom_ready())
 373                 return;
 374
 375         /* read MAC addr from EEPROM */
 376         for (i = 0 ; i < 3 ; i++) {
 377                 ctrl_outw(0x0, EEPROM_OP); /* read */
 378                 ctrl_outw(i*2, EEPROM_ADR);
 379                 ctrl_outw(0x1, EEPROM_STRT);
 380                 if (!sh_eth_is_eeprom_ready())
 381                         return;
 382
 383                 mac[i] = ctrl_inw(EEPROM_DATA);
 384                 mac[i] = ((mac[i] & 0xFF) << 8) | (mac[i] >> 8); /* swap */
 385         }
 386
 387         /* reset sh-eth */
 388         ctrl_outl(0x1, SH_ETH_ADDR + 0x0);
 389
 390         /* set MAC addr */
 391         ctrl_outl(((mac[0] << 16) | (mac[1])), SH_ETH_MAHR);
 392         ctrl_outl((mac[2]), SH_ETH_MALR);
 393 }
 394
 395 #define SW4140    0xBA201000
 396 #define FPGA_OUT  0xBA200400
 397 #define PORT_HIZA 0xA4050158
 398 #define PORT_MSELCRB 0xA4050182
 399
 400 #define SW41_A    0x0100
 401 #define SW41_B    0x0200
 402 #define SW41_C    0x0400
 403 #define SW41_D    0x0800
 404 #define SW41_E    0x1000
 405 #define SW41_F    0x2000
 406 #define SW41_G    0x4000
 407 #define SW41_H    0x8000
 408
 409 static int __init devices_setup(void)
 410 {
 411         u16 sw = ctrl_inw(SW4140); /* select camera, monitor */
 412
 413         /* Reset Release */
 414         ctrl_outw(ctrl_inw(FPGA_OUT) &
 415                   ~((1 << 1)  | /* LAN */
 416                     (1 << 6)  | /* VIDEO DAC */
 417                     (1 << 12) | /* USB0 */
 418                     (1 << 14)), /* RMII */
 419                   FPGA_OUT);
 420
 421         /* turn on USB clocks, use external clock */
 422         ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
 423
 424         /* enable USB0 port */
 425         ctrl_outw(0x0600, 0xa40501d4);
 426
 427         /* enable IRQ 0,1,2 */
 428         gpio_request(GPIO_FN_INTC_IRQ0, NULL);
 429         gpio_request(GPIO_FN_INTC_IRQ1, NULL);
 430         gpio_request(GPIO_FN_INTC_IRQ2, NULL);
 431
 432         /* enable SCIFA3 */
 433         gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
 434         gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
 435         gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
 436         gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
 437         gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
 438
 439         /* enable LCDC */
 440         gpio_request(GPIO_FN_LCDD23,   NULL);
 441         gpio_request(GPIO_FN_LCDD22,   NULL);
 442         gpio_request(GPIO_FN_LCDD21,   NULL);
 443         gpio_request(GPIO_FN_LCDD20,   NULL);
 444         gpio_request(GPIO_FN_LCDD19,   NULL);
 445         gpio_request(GPIO_FN_LCDD18,   NULL);
 446         gpio_request(GPIO_FN_LCDD17,   NULL);
 447         gpio_request(GPIO_FN_LCDD16,   NULL);
 448         gpio_request(GPIO_FN_LCDD15,   NULL);
 449         gpio_request(GPIO_FN_LCDD14,   NULL);
 450         gpio_request(GPIO_FN_LCDD13,   NULL);
 451         gpio_request(GPIO_FN_LCDD12,   NULL);
 452         gpio_request(GPIO_FN_LCDD11,   NULL);
 453         gpio_request(GPIO_FN_LCDD10,   NULL);
 454         gpio_request(GPIO_FN_LCDD9,    NULL);
 455         gpio_request(GPIO_FN_LCDD8,    NULL);
 456         gpio_request(GPIO_FN_LCDD7,    NULL);
 457         gpio_request(GPIO_FN_LCDD6,    NULL);
 458         gpio_request(GPIO_FN_LCDD5,    NULL);
 459         gpio_request(GPIO_FN_LCDD4,    NULL);
 460         gpio_request(GPIO_FN_LCDD3,    NULL);
 461         gpio_request(GPIO_FN_LCDD2,    NULL);
 462         gpio_request(GPIO_FN_LCDD1,    NULL);
 463         gpio_request(GPIO_FN_LCDD0,    NULL);
 464         gpio_request(GPIO_FN_LCDDISP,  NULL);
 465         gpio_request(GPIO_FN_LCDHSYN,  NULL);
 466         gpio_request(GPIO_FN_LCDDCK,   NULL);
 467         gpio_request(GPIO_FN_LCDVSYN,  NULL);
 468         gpio_request(GPIO_FN_LCDDON,   NULL);
 469         gpio_request(GPIO_FN_LCDVEPWC, NULL);
 470         gpio_request(GPIO_FN_LCDVCPWC, NULL);
 471         gpio_request(GPIO_FN_LCDRD,    NULL);
 472         gpio_request(GPIO_FN_LCDLCLK,  NULL);
 473         ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
 474
 475         /* enable CEU0 */
 476         gpio_request(GPIO_FN_VIO0_D15, NULL);
 477         gpio_request(GPIO_FN_VIO0_D14, NULL);
 478         gpio_request(GPIO_FN_VIO0_D13, NULL);
 479         gpio_request(GPIO_FN_VIO0_D12, NULL);
 480         gpio_request(GPIO_FN_VIO0_D11, NULL);
 481         gpio_request(GPIO_FN_VIO0_D10, NULL);
 482         gpio_request(GPIO_FN_VIO0_D9,  NULL);
 483         gpio_request(GPIO_FN_VIO0_D8,  NULL);
 484         gpio_request(GPIO_FN_VIO0_D7,  NULL);
 485         gpio_request(GPIO_FN_VIO0_D6,  NULL);
 486         gpio_request(GPIO_FN_VIO0_D5,  NULL);
 487         gpio_request(GPIO_FN_VIO0_D4,  NULL);
 488         gpio_request(GPIO_FN_VIO0_D3,  NULL);
 489         gpio_request(GPIO_FN_VIO0_D2,  NULL);
 490         gpio_request(GPIO_FN_VIO0_D1,  NULL);
 491         gpio_request(GPIO_FN_VIO0_D0,  NULL);
 492         gpio_request(GPIO_FN_VIO0_VD,  NULL);
 493         gpio_request(GPIO_FN_VIO0_CLK, NULL);
 494         gpio_request(GPIO_FN_VIO0_FLD, NULL);
 495         gpio_request(GPIO_FN_VIO0_HD,  NULL);
 496         platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
 497
 498         /* enable CEU1 */
 499         gpio_request(GPIO_FN_VIO1_D7,  NULL);
 500         gpio_request(GPIO_FN_VIO1_D6,  NULL);
 501         gpio_request(GPIO_FN_VIO1_D5,  NULL);
 502         gpio_request(GPIO_FN_VIO1_D4,  NULL);
 503         gpio_request(GPIO_FN_VIO1_D3,  NULL);
 504         gpio_request(GPIO_FN_VIO1_D2,  NULL);
 505         gpio_request(GPIO_FN_VIO1_D1,  NULL);
 506         gpio_request(GPIO_FN_VIO1_D0,  NULL);
 507         gpio_request(GPIO_FN_VIO1_FLD, NULL);
 508         gpio_request(GPIO_FN_VIO1_HD,  NULL);
 509         gpio_request(GPIO_FN_VIO1_VD,  NULL);
 510         gpio_request(GPIO_FN_VIO1_CLK, NULL);
 511         platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
 512
 513         /* KEYSC */
 514         gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
 515         gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
 516         gpio_request(GPIO_FN_KEYIN4,      NULL);
 517         gpio_request(GPIO_FN_KEYIN3,      NULL);
 518         gpio_request(GPIO_FN_KEYIN2,      NULL);
 519         gpio_request(GPIO_FN_KEYIN1,      NULL);
 520         gpio_request(GPIO_FN_KEYIN0,      NULL);
 521         gpio_request(GPIO_FN_KEYOUT3,     NULL);
 522         gpio_request(GPIO_FN_KEYOUT2,     NULL);
 523         gpio_request(GPIO_FN_KEYOUT1,     NULL);
 524         gpio_request(GPIO_FN_KEYOUT0,     NULL);
 525
 526         /*
 527          * enable SH-Eth
 528          *
 529          * please remove J33 pin from your board !!
 530          *
 531          * ms7724 board should not use GPIO_FN_LNKSTA pin
 532          * So, This time PTX5 is set to input pin
 533          */
 534         gpio_request(GPIO_FN_RMII_RXD0,    NULL);
 535         gpio_request(GPIO_FN_RMII_RXD1,    NULL);
 536         gpio_request(GPIO_FN_RMII_TXD0,    NULL);
 537         gpio_request(GPIO_FN_RMII_TXD1,    NULL);
 538         gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
 539         gpio_request(GPIO_FN_RMII_TX_EN,   NULL);
 540         gpio_request(GPIO_FN_RMII_RX_ER,   NULL);
 541         gpio_request(GPIO_FN_RMII_CRS_DV,  NULL);
 542         gpio_request(GPIO_FN_MDIO,         NULL);
 543         gpio_request(GPIO_FN_MDC,          NULL);
 544         gpio_request(GPIO_PTX5, NULL);
 545         gpio_direction_input(GPIO_PTX5);
 546         sh_eth_init();
 547
 548         if (sw & SW41_B) {
 549                 /* SVGA */
 550                 lcdc_info.ch[0].lcd_cfg.xres         = 800;
 551                 lcdc_info.ch[0].lcd_cfg.yres         = 600;
 552                 lcdc_info.ch[0].lcd_cfg.left_margin  = 142;
 553                 lcdc_info.ch[0].lcd_cfg.right_margin = 52;
 554                 lcdc_info.ch[0].lcd_cfg.hsync_len    = 96;
 555                 lcdc_info.ch[0].lcd_cfg.upper_margin = 24;
 556                 lcdc_info.ch[0].lcd_cfg.lower_margin = 2;
 557                 lcdc_info.ch[0].lcd_cfg.vsync_len    = 2;
 558         } else {
 559                 /* VGA */
 560                 lcdc_info.ch[0].lcd_cfg.xres         = 640;
 561                 lcdc_info.ch[0].lcd_cfg.yres         = 480;
 562                 lcdc_info.ch[0].lcd_cfg.left_margin  = 105;
 563                 lcdc_info.ch[0].lcd_cfg.right_margin = 50;
 564                 lcdc_info.ch[0].lcd_cfg.hsync_len    = 96;
 565                 lcdc_info.ch[0].lcd_cfg.upper_margin = 33;
 566                 lcdc_info.ch[0].lcd_cfg.lower_margin = 10;
 567                 lcdc_info.ch[0].lcd_cfg.vsync_len    = 2;
 568         }
 569
 570         if (sw & SW41_A) {
 571                 /* Digital monitor */
 572                 lcdc_info.ch[0].interface_type = RGB18;
 573                 lcdc_info.ch[0].flags          = 0;
 574         } else {
 575                 /* Analog monitor */
 576                 lcdc_info.ch[0].interface_type = RGB24;
 577                 lcdc_info.ch[0].flags          = LCDC_FLAGS_DWPOL;
 578         }
 579
 580         return platform_add_devices(ms7724se_devices,
 581                                     ARRAY_SIZE(ms7724se_devices));
 582 }
 583 device_initcall(devices_setup);
 584
 585 static struct sh_machine_vector mv_ms7724se __initmv = {
 586         .mv_name        = "ms7724se",
 587         .mv_init_irq    = init_se7724_IRQ,
 588         .mv_nr_irqs     = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,
 589 };