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Linux 4.4.145
[linux/fpc-iii.git] / drivers / net / wireless / ath / ath10k / core.c
blob0c23768aa1ec336ddb3b9b0dd7911edf2e657085
1 /*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18 #include <linux/module.h>
19 #include <linux/firmware.h>
20 #include <linux/of.h>
21
22 #include "core.h"
23 #include "mac.h"
24 #include "htc.h"
25 #include "hif.h"
26 #include "wmi.h"
27 #include "bmi.h"
28 #include "debug.h"
29 #include "htt.h"
30 #include "testmode.h"
31 #include "wmi-ops.h"
32
33 unsigned int ath10k_debug_mask;
34 static unsigned int ath10k_cryptmode_param;
35 static bool uart_print;
36 static bool skip_otp;
37 static bool rawmode;
38
39 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
40 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
41 module_param(uart_print, bool, 0644);
42 module_param(skip_otp, bool, 0644);
43 module_param(rawmode, bool, 0644);
44
45 MODULE_PARM_DESC(debug_mask, "Debugging mask");
46 MODULE_PARM_DESC(uart_print, "Uart target debugging");
47 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
48 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
49 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
50
51 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
52 {
53 .id = QCA988X_HW_2_0_VERSION,
54 .dev_id = QCA988X_2_0_DEVICE_ID,
55 .name = "qca988x hw2.0",
56 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
57 .uart_pin = 7,
58 .has_shifted_cc_wraparound = true,
59 .otp_exe_param = 0,
60 .channel_counters_freq_hz = 88000,
61 .max_probe_resp_desc_thres = 0,
62 .fw = {
63 .dir = QCA988X_HW_2_0_FW_DIR,
64 .fw = QCA988X_HW_2_0_FW_FILE,
65 .otp = QCA988X_HW_2_0_OTP_FILE,
66 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
67 .board_size = QCA988X_BOARD_DATA_SZ,
68 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
69 },
70 .decap_align_bytes = 4,
71 },
72 {
73 .id = QCA6174_HW_2_1_VERSION,
74 .dev_id = QCA6164_2_1_DEVICE_ID,
75 .name = "qca6164 hw2.1",
76 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
77 .uart_pin = 6,
78 .otp_exe_param = 0,
79 .channel_counters_freq_hz = 88000,
80 .max_probe_resp_desc_thres = 0,
81 .fw = {
82 .dir = QCA6174_HW_2_1_FW_DIR,
83 .fw = QCA6174_HW_2_1_FW_FILE,
84 .otp = QCA6174_HW_2_1_OTP_FILE,
85 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
86 .board_size = QCA6174_BOARD_DATA_SZ,
87 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
88 },
89 .decap_align_bytes = 4,
90 },
91 {
92 .id = QCA6174_HW_2_1_VERSION,
93 .dev_id = QCA6174_2_1_DEVICE_ID,
94 .name = "qca6174 hw2.1",
95 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
96 .uart_pin = 6,
97 .otp_exe_param = 0,
98 .channel_counters_freq_hz = 88000,
99 .max_probe_resp_desc_thres = 0,
100 .fw = {
101 .dir = QCA6174_HW_2_1_FW_DIR,
102 .fw = QCA6174_HW_2_1_FW_FILE,
103 .otp = QCA6174_HW_2_1_OTP_FILE,
104 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
105 .board_size = QCA6174_BOARD_DATA_SZ,
106 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
107 },
108 .decap_align_bytes = 4,
109 },
110 {
111 .id = QCA6174_HW_3_0_VERSION,
112 .dev_id = QCA6174_2_1_DEVICE_ID,
113 .name = "qca6174 hw3.0",
114 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
115 .uart_pin = 6,
116 .otp_exe_param = 0,
117 .channel_counters_freq_hz = 88000,
118 .max_probe_resp_desc_thres = 0,
119 .fw = {
120 .dir = QCA6174_HW_3_0_FW_DIR,
121 .fw = QCA6174_HW_3_0_FW_FILE,
122 .otp = QCA6174_HW_3_0_OTP_FILE,
123 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
124 .board_size = QCA6174_BOARD_DATA_SZ,
125 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
126 },
127 .decap_align_bytes = 4,
128 },
129 {
130 .id = QCA6174_HW_3_2_VERSION,
131 .dev_id = QCA6174_2_1_DEVICE_ID,
132 .name = "qca6174 hw3.2",
133 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
134 .uart_pin = 6,
135 .otp_exe_param = 0,
136 .channel_counters_freq_hz = 88000,
137 .max_probe_resp_desc_thres = 0,
138 .fw = {
139 /* uses same binaries as hw3.0 */
140 .dir = QCA6174_HW_3_0_FW_DIR,
141 .fw = QCA6174_HW_3_0_FW_FILE,
142 .otp = QCA6174_HW_3_0_OTP_FILE,
143 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
144 .board_size = QCA6174_BOARD_DATA_SZ,
145 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
146 },
147 .decap_align_bytes = 4,
148 },
149 {
150 .id = QCA99X0_HW_2_0_DEV_VERSION,
151 .dev_id = QCA99X0_2_0_DEVICE_ID,
152 .name = "qca99x0 hw2.0",
153 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
154 .uart_pin = 7,
155 .otp_exe_param = 0x00000700,
156 .continuous_frag_desc = true,
157 .channel_counters_freq_hz = 150000,
158 .max_probe_resp_desc_thres = 24,
159 .fw = {
160 .dir = QCA99X0_HW_2_0_FW_DIR,
161 .fw = QCA99X0_HW_2_0_FW_FILE,
162 .otp = QCA99X0_HW_2_0_OTP_FILE,
163 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
164 .board_size = QCA99X0_BOARD_DATA_SZ,
165 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
166 },
167 .decap_align_bytes = 1,
168 },
169 {
170 .id = QCA9377_HW_1_0_DEV_VERSION,
171 .dev_id = QCA9377_1_0_DEVICE_ID,
172 .name = "qca9377 hw1.0",
173 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
174 .uart_pin = 6,
175 .otp_exe_param = 0,
176 .channel_counters_freq_hz = 88000,
177 .max_probe_resp_desc_thres = 0,
178 .fw = {
179 .dir = QCA9377_HW_1_0_FW_DIR,
180 .fw = QCA9377_HW_1_0_FW_FILE,
181 .otp = QCA9377_HW_1_0_OTP_FILE,
182 .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
183 .board_size = QCA9377_BOARD_DATA_SZ,
184 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
185 },
186 .decap_align_bytes = 4,
187 },
188 {
189 .id = QCA9377_HW_1_1_DEV_VERSION,
190 .dev_id = QCA9377_1_0_DEVICE_ID,
191 .name = "qca9377 hw1.1",
192 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
193 .uart_pin = 6,
194 .otp_exe_param = 0,
195 .channel_counters_freq_hz = 88000,
196 .max_probe_resp_desc_thres = 0,
197 .fw = {
198 .dir = QCA9377_HW_1_0_FW_DIR,
199 .fw = QCA9377_HW_1_0_FW_FILE,
200 .otp = QCA9377_HW_1_0_OTP_FILE,
201 .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
202 .board_size = QCA9377_BOARD_DATA_SZ,
203 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
204 },
205 .decap_align_bytes = 4,
206 },
207 };
208
209 static const char *const ath10k_core_fw_feature_str[] = {
210 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
211 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
212 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
213 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
214 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
215 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
216 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
217 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
218 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
219 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
220 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
221 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
222 };
223
224 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
225 size_t buf_len,
226 enum ath10k_fw_features feat)
227 {
228 /* make sure that ath10k_core_fw_feature_str[] gets updated */
229 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
230 ATH10K_FW_FEATURE_COUNT);
231
232 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
233 WARN_ON(!ath10k_core_fw_feature_str[feat])) {
234 return scnprintf(buf, buf_len, "bit%d", feat);
235 }
236
237 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
238 }
239
240 void ath10k_core_get_fw_features_str(struct ath10k *ar,
241 char *buf,
242 size_t buf_len)
243 {
244 unsigned int len = 0;
245 int i;
246
247 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
248 if (test_bit(i, ar->fw_features)) {
249 if (len > 0)
250 len += scnprintf(buf + len, buf_len - len, ",");
251
252 len += ath10k_core_get_fw_feature_str(buf + len,
253 buf_len - len,
254 i);
255 }
256 }
257 }
258
259 static void ath10k_send_suspend_complete(struct ath10k *ar)
260 {
261 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
262
263 complete(&ar->target_suspend);
264 }
265
266 static int ath10k_init_configure_target(struct ath10k *ar)
267 {
268 u32 param_host;
269 int ret;
270
271 /* tell target which HTC version it is used*/
272 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
273 HTC_PROTOCOL_VERSION);
274 if (ret) {
275 ath10k_err(ar, "settings HTC version failed\n");
276 return ret;
277 }
278
279 /* set the firmware mode to STA/IBSS/AP */
280 ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
281 if (ret) {
282 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
283 return ret;
284 }
285
286 /* TODO following parameters need to be re-visited. */
287 /* num_device */
288 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
289 /* Firmware mode */
290 /* FIXME: Why FW_MODE_AP ??.*/
291 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
292 /* mac_addr_method */
293 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
294 /* firmware_bridge */
295 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
296 /* fwsubmode */
297 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
298
299 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
300 if (ret) {
301 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
302 return ret;
303 }
304
305 /* We do all byte-swapping on the host */
306 ret = ath10k_bmi_write32(ar, hi_be, 0);
307 if (ret) {
308 ath10k_err(ar, "setting host CPU BE mode failed\n");
309 return ret;
310 }
311
312 /* FW descriptor/Data swap flags */
313 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
314
315 if (ret) {
316 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
317 return ret;
318 }
319
320 /* Some devices have a special sanity check that verifies the PCI
321 * Device ID is written to this host interest var. It is known to be
322 * required to boot QCA6164.
323 */
324 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
325 ar->dev_id);
326 if (ret) {
327 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
328 return ret;
329 }
330
331 return 0;
332 }
333
334 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
335 const char *dir,
336 const char *file)
337 {
338 char filename[100];
339 const struct firmware *fw;
340 int ret;
341
342 if (file == NULL)
343 return ERR_PTR(-ENOENT);
344
345 if (dir == NULL)
346 dir = ".";
347
348 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
349 ret = request_firmware(&fw, filename, ar->dev);
350 if (ret)
351 return ERR_PTR(ret);
352
353 return fw;
354 }
355
356 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
357 size_t data_len)
358 {
359 u32 board_data_size = ar->hw_params.fw.board_size;
360 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
361 u32 board_ext_data_addr;
362 int ret;
363
364 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
365 if (ret) {
366 ath10k_err(ar, "could not read board ext data addr (%d)\n",
367 ret);
368 return ret;
369 }
370
371 ath10k_dbg(ar, ATH10K_DBG_BOOT,
372 "boot push board extended data addr 0x%x\n",
373 board_ext_data_addr);
374
375 if (board_ext_data_addr == 0)
376 return 0;
377
378 if (data_len != (board_data_size + board_ext_data_size)) {
379 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
380 data_len, board_data_size, board_ext_data_size);
381 return -EINVAL;
382 }
383
384 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
385 data + board_data_size,
386 board_ext_data_size);
387 if (ret) {
388 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
389 return ret;
390 }
391
392 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
393 (board_ext_data_size << 16) | 1);
394 if (ret) {
395 ath10k_err(ar, "could not write board ext data bit (%d)\n",
396 ret);
397 return ret;
398 }
399
400 return 0;
401 }
402
403 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
404 size_t data_len)
405 {
406 u32 board_data_size = ar->hw_params.fw.board_size;
407 u32 address;
408 int ret;
409
410 ret = ath10k_push_board_ext_data(ar, data, data_len);
411 if (ret) {
412 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
413 goto exit;
414 }
415
416 ret = ath10k_bmi_read32(ar, hi_board_data, &address);
417 if (ret) {
418 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
419 goto exit;
420 }
421
422 ret = ath10k_bmi_write_memory(ar, address, data,
423 min_t(u32, board_data_size,
424 data_len));
425 if (ret) {
426 ath10k_err(ar, "could not write board data (%d)\n", ret);
427 goto exit;
428 }
429
430 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
431 if (ret) {
432 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
433 goto exit;
434 }
435
436 exit:
437 return ret;
438 }
439
440 static int ath10k_download_cal_file(struct ath10k *ar)
441 {
442 int ret;
443
444 if (!ar->cal_file)
445 return -ENOENT;
446
447 if (IS_ERR(ar->cal_file))
448 return PTR_ERR(ar->cal_file);
449
450 ret = ath10k_download_board_data(ar, ar->cal_file->data,
451 ar->cal_file->size);
452 if (ret) {
453 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
454 return ret;
455 }
456
457 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
458
459 return 0;
460 }
461
462 static int ath10k_download_cal_dt(struct ath10k *ar)
463 {
464 struct device_node *node;
465 int data_len;
466 void *data;
467 int ret;
468
469 node = ar->dev->of_node;
470 if (!node)
471 /* Device Tree is optional, don't print any warnings if
472 * there's no node for ath10k.
473 */
474 return -ENOENT;
475
476 if (!of_get_property(node, "qcom,ath10k-calibration-data",
477 &data_len)) {
478 /* The calibration data node is optional */
479 return -ENOENT;
480 }
481
482 if (data_len != QCA988X_CAL_DATA_LEN) {
483 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
484 data_len);
485 ret = -EMSGSIZE;
486 goto out;
487 }
488
489 data = kmalloc(data_len, GFP_KERNEL);
490 if (!data) {
491 ret = -ENOMEM;
492 goto out;
493 }
494
495 ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data",
496 data, data_len);
497 if (ret) {
498 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
499 ret);
500 goto out_free;
501 }
502
503 ret = ath10k_download_board_data(ar, data, data_len);
504 if (ret) {
505 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
506 ret);
507 goto out_free;
508 }
509
510 ret = 0;
511
512 out_free:
513 kfree(data);
514
515 out:
516 return ret;
517 }
518
519 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
520 {
521 u32 result, address;
522 u8 board_id, chip_id;
523 int ret;
524
525 address = ar->hw_params.patch_load_addr;
526
527 if (!ar->otp_data || !ar->otp_len) {
528 ath10k_warn(ar,
529 "failed to retrieve board id because of invalid otp\n");
530 return -ENODATA;
531 }
532
533 ath10k_dbg(ar, ATH10K_DBG_BOOT,
534 "boot upload otp to 0x%x len %zd for board id\n",
535 address, ar->otp_len);
536
537 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
538 if (ret) {
539 ath10k_err(ar, "could not write otp for board id check: %d\n",
540 ret);
541 return ret;
542 }
543
544 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID,
545 &result);
546 if (ret) {
547 ath10k_err(ar, "could not execute otp for board id check: %d\n",
548 ret);
549 return ret;
550 }
551
552 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
553 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
554
555 ath10k_dbg(ar, ATH10K_DBG_BOOT,
556 "boot get otp board id result 0x%08x board_id %d chip_id %d\n",
557 result, board_id, chip_id);
558
559 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
560 (board_id == 0)) {
561 ath10k_warn(ar, "board id is not exist in otp, ignore it\n");
562 return -EOPNOTSUPP;
563 }
564
565 ar->id.bmi_ids_valid = true;
566 ar->id.bmi_board_id = board_id;
567 ar->id.bmi_chip_id = chip_id;
568
569 return 0;
570 }
571
572 static int ath10k_download_and_run_otp(struct ath10k *ar)
573 {
574 u32 result, address = ar->hw_params.patch_load_addr;
575 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
576 int ret;
577
578 ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len);
579 if (ret) {
580 ath10k_err(ar, "failed to download board data: %d\n", ret);
581 return ret;
582 }
583
584 /* OTP is optional */
585
586 if (!ar->otp_data || !ar->otp_len) {
587 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
588 ar->otp_data, ar->otp_len);
589 return 0;
590 }
591
592 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
593 address, ar->otp_len);
594
595 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
596 if (ret) {
597 ath10k_err(ar, "could not write otp (%d)\n", ret);
598 return ret;
599 }
600
601 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
602 if (ret) {
603 ath10k_err(ar, "could not execute otp (%d)\n", ret);
604 return ret;
605 }
606
607 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
608
609 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
610 ar->fw_features)) &&
611 result != 0) {
612 ath10k_err(ar, "otp calibration failed: %d", result);
613 return -EINVAL;
614 }
615
616 return 0;
617 }
618
619 static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode)
620 {
621 u32 address, data_len;
622 const char *mode_name;
623 const void *data;
624 int ret;
625
626 address = ar->hw_params.patch_load_addr;
627
628 switch (mode) {
629 case ATH10K_FIRMWARE_MODE_NORMAL:
630 data = ar->firmware_data;
631 data_len = ar->firmware_len;
632 mode_name = "normal";
633 ret = ath10k_swap_code_seg_configure(ar,
634 ATH10K_SWAP_CODE_SEG_BIN_TYPE_FW);
635 if (ret) {
636 ath10k_err(ar, "failed to configure fw code swap: %d\n",
637 ret);
638 return ret;
639 }
640 break;
641 case ATH10K_FIRMWARE_MODE_UTF:
642 data = ar->testmode.utf_firmware_data;
643 data_len = ar->testmode.utf_firmware_len;
644 mode_name = "utf";
645 break;
646 default:
647 ath10k_err(ar, "unknown firmware mode: %d\n", mode);
648 return -EINVAL;
649 }
650
651 ath10k_dbg(ar, ATH10K_DBG_BOOT,
652 "boot uploading firmware image %p len %d mode %s\n",
653 data, data_len, mode_name);
654
655 ret = ath10k_bmi_fast_download(ar, address, data, data_len);
656 if (ret) {
657 ath10k_err(ar, "failed to download %s firmware: %d\n",
658 mode_name, ret);
659 return ret;
660 }
661
662 return ret;
663 }
664
665 static void ath10k_core_free_board_files(struct ath10k *ar)
666 {
667 if (!IS_ERR(ar->board))
668 release_firmware(ar->board);
669
670 ar->board = NULL;
671 ar->board_data = NULL;
672 ar->board_len = 0;
673 }
674
675 static void ath10k_core_free_firmware_files(struct ath10k *ar)
676 {
677 if (!IS_ERR(ar->otp))
678 release_firmware(ar->otp);
679
680 if (!IS_ERR(ar->firmware))
681 release_firmware(ar->firmware);
682
683 if (!IS_ERR(ar->cal_file))
684 release_firmware(ar->cal_file);
685
686 ath10k_swap_code_seg_release(ar);
687
688 ar->otp = NULL;
689 ar->otp_data = NULL;
690 ar->otp_len = 0;
691
692 ar->firmware = NULL;
693 ar->firmware_data = NULL;
694 ar->firmware_len = 0;
695
696 ar->cal_file = NULL;
697 }
698
699 static int ath10k_fetch_cal_file(struct ath10k *ar)
700 {
701 char filename[100];
702
703 /* cal-<bus>-<id>.bin */
704 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
705 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
706
707 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
708 if (IS_ERR(ar->cal_file))
709 /* calibration file is optional, don't print any warnings */
710 return PTR_ERR(ar->cal_file);
711
712 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
713 ATH10K_FW_DIR, filename);
714
715 return 0;
716 }
717
718 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar)
719 {
720 if (!ar->hw_params.fw.board) {
721 ath10k_err(ar, "failed to find board file fw entry\n");
722 return -EINVAL;
723 }
724
725 ar->board = ath10k_fetch_fw_file(ar,
726 ar->hw_params.fw.dir,
727 ar->hw_params.fw.board);
728 if (IS_ERR(ar->board))
729 return PTR_ERR(ar->board);
730
731 ar->board_data = ar->board->data;
732 ar->board_len = ar->board->size;
733
734 return 0;
735 }
736
737 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
738 const void *buf, size_t buf_len,
739 const char *boardname)
740 {
741 const struct ath10k_fw_ie *hdr;
742 bool name_match_found;
743 int ret, board_ie_id;
744 size_t board_ie_len;
745 const void *board_ie_data;
746
747 name_match_found = false;
748
749 /* go through ATH10K_BD_IE_BOARD_ elements */
750 while (buf_len > sizeof(struct ath10k_fw_ie)) {
751 hdr = buf;
752 board_ie_id = le32_to_cpu(hdr->id);
753 board_ie_len = le32_to_cpu(hdr->len);
754 board_ie_data = hdr->data;
755
756 buf_len -= sizeof(*hdr);
757 buf += sizeof(*hdr);
758
759 if (buf_len < ALIGN(board_ie_len, 4)) {
760 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
761 buf_len, ALIGN(board_ie_len, 4));
762 ret = -EINVAL;
763 goto out;
764 }
765
766 switch (board_ie_id) {
767 case ATH10K_BD_IE_BOARD_NAME:
768 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
769 board_ie_data, board_ie_len);
770
771 if (board_ie_len != strlen(boardname))
772 break;
773
774 ret = memcmp(board_ie_data, boardname, strlen(boardname));
775 if (ret)
776 break;
777
778 name_match_found = true;
779 ath10k_dbg(ar, ATH10K_DBG_BOOT,
780 "boot found match for name '%s'",
781 boardname);
782 break;
783 case ATH10K_BD_IE_BOARD_DATA:
784 if (!name_match_found)
785 /* no match found */
786 break;
787
788 ath10k_dbg(ar, ATH10K_DBG_BOOT,
789 "boot found board data for '%s'",
790 boardname);
791
792 ar->board_data = board_ie_data;
793 ar->board_len = board_ie_len;
794
795 ret = 0;
796 goto out;
797 default:
798 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
799 board_ie_id);
800 break;
801 }
802
803 /* jump over the padding */
804 board_ie_len = ALIGN(board_ie_len, 4);
805
806 buf_len -= board_ie_len;
807 buf += board_ie_len;
808 }
809
810 /* no match found */
811 ret = -ENOENT;
812
813 out:
814 return ret;
815 }
816
817 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
818 const char *boardname,
819 const char *filename)
820 {
821 size_t len, magic_len, ie_len;
822 struct ath10k_fw_ie *hdr;
823 const u8 *data;
824 int ret, ie_id;
825
826 ar->board = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, filename);
827 if (IS_ERR(ar->board))
828 return PTR_ERR(ar->board);
829
830 data = ar->board->data;
831 len = ar->board->size;
832
833 /* magic has extra null byte padded */
834 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
835 if (len < magic_len) {
836 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
837 ar->hw_params.fw.dir, filename, len);
838 ret = -EINVAL;
839 goto err;
840 }
841
842 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
843 ath10k_err(ar, "found invalid board magic\n");
844 ret = -EINVAL;
845 goto err;
846 }
847
848 /* magic is padded to 4 bytes */
849 magic_len = ALIGN(magic_len, 4);
850 if (len < magic_len) {
851 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
852 ar->hw_params.fw.dir, filename, len);
853 ret = -EINVAL;
854 goto err;
855 }
856
857 data += magic_len;
858 len -= magic_len;
859
860 while (len > sizeof(struct ath10k_fw_ie)) {
861 hdr = (struct ath10k_fw_ie *)data;
862 ie_id = le32_to_cpu(hdr->id);
863 ie_len = le32_to_cpu(hdr->len);
864
865 len -= sizeof(*hdr);
866 data = hdr->data;
867
868 if (len < ALIGN(ie_len, 4)) {
869 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
870 ie_id, ie_len, len);
871 ret = -EINVAL;
872 goto err;
873 }
874
875 switch (ie_id) {
876 case ATH10K_BD_IE_BOARD:
877 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
878 boardname);
879 if (ret == -ENOENT)
880 /* no match found, continue */
881 break;
882 else if (ret)
883 /* there was an error, bail out */
884 goto err;
885
886 /* board data found */
887 goto out;
888 }
889
890 /* jump over the padding */
891 ie_len = ALIGN(ie_len, 4);
892
893 len -= ie_len;
894 data += ie_len;
895 }
896
897 out:
898 if (!ar->board_data || !ar->board_len) {
899 ath10k_err(ar,
900 "failed to fetch board data for %s from %s/%s\n",
901 ar->hw_params.fw.dir, boardname, filename);
902 ret = -ENODATA;
903 goto err;
904 }
905
906 return 0;
907
908 err:
909 ath10k_core_free_board_files(ar);
910 return ret;
911 }
912
913 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
914 size_t name_len)
915 {
916 if (ar->id.bmi_ids_valid) {
917 scnprintf(name, name_len,
918 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d",
919 ath10k_bus_str(ar->hif.bus),
920 ar->id.bmi_chip_id,
921 ar->id.bmi_board_id);
922 goto out;
923 }
924
925 scnprintf(name, name_len,
926 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x",
927 ath10k_bus_str(ar->hif.bus),
928 ar->id.vendor, ar->id.device,
929 ar->id.subsystem_vendor, ar->id.subsystem_device);
930
931 out:
932 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
933
934 return 0;
935 }
936
937 static int ath10k_core_fetch_board_file(struct ath10k *ar)
938 {
939 char boardname[100];
940 int ret;
941
942 ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname));
943 if (ret) {
944 ath10k_err(ar, "failed to create board name: %d", ret);
945 return ret;
946 }
947
948 ar->bd_api = 2;
949 ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
950 ATH10K_BOARD_API2_FILE);
951 if (!ret)
952 goto success;
953
954 ar->bd_api = 1;
955 ret = ath10k_core_fetch_board_data_api_1(ar);
956 if (ret) {
957 ath10k_err(ar, "failed to fetch board data\n");
958 return ret;
959 }
960
961 success:
962 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
963 return 0;
964 }
965
966 static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
967 {
968 int ret = 0;
969
970 if (ar->hw_params.fw.fw == NULL) {
971 ath10k_err(ar, "firmware file not defined\n");
972 return -EINVAL;
973 }
974
975 ar->firmware = ath10k_fetch_fw_file(ar,
976 ar->hw_params.fw.dir,
977 ar->hw_params.fw.fw);
978 if (IS_ERR(ar->firmware)) {
979 ret = PTR_ERR(ar->firmware);
980 ath10k_err(ar, "could not fetch firmware (%d)\n", ret);
981 goto err;
982 }
983
984 ar->firmware_data = ar->firmware->data;
985 ar->firmware_len = ar->firmware->size;
986
987 /* OTP may be undefined. If so, don't fetch it at all */
988 if (ar->hw_params.fw.otp == NULL)
989 return 0;
990
991 ar->otp = ath10k_fetch_fw_file(ar,
992 ar->hw_params.fw.dir,
993 ar->hw_params.fw.otp);
994 if (IS_ERR(ar->otp)) {
995 ret = PTR_ERR(ar->otp);
996 ath10k_err(ar, "could not fetch otp (%d)\n", ret);
997 goto err;
998 }
999
1000 ar->otp_data = ar->otp->data;
1001 ar->otp_len = ar->otp->size;
1002
1003 return 0;
1004
1005 err:
1006 ath10k_core_free_firmware_files(ar);
1007 return ret;
1008 }
1009
1010 static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
1011 {
1012 size_t magic_len, len, ie_len;
1013 int ie_id, i, index, bit, ret;
1014 struct ath10k_fw_ie *hdr;
1015 const u8 *data;
1016 __le32 *timestamp, *version;
1017
1018 /* first fetch the firmware file (firmware-*.bin) */
1019 ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
1020 if (IS_ERR(ar->firmware)) {
1021 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
1022 ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
1023 return PTR_ERR(ar->firmware);
1024 }
1025
1026 data = ar->firmware->data;
1027 len = ar->firmware->size;
1028
1029 /* magic also includes the null byte, check that as well */
1030 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1031
1032 if (len < magic_len) {
1033 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1034 ar->hw_params.fw.dir, name, len);
1035 ret = -EINVAL;
1036 goto err;
1037 }
1038
1039 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1040 ath10k_err(ar, "invalid firmware magic\n");
1041 ret = -EINVAL;
1042 goto err;
1043 }
1044
1045 /* jump over the padding */
1046 magic_len = ALIGN(magic_len, 4);
1047
1048 len -= magic_len;
1049 data += magic_len;
1050
1051 /* loop elements */
1052 while (len > sizeof(struct ath10k_fw_ie)) {
1053 hdr = (struct ath10k_fw_ie *)data;
1054
1055 ie_id = le32_to_cpu(hdr->id);
1056 ie_len = le32_to_cpu(hdr->len);
1057
1058 len -= sizeof(*hdr);
1059 data += sizeof(*hdr);
1060
1061 if (len < ie_len) {
1062 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1063 ie_id, len, ie_len);
1064 ret = -EINVAL;
1065 goto err;
1066 }
1067
1068 switch (ie_id) {
1069 case ATH10K_FW_IE_FW_VERSION:
1070 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
1071 break;
1072
1073 memcpy(ar->hw->wiphy->fw_version, data, ie_len);
1074 ar->hw->wiphy->fw_version[ie_len] = '\0';
1075
1076 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1077 "found fw version %s\n",
1078 ar->hw->wiphy->fw_version);
1079 break;
1080 case ATH10K_FW_IE_TIMESTAMP:
1081 if (ie_len != sizeof(u32))
1082 break;
1083
1084 timestamp = (__le32 *)data;
1085
1086 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1087 le32_to_cpup(timestamp));
1088 break;
1089 case ATH10K_FW_IE_FEATURES:
1090 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1091 "found firmware features ie (%zd B)\n",
1092 ie_len);
1093
1094 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1095 index = i / 8;
1096 bit = i % 8;
1097
1098 if (index == ie_len)
1099 break;
1100
1101 if (data[index] & (1 << bit)) {
1102 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1103 "Enabling feature bit: %i\n",
1104 i);
1105 __set_bit(i, ar->fw_features);
1106 }
1107 }
1108
1109 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1110 ar->fw_features,
1111 sizeof(ar->fw_features));
1112 break;
1113 case ATH10K_FW_IE_FW_IMAGE:
1114 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1115 "found fw image ie (%zd B)\n",
1116 ie_len);
1117
1118 ar->firmware_data = data;
1119 ar->firmware_len = ie_len;
1120
1121 break;
1122 case ATH10K_FW_IE_OTP_IMAGE:
1123 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1124 "found otp image ie (%zd B)\n",
1125 ie_len);
1126
1127 ar->otp_data = data;
1128 ar->otp_len = ie_len;
1129
1130 break;
1131 case ATH10K_FW_IE_WMI_OP_VERSION:
1132 if (ie_len != sizeof(u32))
1133 break;
1134
1135 version = (__le32 *)data;
1136
1137 ar->wmi.op_version = le32_to_cpup(version);
1138
1139 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1140 ar->wmi.op_version);
1141 break;
1142 case ATH10K_FW_IE_HTT_OP_VERSION:
1143 if (ie_len != sizeof(u32))
1144 break;
1145
1146 version = (__le32 *)data;
1147
1148 ar->htt.op_version = le32_to_cpup(version);
1149
1150 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1151 ar->htt.op_version);
1152 break;
1153 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1154 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1155 "found fw code swap image ie (%zd B)\n",
1156 ie_len);
1157 ar->swap.firmware_codeswap_data = data;
1158 ar->swap.firmware_codeswap_len = ie_len;
1159 break;
1160 default:
1161 ath10k_warn(ar, "Unknown FW IE: %u\n",
1162 le32_to_cpu(hdr->id));
1163 break;
1164 }
1165
1166 /* jump over the padding */
1167 ie_len = ALIGN(ie_len, 4);
1168
1169 len -= ie_len;
1170 data += ie_len;
1171 }
1172
1173 if (!ar->firmware_data || !ar->firmware_len) {
1174 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
1175 ar->hw_params.fw.dir, name);
1176 ret = -ENOMEDIUM;
1177 goto err;
1178 }
1179
1180 return 0;
1181
1182 err:
1183 ath10k_core_free_firmware_files(ar);
1184 return ret;
1185 }
1186
1187 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
1188 {
1189 int ret;
1190
1191 /* calibration file is optional, don't check for any errors */
1192 ath10k_fetch_cal_file(ar);
1193
1194 ar->fw_api = 5;
1195 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1196
1197 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE);
1198 if (ret == 0)
1199 goto success;
1200
1201 ar->fw_api = 4;
1202 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1203
1204 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE);
1205 if (ret == 0)
1206 goto success;
1207
1208 ar->fw_api = 3;
1209 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1210
1211 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
1212 if (ret == 0)
1213 goto success;
1214
1215 ar->fw_api = 2;
1216 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1217
1218 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
1219 if (ret == 0)
1220 goto success;
1221
1222 ar->fw_api = 1;
1223 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1224
1225 ret = ath10k_core_fetch_firmware_api_1(ar);
1226 if (ret)
1227 return ret;
1228
1229 success:
1230 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1231
1232 return 0;
1233 }
1234
1235 static int ath10k_download_cal_data(struct ath10k *ar)
1236 {
1237 int ret;
1238
1239 ret = ath10k_download_cal_file(ar);
1240 if (ret == 0) {
1241 ar->cal_mode = ATH10K_CAL_MODE_FILE;
1242 goto done;
1243 }
1244
1245 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1246 "boot did not find a calibration file, try DT next: %d\n",
1247 ret);
1248
1249 ret = ath10k_download_cal_dt(ar);
1250 if (ret == 0) {
1251 ar->cal_mode = ATH10K_CAL_MODE_DT;
1252 goto done;
1253 }
1254
1255 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1256 "boot did not find DT entry, try OTP next: %d\n",
1257 ret);
1258
1259 ret = ath10k_download_and_run_otp(ar);
1260 if (ret) {
1261 ath10k_err(ar, "failed to run otp: %d\n", ret);
1262 return ret;
1263 }
1264
1265 ar->cal_mode = ATH10K_CAL_MODE_OTP;
1266
1267 done:
1268 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1269 ath10k_cal_mode_str(ar->cal_mode));
1270 return 0;
1271 }
1272
1273 static int ath10k_init_uart(struct ath10k *ar)
1274 {
1275 int ret;
1276
1277 /*
1278 * Explicitly setting UART prints to zero as target turns it on
1279 * based on scratch registers.
1280 */
1281 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
1282 if (ret) {
1283 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
1284 return ret;
1285 }
1286
1287 if (!uart_print)
1288 return 0;
1289
1290 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
1291 if (ret) {
1292 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1293 return ret;
1294 }
1295
1296 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
1297 if (ret) {
1298 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1299 return ret;
1300 }
1301
1302 /* Set the UART baud rate to 19200. */
1303 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
1304 if (ret) {
1305 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
1306 return ret;
1307 }
1308
1309 ath10k_info(ar, "UART prints enabled\n");
1310 return 0;
1311 }
1312
1313 static int ath10k_init_hw_params(struct ath10k *ar)
1314 {
1315 const struct ath10k_hw_params *uninitialized_var(hw_params);
1316 int i;
1317
1318 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
1319 hw_params = &ath10k_hw_params_list[i];
1320
1321 if (hw_params->id == ar->target_version &&
1322 hw_params->dev_id == ar->dev_id)
1323 break;
1324 }
1325
1326 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
1327 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
1328 ar->target_version);
1329 return -EINVAL;
1330 }
1331
1332 ar->hw_params = *hw_params;
1333
1334 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
1335 ar->hw_params.name, ar->target_version);
1336
1337 return 0;
1338 }
1339
1340 static void ath10k_core_restart(struct work_struct *work)
1341 {
1342 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
1343
1344 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1345
1346 /* Place a barrier to make sure the compiler doesn't reorder
1347 * CRASH_FLUSH and calling other functions.
1348 */
1349 barrier();
1350
1351 ieee80211_stop_queues(ar->hw);
1352 ath10k_drain_tx(ar);
1353 complete_all(&ar->scan.started);
1354 complete_all(&ar->scan.completed);
1355 complete_all(&ar->scan.on_channel);
1356 complete_all(&ar->offchan_tx_completed);
1357 complete_all(&ar->install_key_done);
1358 complete_all(&ar->vdev_setup_done);
1359 complete_all(&ar->thermal.wmi_sync);
1360 wake_up(&ar->htt.empty_tx_wq);
1361 wake_up(&ar->wmi.tx_credits_wq);
1362 wake_up(&ar->peer_mapping_wq);
1363
1364 mutex_lock(&ar->conf_mutex);
1365
1366 switch (ar->state) {
1367 case ATH10K_STATE_ON:
1368 ar->state = ATH10K_STATE_RESTARTING;
1369 ath10k_hif_stop(ar);
1370 ath10k_scan_finish(ar);
1371 ieee80211_restart_hw(ar->hw);
1372 break;
1373 case ATH10K_STATE_OFF:
1374 /* this can happen if driver is being unloaded
1375 * or if the crash happens during FW probing */
1376 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
1377 break;
1378 case ATH10K_STATE_RESTARTING:
1379 /* hw restart might be requested from multiple places */
1380 break;
1381 case ATH10K_STATE_RESTARTED:
1382 ar->state = ATH10K_STATE_WEDGED;
1383 /* fall through */
1384 case ATH10K_STATE_WEDGED:
1385 ath10k_warn(ar, "device is wedged, will not restart\n");
1386 break;
1387 case ATH10K_STATE_UTF:
1388 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
1389 break;
1390 }
1391
1392 mutex_unlock(&ar->conf_mutex);
1393 }
1394
1395 static int ath10k_core_init_firmware_features(struct ath10k *ar)
1396 {
1397 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
1398 !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
1399 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
1400 return -EINVAL;
1401 }
1402
1403 if (ar->wmi.op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
1404 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
1405 ATH10K_FW_WMI_OP_VERSION_MAX, ar->wmi.op_version);
1406 return -EINVAL;
1407 }
1408
1409 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
1410 switch (ath10k_cryptmode_param) {
1411 case ATH10K_CRYPT_MODE_HW:
1412 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1413 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1414 break;
1415 case ATH10K_CRYPT_MODE_SW:
1416 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1417 ar->fw_features)) {
1418 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
1419 return -EINVAL;
1420 }
1421
1422 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1423 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1424 break;
1425 default:
1426 ath10k_info(ar, "invalid cryptmode: %d\n",
1427 ath10k_cryptmode_param);
1428 return -EINVAL;
1429 }
1430
1431 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
1432 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
1433
1434 if (rawmode) {
1435 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1436 ar->fw_features)) {
1437 ath10k_err(ar, "rawmode = 1 requires support from firmware");
1438 return -EINVAL;
1439 }
1440 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1441 }
1442
1443 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
1444 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
1445
1446 /* Workaround:
1447 *
1448 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
1449 * and causes enormous performance issues (malformed frames,
1450 * etc).
1451 *
1452 * Disabling A-MSDU makes RAW mode stable with heavy traffic
1453 * albeit a bit slower compared to regular operation.
1454 */
1455 ar->htt.max_num_amsdu = 1;
1456 }
1457
1458 /* Backwards compatibility for firmwares without
1459 * ATH10K_FW_IE_WMI_OP_VERSION.
1460 */
1461 if (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
1462 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
1463 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
1464 ar->fw_features))
1465 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
1466 else
1467 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
1468 } else {
1469 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
1470 }
1471 }
1472
1473 switch (ar->wmi.op_version) {
1474 case ATH10K_FW_WMI_OP_VERSION_MAIN:
1475 ar->max_num_peers = TARGET_NUM_PEERS;
1476 ar->max_num_stations = TARGET_NUM_STATIONS;
1477 ar->max_num_vdevs = TARGET_NUM_VDEVS;
1478 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
1479 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1480 WMI_STAT_PEER;
1481 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1482 break;
1483 case ATH10K_FW_WMI_OP_VERSION_10_1:
1484 case ATH10K_FW_WMI_OP_VERSION_10_2:
1485 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1486 ar->max_num_peers = TARGET_10X_NUM_PEERS;
1487 ar->max_num_stations = TARGET_10X_NUM_STATIONS;
1488 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
1489 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
1490 ar->fw_stats_req_mask = WMI_STAT_PEER;
1491 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1492 break;
1493 case ATH10K_FW_WMI_OP_VERSION_TLV:
1494 ar->max_num_peers = TARGET_TLV_NUM_PEERS;
1495 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
1496 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
1497 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
1498 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
1499 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
1500 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1501 WMI_STAT_PEER;
1502 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1503 break;
1504 case ATH10K_FW_WMI_OP_VERSION_10_4:
1505 ar->max_num_peers = TARGET_10_4_NUM_PEERS;
1506 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
1507 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
1508 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
1509 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
1510 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
1511 ar->fw_stats_req_mask = WMI_STAT_PEER;
1512 ar->max_spatial_stream = WMI_10_4_MAX_SPATIAL_STREAM;
1513 break;
1514 case ATH10K_FW_WMI_OP_VERSION_UNSET:
1515 case ATH10K_FW_WMI_OP_VERSION_MAX:
1516 WARN_ON(1);
1517 return -EINVAL;
1518 }
1519
1520 /* Backwards compatibility for firmwares without
1521 * ATH10K_FW_IE_HTT_OP_VERSION.
1522 */
1523 if (ar->htt.op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
1524 switch (ar->wmi.op_version) {
1525 case ATH10K_FW_WMI_OP_VERSION_MAIN:
1526 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
1527 break;
1528 case ATH10K_FW_WMI_OP_VERSION_10_1:
1529 case ATH10K_FW_WMI_OP_VERSION_10_2:
1530 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1531 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
1532 break;
1533 case ATH10K_FW_WMI_OP_VERSION_TLV:
1534 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
1535 break;
1536 case ATH10K_FW_WMI_OP_VERSION_10_4:
1537 case ATH10K_FW_WMI_OP_VERSION_UNSET:
1538 case ATH10K_FW_WMI_OP_VERSION_MAX:
1539 WARN_ON(1);
1540 return -EINVAL;
1541 }
1542 }
1543
1544 return 0;
1545 }
1546
1547 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
1548 {
1549 int status;
1550
1551 lockdep_assert_held(&ar->conf_mutex);
1552
1553 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1554
1555 ath10k_bmi_start(ar);
1556
1557 if (ath10k_init_configure_target(ar)) {
1558 status = -EINVAL;
1559 goto err;
1560 }
1561
1562 status = ath10k_download_cal_data(ar);
1563 if (status)
1564 goto err;
1565
1566 /* Some of of qca988x solutions are having global reset issue
1567 * during target initialization. Bypassing PLL setting before
1568 * downloading firmware and letting the SoC run on REF_CLK is
1569 * fixing the problem. Corresponding firmware change is also needed
1570 * to set the clock source once the target is initialized.
1571 */
1572 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
1573 ar->fw_features)) {
1574 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
1575 if (status) {
1576 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
1577 status);
1578 goto err;
1579 }
1580 }
1581
1582 status = ath10k_download_fw(ar, mode);
1583 if (status)
1584 goto err;
1585
1586 status = ath10k_init_uart(ar);
1587 if (status)
1588 goto err;
1589
1590 ar->htc.htc_ops.target_send_suspend_complete =
1591 ath10k_send_suspend_complete;
1592
1593 status = ath10k_htc_init(ar);
1594 if (status) {
1595 ath10k_err(ar, "could not init HTC (%d)\n", status);
1596 goto err;
1597 }
1598
1599 status = ath10k_bmi_done(ar);
1600 if (status)
1601 goto err;
1602
1603 status = ath10k_wmi_attach(ar);
1604 if (status) {
1605 ath10k_err(ar, "WMI attach failed: %d\n", status);
1606 goto err;
1607 }
1608
1609 status = ath10k_htt_init(ar);
1610 if (status) {
1611 ath10k_err(ar, "failed to init htt: %d\n", status);
1612 goto err_wmi_detach;
1613 }
1614
1615 status = ath10k_htt_tx_alloc(&ar->htt);
1616 if (status) {
1617 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
1618 goto err_wmi_detach;
1619 }
1620
1621 /* If firmware indicates Full Rx Reorder support it must be used in a
1622 * slightly different manner. Let HTT code know.
1623 */
1624 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
1625 ar->wmi.svc_map));
1626
1627 status = ath10k_htt_rx_alloc(&ar->htt);
1628 if (status) {
1629 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
1630 goto err_htt_tx_detach;
1631 }
1632
1633 status = ath10k_hif_start(ar);
1634 if (status) {
1635 ath10k_err(ar, "could not start HIF: %d\n", status);
1636 goto err_htt_rx_detach;
1637 }
1638
1639 status = ath10k_htc_wait_target(&ar->htc);
1640 if (status) {
1641 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
1642 goto err_hif_stop;
1643 }
1644
1645 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1646 status = ath10k_htt_connect(&ar->htt);
1647 if (status) {
1648 ath10k_err(ar, "failed to connect htt (%d)\n", status);
1649 goto err_hif_stop;
1650 }
1651 }
1652
1653 status = ath10k_wmi_connect(ar);
1654 if (status) {
1655 ath10k_err(ar, "could not connect wmi: %d\n", status);
1656 goto err_hif_stop;
1657 }
1658
1659 status = ath10k_htc_start(&ar->htc);
1660 if (status) {
1661 ath10k_err(ar, "failed to start htc: %d\n", status);
1662 goto err_hif_stop;
1663 }
1664
1665 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1666 status = ath10k_wmi_wait_for_service_ready(ar);
1667 if (status) {
1668 ath10k_warn(ar, "wmi service ready event not received");
1669 goto err_hif_stop;
1670 }
1671 }
1672
1673 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
1674 ar->hw->wiphy->fw_version);
1675
1676 status = ath10k_wmi_cmd_init(ar);
1677 if (status) {
1678 ath10k_err(ar, "could not send WMI init command (%d)\n",
1679 status);
1680 goto err_hif_stop;
1681 }
1682
1683 status = ath10k_wmi_wait_for_unified_ready(ar);
1684 if (status) {
1685 ath10k_err(ar, "wmi unified ready event not received\n");
1686 goto err_hif_stop;
1687 }
1688
1689 status = ath10k_htt_rx_ring_refill(ar);
1690 if (status) {
1691 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
1692 goto err_hif_stop;
1693 }
1694
1695 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
1696
1697 INIT_LIST_HEAD(&ar->arvifs);
1698
1699 /* we don't care about HTT in UTF mode */
1700 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1701 status = ath10k_htt_setup(&ar->htt);
1702 if (status) {
1703 ath10k_err(ar, "failed to setup htt: %d\n", status);
1704 goto err_hif_stop;
1705 }
1706 }
1707
1708 status = ath10k_debug_start(ar);
1709 if (status)
1710 goto err_hif_stop;
1711
1712 return 0;
1713
1714 err_hif_stop:
1715 ath10k_hif_stop(ar);
1716 err_htt_rx_detach:
1717 ath10k_htt_rx_free(&ar->htt);
1718 err_htt_tx_detach:
1719 ath10k_htt_tx_free(&ar->htt);
1720 err_wmi_detach:
1721 ath10k_wmi_detach(ar);
1722 err:
1723 return status;
1724 }
1725 EXPORT_SYMBOL(ath10k_core_start);
1726
1727 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
1728 {
1729 int ret;
1730 unsigned long time_left;
1731
1732 reinit_completion(&ar->target_suspend);
1733
1734 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
1735 if (ret) {
1736 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
1737 return ret;
1738 }
1739
1740 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
1741
1742 if (!time_left) {
1743 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
1744 return -ETIMEDOUT;
1745 }
1746
1747 return 0;
1748 }
1749
1750 void ath10k_core_stop(struct ath10k *ar)
1751 {
1752 lockdep_assert_held(&ar->conf_mutex);
1753 ath10k_debug_stop(ar);
1754
1755 /* try to suspend target */
1756 if (ar->state != ATH10K_STATE_RESTARTING &&
1757 ar->state != ATH10K_STATE_UTF)
1758 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
1759
1760 ath10k_hif_stop(ar);
1761 ath10k_htt_tx_free(&ar->htt);
1762 ath10k_htt_rx_free(&ar->htt);
1763 ath10k_wmi_detach(ar);
1764 }
1765 EXPORT_SYMBOL(ath10k_core_stop);
1766
1767 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
1768 * order to know what hw capabilities should be advertised to mac80211 it is
1769 * necessary to load the firmware (and tear it down immediately since start
1770 * hook will try to init it again) before registering */
1771 static int ath10k_core_probe_fw(struct ath10k *ar)
1772 {
1773 struct bmi_target_info target_info;
1774 int ret = 0;
1775
1776 ret = ath10k_hif_power_up(ar);
1777 if (ret) {
1778 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
1779 return ret;
1780 }
1781
1782 memset(&target_info, 0, sizeof(target_info));
1783 ret = ath10k_bmi_get_target_info(ar, &target_info);
1784 if (ret) {
1785 ath10k_err(ar, "could not get target info (%d)\n", ret);
1786 goto err_power_down;
1787 }
1788
1789 ar->target_version = target_info.version;
1790 ar->hw->wiphy->hw_version = target_info.version;
1791
1792 ret = ath10k_init_hw_params(ar);
1793 if (ret) {
1794 ath10k_err(ar, "could not get hw params (%d)\n", ret);
1795 goto err_power_down;
1796 }
1797
1798 ret = ath10k_core_fetch_firmware_files(ar);
1799 if (ret) {
1800 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
1801 goto err_power_down;
1802 }
1803
1804 ret = ath10k_core_get_board_id_from_otp(ar);
1805 if (ret && ret != -EOPNOTSUPP) {
1806 ath10k_err(ar, "failed to get board id from otp for qca99x0: %d\n",
1807 ret);
1808 return ret;
1809 }
1810
1811 ret = ath10k_core_fetch_board_file(ar);
1812 if (ret) {
1813 ath10k_err(ar, "failed to fetch board file: %d\n", ret);
1814 goto err_free_firmware_files;
1815 }
1816
1817 ret = ath10k_core_init_firmware_features(ar);
1818 if (ret) {
1819 ath10k_err(ar, "fatal problem with firmware features: %d\n",
1820 ret);
1821 goto err_free_firmware_files;
1822 }
1823
1824 ret = ath10k_swap_code_seg_init(ar);
1825 if (ret) {
1826 ath10k_err(ar, "failed to initialize code swap segment: %d\n",
1827 ret);
1828 goto err_free_firmware_files;
1829 }
1830
1831 mutex_lock(&ar->conf_mutex);
1832
1833 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL);
1834 if (ret) {
1835 ath10k_err(ar, "could not init core (%d)\n", ret);
1836 goto err_unlock;
1837 }
1838
1839 ath10k_print_driver_info(ar);
1840 ath10k_core_stop(ar);
1841
1842 mutex_unlock(&ar->conf_mutex);
1843
1844 ath10k_hif_power_down(ar);
1845 return 0;
1846
1847 err_unlock:
1848 mutex_unlock(&ar->conf_mutex);
1849
1850 err_free_firmware_files:
1851 ath10k_core_free_firmware_files(ar);
1852
1853 err_power_down:
1854 ath10k_hif_power_down(ar);
1855
1856 return ret;
1857 }
1858
1859 static void ath10k_core_register_work(struct work_struct *work)
1860 {
1861 struct ath10k *ar = container_of(work, struct ath10k, register_work);
1862 int status;
1863
1864 status = ath10k_core_probe_fw(ar);
1865 if (status) {
1866 ath10k_err(ar, "could not probe fw (%d)\n", status);
1867 goto err;
1868 }
1869
1870 status = ath10k_mac_register(ar);
1871 if (status) {
1872 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
1873 goto err_release_fw;
1874 }
1875
1876 status = ath10k_debug_register(ar);
1877 if (status) {
1878 ath10k_err(ar, "unable to initialize debugfs\n");
1879 goto err_unregister_mac;
1880 }
1881
1882 status = ath10k_spectral_create(ar);
1883 if (status) {
1884 ath10k_err(ar, "failed to initialize spectral\n");
1885 goto err_debug_destroy;
1886 }
1887
1888 status = ath10k_thermal_register(ar);
1889 if (status) {
1890 ath10k_err(ar, "could not register thermal device: %d\n",
1891 status);
1892 goto err_spectral_destroy;
1893 }
1894
1895 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
1896 return;
1897
1898 err_spectral_destroy:
1899 ath10k_spectral_destroy(ar);
1900 err_debug_destroy:
1901 ath10k_debug_destroy(ar);
1902 err_unregister_mac:
1903 ath10k_mac_unregister(ar);
1904 err_release_fw:
1905 ath10k_core_free_firmware_files(ar);
1906 err:
1907 /* TODO: It's probably a good idea to release device from the driver
1908 * but calling device_release_driver() here will cause a deadlock.
1909 */
1910 return;
1911 }
1912
1913 int ath10k_core_register(struct ath10k *ar, u32 chip_id)
1914 {
1915 ar->chip_id = chip_id;
1916 queue_work(ar->workqueue, &ar->register_work);
1917
1918 return 0;
1919 }
1920 EXPORT_SYMBOL(ath10k_core_register);
1921
1922 void ath10k_core_unregister(struct ath10k *ar)
1923 {
1924 cancel_work_sync(&ar->register_work);
1925
1926 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
1927 return;
1928
1929 ath10k_thermal_unregister(ar);
1930 /* Stop spectral before unregistering from mac80211 to remove the
1931 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
1932 * would be already be free'd recursively, leading to a double free.
1933 */
1934 ath10k_spectral_destroy(ar);
1935
1936 /* We must unregister from mac80211 before we stop HTC and HIF.
1937 * Otherwise we will fail to submit commands to FW and mac80211 will be
1938 * unhappy about callback failures. */
1939 ath10k_mac_unregister(ar);
1940
1941 ath10k_testmode_destroy(ar);
1942
1943 ath10k_core_free_firmware_files(ar);
1944 ath10k_core_free_board_files(ar);
1945
1946 ath10k_debug_unregister(ar);
1947 }
1948 EXPORT_SYMBOL(ath10k_core_unregister);
1949
1950 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
1951 enum ath10k_bus bus,
1952 enum ath10k_hw_rev hw_rev,
1953 const struct ath10k_hif_ops *hif_ops)
1954 {
1955 struct ath10k *ar;
1956 int ret;
1957
1958 ar = ath10k_mac_create(priv_size);
1959 if (!ar)
1960 return NULL;
1961
1962 ar->ath_common.priv = ar;
1963 ar->ath_common.hw = ar->hw;
1964 ar->dev = dev;
1965 ar->hw_rev = hw_rev;
1966 ar->hif.ops = hif_ops;
1967 ar->hif.bus = bus;
1968
1969 switch (hw_rev) {
1970 case ATH10K_HW_QCA988X:
1971 ar->regs = &qca988x_regs;
1972 ar->hw_values = &qca988x_values;
1973 break;
1974 case ATH10K_HW_QCA6174:
1975 case ATH10K_HW_QCA9377:
1976 ar->regs = &qca6174_regs;
1977 ar->hw_values = &qca6174_values;
1978 break;
1979 case ATH10K_HW_QCA99X0:
1980 ar->regs = &qca99x0_regs;
1981 ar->hw_values = &qca99x0_values;
1982 break;
1983 default:
1984 ath10k_err(ar, "unsupported core hardware revision %d\n",
1985 hw_rev);
1986 ret = -ENOTSUPP;
1987 goto err_free_mac;
1988 }
1989
1990 init_completion(&ar->scan.started);
1991 init_completion(&ar->scan.completed);
1992 init_completion(&ar->scan.on_channel);
1993 init_completion(&ar->target_suspend);
1994 init_completion(&ar->wow.wakeup_completed);
1995
1996 init_completion(&ar->install_key_done);
1997 init_completion(&ar->vdev_setup_done);
1998 init_completion(&ar->thermal.wmi_sync);
1999
2000 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
2001
2002 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
2003 if (!ar->workqueue)
2004 goto err_free_mac;
2005
2006 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
2007 if (!ar->workqueue_aux)
2008 goto err_free_wq;
2009
2010 mutex_init(&ar->conf_mutex);
2011 spin_lock_init(&ar->data_lock);
2012
2013 INIT_LIST_HEAD(&ar->peers);
2014 init_waitqueue_head(&ar->peer_mapping_wq);
2015 init_waitqueue_head(&ar->htt.empty_tx_wq);
2016 init_waitqueue_head(&ar->wmi.tx_credits_wq);
2017
2018 init_completion(&ar->offchan_tx_completed);
2019 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
2020 skb_queue_head_init(&ar->offchan_tx_queue);
2021
2022 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
2023 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
2024
2025 INIT_WORK(&ar->register_work, ath10k_core_register_work);
2026 INIT_WORK(&ar->restart_work, ath10k_core_restart);
2027
2028 ret = ath10k_debug_create(ar);
2029 if (ret)
2030 goto err_free_aux_wq;
2031
2032 return ar;
2033
2034 err_free_aux_wq:
2035 destroy_workqueue(ar->workqueue_aux);
2036 err_free_wq:
2037 destroy_workqueue(ar->workqueue);
2038
2039 err_free_mac:
2040 ath10k_mac_destroy(ar);
2041
2042 return NULL;
2043 }
2044 EXPORT_SYMBOL(ath10k_core_create);
2045
2046 void ath10k_core_destroy(struct ath10k *ar)
2047 {
2048 flush_workqueue(ar->workqueue);
2049 destroy_workqueue(ar->workqueue);
2050
2051 flush_workqueue(ar->workqueue_aux);
2052 destroy_workqueue(ar->workqueue_aux);
2053
2054 ath10k_debug_destroy(ar);
2055 ath10k_wmi_free_host_mem(ar);
2056 ath10k_mac_destroy(ar);
2057 }
2058 EXPORT_SYMBOL(ath10k_core_destroy);
2059
2060 MODULE_AUTHOR("Qualcomm Atheros");
2061 MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
2062 MODULE_LICENSE("Dual BSD/GPL");
Linux with added FPC-III support