Linux 4.4.145
[linux/fpc-iii.git] / drivers / net / wireless / ath / ath10k / swap.h
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1 /*
2 * Copyright (c) 2015 Qualcomm Atheros, Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #ifndef _SWAP_H_
18 #define _SWAP_H_
20 #define ATH10K_SWAP_CODE_SEG_BIN_LEN_MAX (512 * 1024)
21 #define ATH10K_SWAP_CODE_SEG_MAGIC_BYTES_SZ 12
22 #define ATH10K_SWAP_CODE_SEG_NUM_MAX 16
23 /* Currently only one swap segment is supported */
24 #define ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED 1
26 struct ath10k_swap_code_seg_tlv {
27 __le32 address;
28 __le32 length;
29 u8 data[0];
30 } __packed;
32 struct ath10k_swap_code_seg_tail {
33 u8 magic_signature[ATH10K_SWAP_CODE_SEG_MAGIC_BYTES_SZ];
34 __le32 bmi_write_addr;
35 } __packed;
37 union ath10k_swap_code_seg_item {
38 struct ath10k_swap_code_seg_tlv tlv;
39 struct ath10k_swap_code_seg_tail tail;
40 } __packed;
42 enum ath10k_swap_code_seg_bin_type {
43 ATH10K_SWAP_CODE_SEG_BIN_TYPE_OTP,
44 ATH10K_SWAP_CODE_SEG_BIN_TYPE_FW,
45 ATH10K_SWAP_CODE_SEG_BIN_TYPE_UTF,
48 struct ath10k_swap_code_seg_hw_info {
49 /* Swap binary image size */
50 __le32 swap_size;
51 __le32 num_segs;
53 /* Swap data size */
54 __le32 size;
55 __le32 size_log2;
56 __le32 bus_addr[ATH10K_SWAP_CODE_SEG_NUM_MAX];
57 __le64 reserved[ATH10K_SWAP_CODE_SEG_NUM_MAX];
58 } __packed;
60 struct ath10k_swap_code_seg_info {
61 struct ath10k_swap_code_seg_hw_info seg_hw_info;
62 void *virt_address[ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED];
63 u32 target_addr;
64 dma_addr_t paddr[ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED];
67 int ath10k_swap_code_seg_configure(struct ath10k *ar,
68 enum ath10k_swap_code_seg_bin_type type);
69 void ath10k_swap_code_seg_release(struct ath10k *ar);
70 int ath10k_swap_code_seg_init(struct ath10k *ar);
72 #endif