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Linux 4.4.145
[linux/fpc-iii.git] / drivers / net / wireless / ath / ath6kl / init.c
blob6ae0734f86e0f9e58053362307273921e9fdfd67
1
2 /*
3 * Copyright (c) 2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
21 #include <linux/moduleparam.h>
22 #include <linux/errno.h>
23 #include <linux/export.h>
24 #include <linux/of.h>
25 #include <linux/mmc/sdio_func.h>
26 #include <linux/vmalloc.h>
27
28 #include "core.h"
29 #include "cfg80211.h"
30 #include "target.h"
31 #include "debug.h"
32 #include "hif-ops.h"
33 #include "htc-ops.h"
34
35 static const struct ath6kl_hw hw_list[] = {
36 {
37 .id = AR6003_HW_2_0_VERSION,
38 .name = "ar6003 hw 2.0",
39 .dataset_patch_addr = 0x57e884,
40 .app_load_addr = 0x543180,
41 .board_ext_data_addr = 0x57e500,
42 .reserved_ram_size = 6912,
43 .refclk_hz = 26000000,
44 .uarttx_pin = 8,
45 .flags = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
46
47 /* hw2.0 needs override address hardcoded */
48 .app_start_override_addr = 0x944C00,
49
50 .fw = {
51 .dir = AR6003_HW_2_0_FW_DIR,
52 .otp = AR6003_HW_2_0_OTP_FILE,
53 .fw = AR6003_HW_2_0_FIRMWARE_FILE,
54 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
55 .patch = AR6003_HW_2_0_PATCH_FILE,
56 },
57
58 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
59 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
60 },
61 {
62 .id = AR6003_HW_2_1_1_VERSION,
63 .name = "ar6003 hw 2.1.1",
64 .dataset_patch_addr = 0x57ff74,
65 .app_load_addr = 0x1234,
66 .board_ext_data_addr = 0x542330,
67 .reserved_ram_size = 512,
68 .refclk_hz = 26000000,
69 .uarttx_pin = 8,
70 .testscript_addr = 0x57ef74,
71 .flags = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
72
73 .fw = {
74 .dir = AR6003_HW_2_1_1_FW_DIR,
75 .otp = AR6003_HW_2_1_1_OTP_FILE,
76 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
77 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
78 .patch = AR6003_HW_2_1_1_PATCH_FILE,
79 .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
80 .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
81 },
82
83 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
84 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
85 },
86 {
87 .id = AR6004_HW_1_0_VERSION,
88 .name = "ar6004 hw 1.0",
89 .dataset_patch_addr = 0x57e884,
90 .app_load_addr = 0x1234,
91 .board_ext_data_addr = 0x437000,
92 .reserved_ram_size = 19456,
93 .board_addr = 0x433900,
94 .refclk_hz = 26000000,
95 .uarttx_pin = 11,
96 .flags = 0,
97
98 .fw = {
99 .dir = AR6004_HW_1_0_FW_DIR,
100 .fw = AR6004_HW_1_0_FIRMWARE_FILE,
101 },
102
103 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
104 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
105 },
106 {
107 .id = AR6004_HW_1_1_VERSION,
108 .name = "ar6004 hw 1.1",
109 .dataset_patch_addr = 0x57e884,
110 .app_load_addr = 0x1234,
111 .board_ext_data_addr = 0x437000,
112 .reserved_ram_size = 11264,
113 .board_addr = 0x43d400,
114 .refclk_hz = 40000000,
115 .uarttx_pin = 11,
116 .flags = 0,
117 .fw = {
118 .dir = AR6004_HW_1_1_FW_DIR,
119 .fw = AR6004_HW_1_1_FIRMWARE_FILE,
120 },
121
122 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
123 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
124 },
125 {
126 .id = AR6004_HW_1_2_VERSION,
127 .name = "ar6004 hw 1.2",
128 .dataset_patch_addr = 0x436ecc,
129 .app_load_addr = 0x1234,
130 .board_ext_data_addr = 0x437000,
131 .reserved_ram_size = 9216,
132 .board_addr = 0x435c00,
133 .refclk_hz = 40000000,
134 .uarttx_pin = 11,
135 .flags = 0,
136
137 .fw = {
138 .dir = AR6004_HW_1_2_FW_DIR,
139 .fw = AR6004_HW_1_2_FIRMWARE_FILE,
140 },
141 .fw_board = AR6004_HW_1_2_BOARD_DATA_FILE,
142 .fw_default_board = AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE,
143 },
144 {
145 .id = AR6004_HW_1_3_VERSION,
146 .name = "ar6004 hw 1.3",
147 .dataset_patch_addr = 0x437860,
148 .app_load_addr = 0x1234,
149 .board_ext_data_addr = 0x437000,
150 .reserved_ram_size = 7168,
151 .board_addr = 0x436400,
152 .refclk_hz = 0,
153 .uarttx_pin = 11,
154 .flags = 0,
155
156 .fw = {
157 .dir = AR6004_HW_1_3_FW_DIR,
158 .fw = AR6004_HW_1_3_FIRMWARE_FILE,
159 .tcmd = AR6004_HW_1_3_TCMD_FIRMWARE_FILE,
160 .utf = AR6004_HW_1_3_UTF_FIRMWARE_FILE,
161 .testscript = AR6004_HW_1_3_TESTSCRIPT_FILE,
162 },
163
164 .fw_board = AR6004_HW_1_3_BOARD_DATA_FILE,
165 .fw_default_board = AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE,
166 },
167 {
168 .id = AR6004_HW_3_0_VERSION,
169 .name = "ar6004 hw 3.0",
170 .dataset_patch_addr = 0,
171 .app_load_addr = 0x1234,
172 .board_ext_data_addr = 0,
173 .reserved_ram_size = 7168,
174 .board_addr = 0x436400,
175 .testscript_addr = 0,
176 .flags = 0,
177
178 .fw = {
179 .dir = AR6004_HW_3_0_FW_DIR,
180 .fw = AR6004_HW_3_0_FIRMWARE_FILE,
181 .tcmd = AR6004_HW_3_0_TCMD_FIRMWARE_FILE,
182 .utf = AR6004_HW_3_0_UTF_FIRMWARE_FILE,
183 .testscript = AR6004_HW_3_0_TESTSCRIPT_FILE,
184 },
185
186 .fw_board = AR6004_HW_3_0_BOARD_DATA_FILE,
187 .fw_default_board = AR6004_HW_3_0_DEFAULT_BOARD_DATA_FILE,
188 },
189 };
190
191 /*
192 * Include definitions here that can be used to tune the WLAN module
193 * behavior. Different customers can tune the behavior as per their needs,
194 * here.
195 */
196
197 /*
198 * This configuration item enable/disable keepalive support.
199 * Keepalive support: In the absence of any data traffic to AP, null
200 * frames will be sent to the AP at periodic interval, to keep the association
201 * active. This configuration item defines the periodic interval.
202 * Use value of zero to disable keepalive support
203 * Default: 60 seconds
204 */
205 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
206
207 /*
208 * This configuration item sets the value of disconnect timeout
209 * Firmware delays sending the disconnec event to the host for this
210 * timeout after is gets disconnected from the current AP.
211 * If the firmware successly roams within the disconnect timeout
212 * it sends a new connect event
213 */
214 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
215
216
217 #define ATH6KL_DATA_OFFSET 64
218 struct sk_buff *ath6kl_buf_alloc(int size)
219 {
220 struct sk_buff *skb;
221 u16 reserved;
222
223 /* Add chacheline space at front and back of buffer */
224 reserved = roundup((2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
225 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES, 4);
226 skb = dev_alloc_skb(size + reserved);
227
228 if (skb)
229 skb_reserve(skb, reserved - L1_CACHE_BYTES);
230 return skb;
231 }
232
233 void ath6kl_init_profile_info(struct ath6kl_vif *vif)
234 {
235 vif->ssid_len = 0;
236 memset(vif->ssid, 0, sizeof(vif->ssid));
237
238 vif->dot11_auth_mode = OPEN_AUTH;
239 vif->auth_mode = NONE_AUTH;
240 vif->prwise_crypto = NONE_CRYPT;
241 vif->prwise_crypto_len = 0;
242 vif->grp_crypto = NONE_CRYPT;
243 vif->grp_crypto_len = 0;
244 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
245 memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
246 memset(vif->bssid, 0, sizeof(vif->bssid));
247 vif->bss_ch = 0;
248 }
249
250 static int ath6kl_set_host_app_area(struct ath6kl *ar)
251 {
252 u32 address, data;
253 struct host_app_area host_app_area;
254
255 /* Fetch the address of the host_app_area_s
256 * instance in the host interest area */
257 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
258 address = TARG_VTOP(ar->target_type, address);
259
260 if (ath6kl_diag_read32(ar, address, &data))
261 return -EIO;
262
263 address = TARG_VTOP(ar->target_type, data);
264 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
265 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
266 sizeof(struct host_app_area)))
267 return -EIO;
268
269 return 0;
270 }
271
272 static inline void set_ac2_ep_map(struct ath6kl *ar,
273 u8 ac,
274 enum htc_endpoint_id ep)
275 {
276 ar->ac2ep_map[ac] = ep;
277 ar->ep2ac_map[ep] = ac;
278 }
279
280 /* connect to a service */
281 static int ath6kl_connectservice(struct ath6kl *ar,
282 struct htc_service_connect_req *con_req,
283 char *desc)
284 {
285 int status;
286 struct htc_service_connect_resp response;
287
288 memset(&response, 0, sizeof(response));
289
290 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
291 if (status) {
292 ath6kl_err("failed to connect to %s service status:%d\n",
293 desc, status);
294 return status;
295 }
296
297 switch (con_req->svc_id) {
298 case WMI_CONTROL_SVC:
299 if (test_bit(WMI_ENABLED, &ar->flag))
300 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
301 ar->ctrl_ep = response.endpoint;
302 break;
303 case WMI_DATA_BE_SVC:
304 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
305 break;
306 case WMI_DATA_BK_SVC:
307 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
308 break;
309 case WMI_DATA_VI_SVC:
310 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
311 break;
312 case WMI_DATA_VO_SVC:
313 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
314 break;
315 default:
316 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
317 return -EINVAL;
318 }
319
320 return 0;
321 }
322
323 static int ath6kl_init_service_ep(struct ath6kl *ar)
324 {
325 struct htc_service_connect_req connect;
326
327 memset(&connect, 0, sizeof(connect));
328
329 /* these fields are the same for all service endpoints */
330 connect.ep_cb.tx_comp_multi = ath6kl_tx_complete;
331 connect.ep_cb.rx = ath6kl_rx;
332 connect.ep_cb.rx_refill = ath6kl_rx_refill;
333 connect.ep_cb.tx_full = ath6kl_tx_queue_full;
334
335 /*
336 * Set the max queue depth so that our ath6kl_tx_queue_full handler
337 * gets called.
338 */
339 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
340 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
341 if (!connect.ep_cb.rx_refill_thresh)
342 connect.ep_cb.rx_refill_thresh++;
343
344 /* connect to control service */
345 connect.svc_id = WMI_CONTROL_SVC;
346 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
347 return -EIO;
348
349 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
350
351 /*
352 * Limit the HTC message size on the send path, although e can
353 * receive A-MSDU frames of 4K, we will only send ethernet-sized
354 * (802.3) frames on the send path.
355 */
356 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
357
358 /*
359 * To reduce the amount of committed memory for larger A_MSDU
360 * frames, use the recv-alloc threshold mechanism for larger
361 * packets.
362 */
363 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
364 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
365
366 /*
367 * For the remaining data services set the connection flag to
368 * reduce dribbling, if configured to do so.
369 */
370 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
371 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
372 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
373
374 connect.svc_id = WMI_DATA_BE_SVC;
375
376 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
377 return -EIO;
378
379 /* connect to back-ground map this to WMI LOW_PRI */
380 connect.svc_id = WMI_DATA_BK_SVC;
381 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
382 return -EIO;
383
384 /* connect to Video service, map this to HI PRI */
385 connect.svc_id = WMI_DATA_VI_SVC;
386 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
387 return -EIO;
388
389 /*
390 * Connect to VO service, this is currently not mapped to a WMI
391 * priority stream due to historical reasons. WMI originally
392 * defined 3 priorities over 3 mailboxes We can change this when
393 * WMI is reworked so that priorities are not dependent on
394 * mailboxes.
395 */
396 connect.svc_id = WMI_DATA_VO_SVC;
397 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
398 return -EIO;
399
400 return 0;
401 }
402
403 void ath6kl_init_control_info(struct ath6kl_vif *vif)
404 {
405 ath6kl_init_profile_info(vif);
406 vif->def_txkey_index = 0;
407 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
408 vif->ch_hint = 0;
409 }
410
411 /*
412 * Set HTC/Mbox operational parameters, this can only be called when the
413 * target is in the BMI phase.
414 */
415 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
416 u8 htc_ctrl_buf)
417 {
418 int status;
419 u32 blk_size;
420
421 blk_size = ar->mbox_info.block_size;
422
423 if (htc_ctrl_buf)
424 blk_size |= ((u32)htc_ctrl_buf) << 16;
425
426 /* set the host interest area for the block size */
427 status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size);
428 if (status) {
429 ath6kl_err("bmi_write_memory for IO block size failed\n");
430 goto out;
431 }
432
433 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
434 blk_size,
435 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
436
437 if (mbox_isr_yield_val) {
438 /* set the host interest area for the mbox ISR yield limit */
439 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit,
440 mbox_isr_yield_val);
441 if (status) {
442 ath6kl_err("bmi_write_memory for yield limit failed\n");
443 goto out;
444 }
445 }
446
447 out:
448 return status;
449 }
450
451 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
452 {
453 int ret;
454
455 /*
456 * Configure the device for rx dot11 header rules. "0,0" are the
457 * default values. Required if checksum offload is needed. Set
458 * RxMetaVersion to 2.
459 */
460 ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
461 ar->rx_meta_ver, 0, 0);
462 if (ret) {
463 ath6kl_err("unable to set the rx frame format: %d\n", ret);
464 return ret;
465 }
466
467 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) {
468 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
469 IGNORE_PS_FAIL_DURING_SCAN);
470 if (ret) {
471 ath6kl_err("unable to set power save fail event policy: %d\n",
472 ret);
473 return ret;
474 }
475 }
476
477 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) {
478 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
479 WMI_FOLLOW_BARKER_IN_ERP);
480 if (ret) {
481 ath6kl_err("unable to set barker preamble policy: %d\n",
482 ret);
483 return ret;
484 }
485 }
486
487 ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
488 WLAN_CONFIG_KEEP_ALIVE_INTERVAL);
489 if (ret) {
490 ath6kl_err("unable to set keep alive interval: %d\n", ret);
491 return ret;
492 }
493
494 ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
495 WLAN_CONFIG_DISCONNECT_TIMEOUT);
496 if (ret) {
497 ath6kl_err("unable to set disconnect timeout: %d\n", ret);
498 return ret;
499 }
500
501 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) {
502 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED);
503 if (ret) {
504 ath6kl_err("unable to set txop bursting: %d\n", ret);
505 return ret;
506 }
507 }
508
509 if (ar->p2p && (ar->vif_max == 1 || idx)) {
510 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
511 P2P_FLAG_CAPABILITIES_REQ |
512 P2P_FLAG_MACADDR_REQ |
513 P2P_FLAG_HMODEL_REQ);
514 if (ret) {
515 ath6kl_dbg(ATH6KL_DBG_TRC,
516 "failed to request P2P capabilities (%d) - assuming P2P not supported\n",
517 ret);
518 ar->p2p = false;
519 }
520 }
521
522 if (ar->p2p && (ar->vif_max == 1 || idx)) {
523 /* Enable Probe Request reporting for P2P */
524 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
525 if (ret) {
526 ath6kl_dbg(ATH6KL_DBG_TRC,
527 "failed to enable Probe Request reporting (%d)\n",
528 ret);
529 }
530 }
531
532 return ret;
533 }
534
535 int ath6kl_configure_target(struct ath6kl *ar)
536 {
537 u32 param, ram_reserved_size;
538 u8 fw_iftype, fw_mode = 0, fw_submode = 0;
539 int i, status;
540
541 param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
542 if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) {
543 ath6kl_err("bmi_write_memory for uart debug failed\n");
544 return -EIO;
545 }
546
547 /*
548 * Note: Even though the firmware interface type is
549 * chosen as BSS_STA for all three interfaces, can
550 * be configured to IBSS/AP as long as the fw submode
551 * remains normal mode (0 - AP, STA and IBSS). But
552 * due to an target assert in firmware only one interface is
553 * configured for now.
554 */
555 fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
556
557 for (i = 0; i < ar->vif_max; i++)
558 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
559
560 /*
561 * Submodes when fw does not support dynamic interface
562 * switching:
563 * vif[0] - AP/STA/IBSS
564 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
565 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
566 * Otherwise, All the interface are initialized to p2p dev.
567 */
568
569 if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
570 ar->fw_capabilities)) {
571 for (i = 0; i < ar->vif_max; i++)
572 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
573 (i * HI_OPTION_FW_SUBMODE_BITS);
574 } else {
575 for (i = 0; i < ar->max_norm_iface; i++)
576 fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
577 (i * HI_OPTION_FW_SUBMODE_BITS);
578
579 for (i = ar->max_norm_iface; i < ar->vif_max; i++)
580 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
581 (i * HI_OPTION_FW_SUBMODE_BITS);
582
583 if (ar->p2p && ar->vif_max == 1)
584 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
585 }
586
587 if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,
588 HTC_PROTOCOL_VERSION) != 0) {
589 ath6kl_err("bmi_write_memory for htc version failed\n");
590 return -EIO;
591 }
592
593 /* set the firmware mode to STA/IBSS/AP */
594 param = 0;
595
596 if (ath6kl_bmi_read_hi32(ar, hi_option_flag, &param) != 0) {
597 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
598 return -EIO;
599 }
600
601 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
602 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
603 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
604
605 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
606 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
607
608 if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) {
609 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
610 return -EIO;
611 }
612
613 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
614
615 /*
616 * Hardcode the address use for the extended board data
617 * Ideally this should be pre-allocate by the OS at boot time
618 * But since it is a new feature and board data is loaded
619 * at init time, we have to workaround this from host.
620 * It is difficult to patch the firmware boot code,
621 * but possible in theory.
622 */
623
624 if ((ar->target_type == TARGET_TYPE_AR6003) ||
625 (ar->version.target_ver == AR6004_HW_1_3_VERSION) ||
626 (ar->version.target_ver == AR6004_HW_3_0_VERSION)) {
627 param = ar->hw.board_ext_data_addr;
628 ram_reserved_size = ar->hw.reserved_ram_size;
629
630 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {
631 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
632 return -EIO;
633 }
634
635 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,
636 ram_reserved_size) != 0) {
637 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
638 return -EIO;
639 }
640 }
641
642 /* set the block size for the target */
643 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
644 /* use default number of control buffers */
645 return -EIO;
646
647 /* Configure GPIO AR600x UART */
648 status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin,
649 ar->hw.uarttx_pin);
650 if (status)
651 return status;
652
653 /* Configure target refclk_hz */
654 if (ar->hw.refclk_hz != 0) {
655 status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz,
656 ar->hw.refclk_hz);
657 if (status)
658 return status;
659 }
660
661 return 0;
662 }
663
664 /* firmware upload */
665 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
666 u8 **fw, size_t *fw_len)
667 {
668 const struct firmware *fw_entry;
669 int ret;
670
671 ret = request_firmware(&fw_entry, filename, ar->dev);
672 if (ret)
673 return ret;
674
675 *fw_len = fw_entry->size;
676 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
677
678 if (*fw == NULL)
679 ret = -ENOMEM;
680
681 release_firmware(fw_entry);
682
683 return ret;
684 }
685
686 #ifdef CONFIG_OF
687 /*
688 * Check the device tree for a board-id and use it to construct
689 * the pathname to the firmware file. Used (for now) to find a
690 * fallback to the "bdata.bin" file--typically a symlink to the
691 * appropriate board-specific file.
692 */
693 static bool check_device_tree(struct ath6kl *ar)
694 {
695 static const char *board_id_prop = "atheros,board-id";
696 struct device_node *node;
697 char board_filename[64];
698 const char *board_id;
699 int ret;
700
701 for_each_compatible_node(node, NULL, "atheros,ath6kl") {
702 board_id = of_get_property(node, board_id_prop, NULL);
703 if (board_id == NULL) {
704 ath6kl_warn("No \"%s\" property on %s node.\n",
705 board_id_prop, node->name);
706 continue;
707 }
708 snprintf(board_filename, sizeof(board_filename),
709 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
710
711 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
712 &ar->fw_board_len);
713 if (ret) {
714 ath6kl_err("Failed to get DT board file %s: %d\n",
715 board_filename, ret);
716 continue;
717 }
718 of_node_put(node);
719 return true;
720 }
721 return false;
722 }
723 #else
724 static bool check_device_tree(struct ath6kl *ar)
725 {
726 return false;
727 }
728 #endif /* CONFIG_OF */
729
730 static int ath6kl_fetch_board_file(struct ath6kl *ar)
731 {
732 const char *filename;
733 int ret;
734
735 if (ar->fw_board != NULL)
736 return 0;
737
738 if (WARN_ON(ar->hw.fw_board == NULL))
739 return -EINVAL;
740
741 filename = ar->hw.fw_board;
742
743 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
744 &ar->fw_board_len);
745 if (ret == 0) {
746 /* managed to get proper board file */
747 return 0;
748 }
749
750 if (check_device_tree(ar)) {
751 /* got board file from device tree */
752 return 0;
753 }
754
755 /* there was no proper board file, try to use default instead */
756 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
757 filename, ret);
758
759 filename = ar->hw.fw_default_board;
760
761 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
762 &ar->fw_board_len);
763 if (ret) {
764 ath6kl_err("Failed to get default board file %s: %d\n",
765 filename, ret);
766 return ret;
767 }
768
769 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
770 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
771
772 return 0;
773 }
774
775 static int ath6kl_fetch_otp_file(struct ath6kl *ar)
776 {
777 char filename[100];
778 int ret;
779
780 if (ar->fw_otp != NULL)
781 return 0;
782
783 if (ar->hw.fw.otp == NULL) {
784 ath6kl_dbg(ATH6KL_DBG_BOOT,
785 "no OTP file configured for this hw\n");
786 return 0;
787 }
788
789 snprintf(filename, sizeof(filename), "%s/%s",
790 ar->hw.fw.dir, ar->hw.fw.otp);
791
792 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
793 &ar->fw_otp_len);
794 if (ret) {
795 ath6kl_err("Failed to get OTP file %s: %d\n",
796 filename, ret);
797 return ret;
798 }
799
800 return 0;
801 }
802
803 static int ath6kl_fetch_testmode_file(struct ath6kl *ar)
804 {
805 char filename[100];
806 int ret;
807
808 if (ar->testmode == 0)
809 return 0;
810
811 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode);
812
813 if (ar->testmode == 2) {
814 if (ar->hw.fw.utf == NULL) {
815 ath6kl_warn("testmode 2 not supported\n");
816 return -EOPNOTSUPP;
817 }
818
819 snprintf(filename, sizeof(filename), "%s/%s",
820 ar->hw.fw.dir, ar->hw.fw.utf);
821 } else {
822 if (ar->hw.fw.tcmd == NULL) {
823 ath6kl_warn("testmode 1 not supported\n");
824 return -EOPNOTSUPP;
825 }
826
827 snprintf(filename, sizeof(filename), "%s/%s",
828 ar->hw.fw.dir, ar->hw.fw.tcmd);
829 }
830
831 set_bit(TESTMODE, &ar->flag);
832
833 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
834 if (ret) {
835 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n",
836 ar->testmode, filename, ret);
837 return ret;
838 }
839
840 return 0;
841 }
842
843 static int ath6kl_fetch_fw_file(struct ath6kl *ar)
844 {
845 char filename[100];
846 int ret;
847
848 if (ar->fw != NULL)
849 return 0;
850
851 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
852 if (WARN_ON(ar->hw.fw.fw == NULL))
853 return -EINVAL;
854
855 snprintf(filename, sizeof(filename), "%s/%s",
856 ar->hw.fw.dir, ar->hw.fw.fw);
857
858 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
859 if (ret) {
860 ath6kl_err("Failed to get firmware file %s: %d\n",
861 filename, ret);
862 return ret;
863 }
864
865 return 0;
866 }
867
868 static int ath6kl_fetch_patch_file(struct ath6kl *ar)
869 {
870 char filename[100];
871 int ret;
872
873 if (ar->fw_patch != NULL)
874 return 0;
875
876 if (ar->hw.fw.patch == NULL)
877 return 0;
878
879 snprintf(filename, sizeof(filename), "%s/%s",
880 ar->hw.fw.dir, ar->hw.fw.patch);
881
882 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
883 &ar->fw_patch_len);
884 if (ret) {
885 ath6kl_err("Failed to get patch file %s: %d\n",
886 filename, ret);
887 return ret;
888 }
889
890 return 0;
891 }
892
893 static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
894 {
895 char filename[100];
896 int ret;
897
898 if (ar->testmode != 2)
899 return 0;
900
901 if (ar->fw_testscript != NULL)
902 return 0;
903
904 if (ar->hw.fw.testscript == NULL)
905 return 0;
906
907 snprintf(filename, sizeof(filename), "%s/%s",
908 ar->hw.fw.dir, ar->hw.fw.testscript);
909
910 ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
911 &ar->fw_testscript_len);
912 if (ret) {
913 ath6kl_err("Failed to get testscript file %s: %d\n",
914 filename, ret);
915 return ret;
916 }
917
918 return 0;
919 }
920
921 static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
922 {
923 int ret;
924
925 ret = ath6kl_fetch_otp_file(ar);
926 if (ret)
927 return ret;
928
929 ret = ath6kl_fetch_fw_file(ar);
930 if (ret)
931 return ret;
932
933 ret = ath6kl_fetch_patch_file(ar);
934 if (ret)
935 return ret;
936
937 ret = ath6kl_fetch_testscript_file(ar);
938 if (ret)
939 return ret;
940
941 return 0;
942 }
943
944 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
945 {
946 size_t magic_len, len, ie_len;
947 const struct firmware *fw;
948 struct ath6kl_fw_ie *hdr;
949 char filename[100];
950 const u8 *data;
951 int ret, ie_id, i, index, bit;
952 __le32 *val;
953
954 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
955
956 ret = request_firmware(&fw, filename, ar->dev);
957 if (ret)
958 return ret;
959
960 data = fw->data;
961 len = fw->size;
962
963 /* magic also includes the null byte, check that as well */
964 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
965
966 if (len < magic_len) {
967 ret = -EINVAL;
968 goto out;
969 }
970
971 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
972 ret = -EINVAL;
973 goto out;
974 }
975
976 len -= magic_len;
977 data += magic_len;
978
979 /* loop elements */
980 while (len > sizeof(struct ath6kl_fw_ie)) {
981 /* hdr is unaligned! */
982 hdr = (struct ath6kl_fw_ie *) data;
983
984 ie_id = le32_to_cpup(&hdr->id);
985 ie_len = le32_to_cpup(&hdr->len);
986
987 len -= sizeof(*hdr);
988 data += sizeof(*hdr);
989
990 if (len < ie_len) {
991 ret = -EINVAL;
992 goto out;
993 }
994
995 switch (ie_id) {
996 case ATH6KL_FW_IE_FW_VERSION:
997 strlcpy(ar->wiphy->fw_version, data,
998 min(sizeof(ar->wiphy->fw_version), ie_len+1));
999
1000 ath6kl_dbg(ATH6KL_DBG_BOOT,
1001 "found fw version %s\n",
1002 ar->wiphy->fw_version);
1003 break;
1004 case ATH6KL_FW_IE_OTP_IMAGE:
1005 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
1006 ie_len);
1007
1008 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
1009
1010 if (ar->fw_otp == NULL) {
1011 ret = -ENOMEM;
1012 goto out;
1013 }
1014
1015 ar->fw_otp_len = ie_len;
1016 break;
1017 case ATH6KL_FW_IE_FW_IMAGE:
1018 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
1019 ie_len);
1020
1021 /* in testmode we already might have a fw file */
1022 if (ar->fw != NULL)
1023 break;
1024
1025 ar->fw = vmalloc(ie_len);
1026
1027 if (ar->fw == NULL) {
1028 ret = -ENOMEM;
1029 goto out;
1030 }
1031
1032 memcpy(ar->fw, data, ie_len);
1033 ar->fw_len = ie_len;
1034 break;
1035 case ATH6KL_FW_IE_PATCH_IMAGE:
1036 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
1037 ie_len);
1038
1039 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
1040
1041 if (ar->fw_patch == NULL) {
1042 ret = -ENOMEM;
1043 goto out;
1044 }
1045
1046 ar->fw_patch_len = ie_len;
1047 break;
1048 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
1049 val = (__le32 *) data;
1050 ar->hw.reserved_ram_size = le32_to_cpup(val);
1051
1052 ath6kl_dbg(ATH6KL_DBG_BOOT,
1053 "found reserved ram size ie %d\n",
1054 ar->hw.reserved_ram_size);
1055 break;
1056 case ATH6KL_FW_IE_CAPABILITIES:
1057 ath6kl_dbg(ATH6KL_DBG_BOOT,
1058 "found firmware capabilities ie (%zd B)\n",
1059 ie_len);
1060
1061 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1062 index = i / 8;
1063 bit = i % 8;
1064
1065 if (index == ie_len)
1066 break;
1067
1068 if (data[index] & (1 << bit))
1069 __set_bit(i, ar->fw_capabilities);
1070 }
1071
1072 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
1073 ar->fw_capabilities,
1074 sizeof(ar->fw_capabilities));
1075 break;
1076 case ATH6KL_FW_IE_PATCH_ADDR:
1077 if (ie_len != sizeof(*val))
1078 break;
1079
1080 val = (__le32 *) data;
1081 ar->hw.dataset_patch_addr = le32_to_cpup(val);
1082
1083 ath6kl_dbg(ATH6KL_DBG_BOOT,
1084 "found patch address ie 0x%x\n",
1085 ar->hw.dataset_patch_addr);
1086 break;
1087 case ATH6KL_FW_IE_BOARD_ADDR:
1088 if (ie_len != sizeof(*val))
1089 break;
1090
1091 val = (__le32 *) data;
1092 ar->hw.board_addr = le32_to_cpup(val);
1093
1094 ath6kl_dbg(ATH6KL_DBG_BOOT,
1095 "found board address ie 0x%x\n",
1096 ar->hw.board_addr);
1097 break;
1098 case ATH6KL_FW_IE_VIF_MAX:
1099 if (ie_len != sizeof(*val))
1100 break;
1101
1102 val = (__le32 *) data;
1103 ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1104 ATH6KL_VIF_MAX);
1105
1106 if (ar->vif_max > 1 && !ar->p2p)
1107 ar->max_norm_iface = 2;
1108
1109 ath6kl_dbg(ATH6KL_DBG_BOOT,
1110 "found vif max ie %d\n", ar->vif_max);
1111 break;
1112 default:
1113 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
1114 le32_to_cpup(&hdr->id));
1115 break;
1116 }
1117
1118 len -= ie_len;
1119 data += ie_len;
1120 };
1121
1122 ret = 0;
1123 out:
1124 release_firmware(fw);
1125
1126 return ret;
1127 }
1128
1129 int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
1130 {
1131 int ret;
1132
1133 ret = ath6kl_fetch_board_file(ar);
1134 if (ret)
1135 return ret;
1136
1137 ret = ath6kl_fetch_testmode_file(ar);
1138 if (ret)
1139 return ret;
1140
1141 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API5_FILE);
1142 if (ret == 0) {
1143 ar->fw_api = 5;
1144 goto out;
1145 }
1146
1147 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API4_FILE);
1148 if (ret == 0) {
1149 ar->fw_api = 4;
1150 goto out;
1151 }
1152
1153 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
1154 if (ret == 0) {
1155 ar->fw_api = 3;
1156 goto out;
1157 }
1158
1159 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1160 if (ret == 0) {
1161 ar->fw_api = 2;
1162 goto out;
1163 }
1164
1165 ret = ath6kl_fetch_fw_api1(ar);
1166 if (ret)
1167 return ret;
1168
1169 ar->fw_api = 1;
1170
1171 out:
1172 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1173
1174 return 0;
1175 }
1176
1177 static int ath6kl_upload_board_file(struct ath6kl *ar)
1178 {
1179 u32 board_address, board_ext_address, param;
1180 u32 board_data_size, board_ext_data_size;
1181 int ret;
1182
1183 if (WARN_ON(ar->fw_board == NULL))
1184 return -ENOENT;
1185
1186 /*
1187 * Determine where in Target RAM to write Board Data.
1188 * For AR6004, host determine Target RAM address for
1189 * writing board data.
1190 */
1191 if (ar->hw.board_addr != 0) {
1192 board_address = ar->hw.board_addr;
1193 ath6kl_bmi_write_hi32(ar, hi_board_data,
1194 board_address);
1195 } else {
1196 ret = ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address);
1197 if (ret) {
1198 ath6kl_err("Failed to get board file target address.\n");
1199 return ret;
1200 }
1201 }
1202
1203 /* determine where in target ram to write extended board data */
1204 ret = ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address);
1205 if (ret) {
1206 ath6kl_err("Failed to get extended board file target address.\n");
1207 return ret;
1208 }
1209
1210 if (ar->target_type == TARGET_TYPE_AR6003 &&
1211 board_ext_address == 0) {
1212 ath6kl_err("Failed to get board file target address.\n");
1213 return -EINVAL;
1214 }
1215
1216 switch (ar->target_type) {
1217 case TARGET_TYPE_AR6003:
1218 board_data_size = AR6003_BOARD_DATA_SZ;
1219 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1220 if (ar->fw_board_len > (board_data_size + board_ext_data_size))
1221 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2;
1222 break;
1223 case TARGET_TYPE_AR6004:
1224 board_data_size = AR6004_BOARD_DATA_SZ;
1225 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1226 break;
1227 default:
1228 WARN_ON(1);
1229 return -EINVAL;
1230 }
1231
1232 if (board_ext_address &&
1233 ar->fw_board_len == (board_data_size + board_ext_data_size)) {
1234 /* write extended board data */
1235 ath6kl_dbg(ATH6KL_DBG_BOOT,
1236 "writing extended board data to 0x%x (%d B)\n",
1237 board_ext_address, board_ext_data_size);
1238
1239 ret = ath6kl_bmi_write(ar, board_ext_address,
1240 ar->fw_board + board_data_size,
1241 board_ext_data_size);
1242 if (ret) {
1243 ath6kl_err("Failed to write extended board data: %d\n",
1244 ret);
1245 return ret;
1246 }
1247
1248 /* record that extended board data is initialized */
1249 param = (board_ext_data_size << 16) | 1;
1250
1251 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param);
1252 }
1253
1254 if (ar->fw_board_len < board_data_size) {
1255 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1256 ret = -EINVAL;
1257 return ret;
1258 }
1259
1260 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1261 board_address, board_data_size);
1262
1263 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
1264 board_data_size);
1265
1266 if (ret) {
1267 ath6kl_err("Board file bmi write failed: %d\n", ret);
1268 return ret;
1269 }
1270
1271 /* record the fact that Board Data IS initialized */
1272 if ((ar->version.target_ver == AR6004_HW_1_3_VERSION) ||
1273 (ar->version.target_ver == AR6004_HW_3_0_VERSION))
1274 param = board_data_size;
1275 else
1276 param = 1;
1277
1278 ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, param);
1279
1280 return ret;
1281 }
1282
1283 static int ath6kl_upload_otp(struct ath6kl *ar)
1284 {
1285 u32 address, param;
1286 bool from_hw = false;
1287 int ret;
1288
1289 if (ar->fw_otp == NULL)
1290 return 0;
1291
1292 address = ar->hw.app_load_addr;
1293
1294 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
1295 ar->fw_otp_len);
1296
1297 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1298 ar->fw_otp_len);
1299 if (ret) {
1300 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1301 return ret;
1302 }
1303
1304 /* read firmware start address */
1305 ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address);
1306
1307 if (ret) {
1308 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1309 return ret;
1310 }
1311
1312 if (ar->hw.app_start_override_addr == 0) {
1313 ar->hw.app_start_override_addr = address;
1314 from_hw = true;
1315 }
1316
1317 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1318 from_hw ? " (from hw)" : "",
1319 ar->hw.app_start_override_addr);
1320
1321 /* execute the OTP code */
1322 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1323 ar->hw.app_start_override_addr);
1324 param = 0;
1325 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
1326
1327 return ret;
1328 }
1329
1330 static int ath6kl_upload_firmware(struct ath6kl *ar)
1331 {
1332 u32 address;
1333 int ret;
1334
1335 if (WARN_ON(ar->fw == NULL))
1336 return 0;
1337
1338 address = ar->hw.app_load_addr;
1339
1340 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
1341 address, ar->fw_len);
1342
1343 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1344
1345 if (ret) {
1346 ath6kl_err("Failed to write firmware: %d\n", ret);
1347 return ret;
1348 }
1349
1350 /*
1351 * Set starting address for firmware
1352 * Don't need to setup app_start override addr on AR6004
1353 */
1354 if (ar->target_type != TARGET_TYPE_AR6004) {
1355 address = ar->hw.app_start_override_addr;
1356 ath6kl_bmi_set_app_start(ar, address);
1357 }
1358 return ret;
1359 }
1360
1361 static int ath6kl_upload_patch(struct ath6kl *ar)
1362 {
1363 u32 address;
1364 int ret;
1365
1366 if (ar->fw_patch == NULL)
1367 return 0;
1368
1369 address = ar->hw.dataset_patch_addr;
1370
1371 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
1372 address, ar->fw_patch_len);
1373
1374 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1375 if (ret) {
1376 ath6kl_err("Failed to write patch file: %d\n", ret);
1377 return ret;
1378 }
1379
1380 ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address);
1381
1382 return 0;
1383 }
1384
1385 static int ath6kl_upload_testscript(struct ath6kl *ar)
1386 {
1387 u32 address;
1388 int ret;
1389
1390 if (ar->testmode != 2)
1391 return 0;
1392
1393 if (ar->fw_testscript == NULL)
1394 return 0;
1395
1396 address = ar->hw.testscript_addr;
1397
1398 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
1399 address, ar->fw_testscript_len);
1400
1401 ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1402 ar->fw_testscript_len);
1403 if (ret) {
1404 ath6kl_err("Failed to write testscript file: %d\n", ret);
1405 return ret;
1406 }
1407
1408 ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address);
1409
1410 if ((ar->version.target_ver != AR6004_HW_1_3_VERSION) &&
1411 (ar->version.target_ver != AR6004_HW_3_0_VERSION))
1412 ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096);
1413
1414 ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1);
1415
1416 return 0;
1417 }
1418
1419 static int ath6kl_init_upload(struct ath6kl *ar)
1420 {
1421 u32 param, options, sleep, address;
1422 int status = 0;
1423
1424 if (ar->target_type != TARGET_TYPE_AR6003 &&
1425 ar->target_type != TARGET_TYPE_AR6004)
1426 return -EINVAL;
1427
1428 /* temporarily disable system sleep */
1429 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1430 status = ath6kl_bmi_reg_read(ar, address, &param);
1431 if (status)
1432 return status;
1433
1434 options = param;
1435
1436 param |= ATH6KL_OPTION_SLEEP_DISABLE;
1437 status = ath6kl_bmi_reg_write(ar, address, param);
1438 if (status)
1439 return status;
1440
1441 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1442 status = ath6kl_bmi_reg_read(ar, address, &param);
1443 if (status)
1444 return status;
1445
1446 sleep = param;
1447
1448 param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1449 status = ath6kl_bmi_reg_write(ar, address, param);
1450 if (status)
1451 return status;
1452
1453 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1454 options, sleep);
1455
1456 /* program analog PLL register */
1457 /* no need to control 40/44MHz clock on AR6004 */
1458 if (ar->target_type != TARGET_TYPE_AR6004) {
1459 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1460 0xF9104001);
1461
1462 if (status)
1463 return status;
1464
1465 /* Run at 80/88MHz by default */
1466 param = SM(CPU_CLOCK_STANDARD, 1);
1467
1468 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1469 status = ath6kl_bmi_reg_write(ar, address, param);
1470 if (status)
1471 return status;
1472 }
1473
1474 param = 0;
1475 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1476 param = SM(LPO_CAL_ENABLE, 1);
1477 status = ath6kl_bmi_reg_write(ar, address, param);
1478 if (status)
1479 return status;
1480
1481 /* WAR to avoid SDIO CRC err */
1482 if (ar->hw.flags & ATH6KL_HW_SDIO_CRC_ERROR_WAR) {
1483 ath6kl_err("temporary war to avoid sdio crc error\n");
1484
1485 param = 0x28;
1486 address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS;
1487 status = ath6kl_bmi_reg_write(ar, address, param);
1488 if (status)
1489 return status;
1490
1491 param = 0x20;
1492
1493 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1494 status = ath6kl_bmi_reg_write(ar, address, param);
1495 if (status)
1496 return status;
1497
1498 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1499 status = ath6kl_bmi_reg_write(ar, address, param);
1500 if (status)
1501 return status;
1502
1503 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1504 status = ath6kl_bmi_reg_write(ar, address, param);
1505 if (status)
1506 return status;
1507
1508 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1509 status = ath6kl_bmi_reg_write(ar, address, param);
1510 if (status)
1511 return status;
1512 }
1513
1514 /* write EEPROM data to Target RAM */
1515 status = ath6kl_upload_board_file(ar);
1516 if (status)
1517 return status;
1518
1519 /* transfer One time Programmable data */
1520 status = ath6kl_upload_otp(ar);
1521 if (status)
1522 return status;
1523
1524 /* Download Target firmware */
1525 status = ath6kl_upload_firmware(ar);
1526 if (status)
1527 return status;
1528
1529 status = ath6kl_upload_patch(ar);
1530 if (status)
1531 return status;
1532
1533 /* Download the test script */
1534 status = ath6kl_upload_testscript(ar);
1535 if (status)
1536 return status;
1537
1538 /* Restore system sleep */
1539 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1540 status = ath6kl_bmi_reg_write(ar, address, sleep);
1541 if (status)
1542 return status;
1543
1544 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1545 param = options | 0x20;
1546 status = ath6kl_bmi_reg_write(ar, address, param);
1547 if (status)
1548 return status;
1549
1550 return status;
1551 }
1552
1553 int ath6kl_init_hw_params(struct ath6kl *ar)
1554 {
1555 const struct ath6kl_hw *uninitialized_var(hw);
1556 int i;
1557
1558 for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1559 hw = &hw_list[i];
1560
1561 if (hw->id == ar->version.target_ver)
1562 break;
1563 }
1564
1565 if (i == ARRAY_SIZE(hw_list)) {
1566 ath6kl_err("Unsupported hardware version: 0x%x\n",
1567 ar->version.target_ver);
1568 return -EINVAL;
1569 }
1570
1571 ar->hw = *hw;
1572
1573 ath6kl_dbg(ATH6KL_DBG_BOOT,
1574 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1575 ar->version.target_ver, ar->target_type,
1576 ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1577 ath6kl_dbg(ATH6KL_DBG_BOOT,
1578 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1579 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1580 ar->hw.reserved_ram_size);
1581 ath6kl_dbg(ATH6KL_DBG_BOOT,
1582 "refclk_hz %d uarttx_pin %d",
1583 ar->hw.refclk_hz, ar->hw.uarttx_pin);
1584
1585 return 0;
1586 }
1587
1588 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1589 {
1590 switch (type) {
1591 case ATH6KL_HIF_TYPE_SDIO:
1592 return "sdio";
1593 case ATH6KL_HIF_TYPE_USB:
1594 return "usb";
1595 }
1596
1597 return NULL;
1598 }
1599
1600
1601 static const struct fw_capa_str_map {
1602 int id;
1603 const char *name;
1604 } fw_capa_map[] = {
1605 { ATH6KL_FW_CAPABILITY_HOST_P2P, "host-p2p" },
1606 { ATH6KL_FW_CAPABILITY_SCHED_SCAN, "sched-scan" },
1607 { ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, "sta-p2pdev-duplex" },
1608 { ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT, "inactivity-timeout" },
1609 { ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE, "rsn-cap-override" },
1610 { ATH6KL_FW_CAPABILITY_WOW_MULTICAST_FILTER, "wow-mc-filter" },
1611 { ATH6KL_FW_CAPABILITY_BMISS_ENHANCE, "bmiss-enhance" },
1612 { ATH6KL_FW_CAPABILITY_SCHED_SCAN_MATCH_LIST, "sscan-match-list" },
1613 { ATH6KL_FW_CAPABILITY_RSSI_SCAN_THOLD, "rssi-scan-thold" },
1614 { ATH6KL_FW_CAPABILITY_CUSTOM_MAC_ADDR, "custom-mac-addr" },
1615 { ATH6KL_FW_CAPABILITY_TX_ERR_NOTIFY, "tx-err-notify" },
1616 { ATH6KL_FW_CAPABILITY_REGDOMAIN, "regdomain" },
1617 { ATH6KL_FW_CAPABILITY_SCHED_SCAN_V2, "sched-scan-v2" },
1618 { ATH6KL_FW_CAPABILITY_HEART_BEAT_POLL, "hb-poll" },
1619 { ATH6KL_FW_CAPABILITY_64BIT_RATES, "64bit-rates" },
1620 { ATH6KL_FW_CAPABILITY_AP_INACTIVITY_MINS, "ap-inactivity-mins" },
1621 { ATH6KL_FW_CAPABILITY_MAP_LP_ENDPOINT, "map-lp-endpoint" },
1622 { ATH6KL_FW_CAPABILITY_RATETABLE_MCS15, "ratetable-mcs15" },
1623 { ATH6KL_FW_CAPABILITY_NO_IP_CHECKSUM, "no-ip-checksum" },
1624 };
1625
1626 static const char *ath6kl_init_get_fw_capa_name(unsigned int id)
1627 {
1628 int i;
1629
1630 for (i = 0; i < ARRAY_SIZE(fw_capa_map); i++) {
1631 if (fw_capa_map[i].id == id)
1632 return fw_capa_map[i].name;
1633 }
1634
1635 return "<unknown>";
1636 }
1637
1638 static void ath6kl_init_get_fwcaps(struct ath6kl *ar, char *buf, size_t buf_len)
1639 {
1640 u8 *data = (u8 *) ar->fw_capabilities;
1641 size_t trunc_len, len = 0;
1642 int i, index, bit;
1643 char *trunc = "...";
1644
1645 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1646 index = i / 8;
1647 bit = i % 8;
1648
1649 if (index >= sizeof(ar->fw_capabilities) * 4)
1650 break;
1651
1652 if (buf_len - len < 4) {
1653 ath6kl_warn("firmware capability buffer too small!\n");
1654
1655 /* add "..." to the end of string */
1656 trunc_len = strlen(trunc) + 1;
1657 strncpy(buf + buf_len - trunc_len, trunc, trunc_len);
1658
1659 return;
1660 }
1661
1662 if (data[index] & (1 << bit)) {
1663 len += scnprintf(buf + len, buf_len - len, "%s,",
1664 ath6kl_init_get_fw_capa_name(i));
1665 }
1666 }
1667
1668 /* overwrite the last comma */
1669 if (len > 0)
1670 len--;
1671
1672 buf[len] = '\0';
1673 }
1674
1675 static int ath6kl_init_hw_reset(struct ath6kl *ar)
1676 {
1677 ath6kl_dbg(ATH6KL_DBG_BOOT, "cold resetting the device");
1678
1679 return ath6kl_diag_write32(ar, RESET_CONTROL_ADDRESS,
1680 cpu_to_le32(RESET_CONTROL_COLD_RST));
1681 }
1682
1683 static int __ath6kl_init_hw_start(struct ath6kl *ar)
1684 {
1685 long timeleft;
1686 int ret, i;
1687 char buf[200];
1688
1689 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1690
1691 ret = ath6kl_hif_power_on(ar);
1692 if (ret)
1693 return ret;
1694
1695 ret = ath6kl_configure_target(ar);
1696 if (ret)
1697 goto err_power_off;
1698
1699 ret = ath6kl_init_upload(ar);
1700 if (ret)
1701 goto err_power_off;
1702
1703 /* Do we need to finish the BMI phase */
1704 ret = ath6kl_bmi_done(ar);
1705 if (ret)
1706 goto err_power_off;
1707
1708 /*
1709 * The reason we have to wait for the target here is that the
1710 * driver layer has to init BMI in order to set the host block
1711 * size.
1712 */
1713 ret = ath6kl_htc_wait_target(ar->htc_target);
1714
1715 if (ret == -ETIMEDOUT) {
1716 /*
1717 * Most likely USB target is in odd state after reboot and
1718 * needs a reset. A cold reset makes the whole device
1719 * disappear from USB bus and initialisation starts from
1720 * beginning.
1721 */
1722 ath6kl_warn("htc wait target timed out, resetting device\n");
1723 ath6kl_init_hw_reset(ar);
1724 goto err_power_off;
1725 } else if (ret) {
1726 ath6kl_err("htc wait target failed: %d\n", ret);
1727 goto err_power_off;
1728 }
1729
1730 ret = ath6kl_init_service_ep(ar);
1731 if (ret) {
1732 ath6kl_err("Endpoint service initilisation failed: %d\n", ret);
1733 goto err_cleanup_scatter;
1734 }
1735
1736 /* setup credit distribution */
1737 ath6kl_htc_credit_setup(ar->htc_target, &ar->credit_state_info);
1738
1739 /* start HTC */
1740 ret = ath6kl_htc_start(ar->htc_target);
1741 if (ret) {
1742 /* FIXME: call this */
1743 ath6kl_cookie_cleanup(ar);
1744 goto err_cleanup_scatter;
1745 }
1746
1747 /* Wait for Wmi event to be ready */
1748 timeleft = wait_event_interruptible_timeout(ar->event_wq,
1749 test_bit(WMI_READY,
1750 &ar->flag),
1751 WMI_TIMEOUT);
1752 if (timeleft <= 0) {
1753 clear_bit(WMI_READY, &ar->flag);
1754 ath6kl_err("wmi is not ready or wait was interrupted: %ld\n",
1755 timeleft);
1756 ret = -EIO;
1757 goto err_htc_stop;
1758 }
1759
1760 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1761
1762 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1763 ath6kl_info("%s %s fw %s api %d%s\n",
1764 ar->hw.name,
1765 ath6kl_init_get_hif_name(ar->hif_type),
1766 ar->wiphy->fw_version,
1767 ar->fw_api,
1768 test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1769 ath6kl_init_get_fwcaps(ar, buf, sizeof(buf));
1770 ath6kl_info("firmware supports: %s\n", buf);
1771 }
1772
1773 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1774 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1775 ATH6KL_ABI_VERSION, ar->version.abi_ver);
1776 ret = -EIO;
1777 goto err_htc_stop;
1778 }
1779
1780 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1781
1782 /* communicate the wmi protocol verision to the target */
1783 /* FIXME: return error */
1784 if ((ath6kl_set_host_app_area(ar)) != 0)
1785 ath6kl_err("unable to set the host app area\n");
1786
1787 for (i = 0; i < ar->vif_max; i++) {
1788 ret = ath6kl_target_config_wlan_params(ar, i);
1789 if (ret)
1790 goto err_htc_stop;
1791 }
1792
1793 return 0;
1794
1795 err_htc_stop:
1796 ath6kl_htc_stop(ar->htc_target);
1797 err_cleanup_scatter:
1798 ath6kl_hif_cleanup_scatter(ar);
1799 err_power_off:
1800 ath6kl_hif_power_off(ar);
1801
1802 return ret;
1803 }
1804
1805 int ath6kl_init_hw_start(struct ath6kl *ar)
1806 {
1807 int err;
1808
1809 err = __ath6kl_init_hw_start(ar);
1810 if (err)
1811 return err;
1812 ar->state = ATH6KL_STATE_ON;
1813 return 0;
1814 }
1815
1816 static int __ath6kl_init_hw_stop(struct ath6kl *ar)
1817 {
1818 int ret;
1819
1820 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1821
1822 ath6kl_htc_stop(ar->htc_target);
1823
1824 ath6kl_hif_stop(ar);
1825
1826 ath6kl_bmi_reset(ar);
1827
1828 ret = ath6kl_hif_power_off(ar);
1829 if (ret)
1830 ath6kl_warn("failed to power off hif: %d\n", ret);
1831
1832 return 0;
1833 }
1834
1835 int ath6kl_init_hw_stop(struct ath6kl *ar)
1836 {
1837 int err;
1838
1839 err = __ath6kl_init_hw_stop(ar);
1840 if (err)
1841 return err;
1842 ar->state = ATH6KL_STATE_OFF;
1843 return 0;
1844 }
1845
1846 void ath6kl_init_hw_restart(struct ath6kl *ar)
1847 {
1848 clear_bit(WMI_READY, &ar->flag);
1849
1850 ath6kl_cfg80211_stop_all(ar);
1851
1852 if (__ath6kl_init_hw_stop(ar)) {
1853 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to stop during fw error recovery\n");
1854 return;
1855 }
1856
1857 if (__ath6kl_init_hw_start(ar)) {
1858 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to restart during fw error recovery\n");
1859 return;
1860 }
1861 }
1862
1863 void ath6kl_stop_txrx(struct ath6kl *ar)
1864 {
1865 struct ath6kl_vif *vif, *tmp_vif;
1866 int i;
1867
1868 set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1869
1870 if (down_interruptible(&ar->sem)) {
1871 ath6kl_err("down_interruptible failed\n");
1872 return;
1873 }
1874
1875 for (i = 0; i < AP_MAX_NUM_STA; i++)
1876 aggr_reset_state(ar->sta_list[i].aggr_conn);
1877
1878 spin_lock_bh(&ar->list_lock);
1879 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1880 list_del(&vif->list);
1881 spin_unlock_bh(&ar->list_lock);
1882 ath6kl_cfg80211_vif_stop(vif, test_bit(WMI_READY, &ar->flag));
1883 rtnl_lock();
1884 ath6kl_cfg80211_vif_cleanup(vif);
1885 rtnl_unlock();
1886 spin_lock_bh(&ar->list_lock);
1887 }
1888 spin_unlock_bh(&ar->list_lock);
1889
1890 clear_bit(WMI_READY, &ar->flag);
1891
1892 if (ar->fw_recovery.enable)
1893 del_timer_sync(&ar->fw_recovery.hb_timer);
1894
1895 /*
1896 * After wmi_shudown all WMI events will be dropped. We
1897 * need to cleanup the buffers allocated in AP mode and
1898 * give disconnect notification to stack, which usually
1899 * happens in the disconnect_event. Simulate the disconnect
1900 * event by calling the function directly. Sometimes
1901 * disconnect_event will be received when the debug logs
1902 * are collected.
1903 */
1904 ath6kl_wmi_shutdown(ar->wmi);
1905
1906 clear_bit(WMI_ENABLED, &ar->flag);
1907 if (ar->htc_target) {
1908 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1909 ath6kl_htc_stop(ar->htc_target);
1910 }
1911
1912 /*
1913 * Try to reset the device if we can. The driver may have been
1914 * configure NOT to reset the target during a debug session.
1915 */
1916 ath6kl_init_hw_reset(ar);
1917
1918 up(&ar->sem);
1919 }
1920 EXPORT_SYMBOL(ath6kl_stop_txrx);
Linux with added FPC-III support