1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 1991, 1992, 1993 Linus Torvalds
9 * head.S contains the 32-bit startup code.
11 * NOTE!!! Startup happens at absolute address 0x00001000, which is also where
12 * the page directory will exist. The startup code will be overwritten by
13 * the page directory. [According to comments etc elsewhere on a compressed
14 * kernel it will end up at 0x1000 + 1Mb I hope so as I assume this. - AC]
16 * Page 0 is deliberately kept safe, since System Management Mode code in
17 * laptops may need to access the BIOS data stored there. This is also
18 * useful for future device drivers that either access the BIOS via VM86
23 * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
28 #include <linux/init.h>
29 #include <linux/linkage.h>
30 #include <asm/segment.h>
33 #include <asm/processor-flags.h>
34 #include <asm/asm-offsets.h>
35 #include <asm/bootparam.h>
39 * Locally defined symbols should be marked hidden:
50 * 32bit entry is 0 and it is ABI so immutable!
51 * If we come here directly from a bootloader,
52 * kernel(text+data+bss+brk) ramdisk, zero_page, command line
53 * all need to be under the 4G limit.
57 * Test KEEP_SEGMENTS flag to see if the bootloader is asking
58 * us to not reload segments
60 testb $KEEP_SEGMENTS, BP_loadflags(%esi)
64 movl $(__BOOT_DS), %eax
71 * Calculate the delta between where we were compiled to run
72 * at and where we were actually loaded at. This can only be done
73 * with a short local call on x86. Nothing else will tell us what
74 * address we are running at. The reserved chunk of the real-mode
75 * data at 0x1e4 (defined as a scratch field) are used as the stack
76 * for this calculation. Only 4 bytes are needed.
78 leal (BP_scratch+4)(%esi), %esp
83 /* setup a stack and make sure cpu supports long mode. */
84 movl $boot_stack_end, %eax
93 * Compute the delta between where we were compiled to run at
94 * and where the code will actually run at.
96 * %ebp contains the address we are loaded at by the boot loader and %ebx
97 * contains the address where we should move the kernel image temporarily
98 * for safe in-place decompression.
101 #ifdef CONFIG_RELOCATABLE
103 movl BP_kernel_alignment(%esi), %eax
108 cmpl $LOAD_PHYSICAL_ADDR, %ebx
111 movl $LOAD_PHYSICAL_ADDR, %ebx
114 /* Target address to relocate to for decompression */
115 movl BP_init_size(%esi), %eax
120 * Prepare for entering 64 bit mode
123 /* Load new GDT with the 64bit segments using 32bit descriptor */
124 addl %ebp, gdt+2(%ebp)
127 /* Enable PAE mode */
129 orl $X86_CR4_PAE, %eax
133 * Build early 4G boot pagetable
136 * If SEV is active then set the encryption mask in the page tables.
137 * This will insure that when the kernel is copied and decompressed
138 * it will be done so encrypted.
140 call get_sev_encryption_bit
144 subl $32, %eax /* Encryption bit is always above bit 31 */
145 bts %eax, %edx /* Set encryption mask for page tables */
148 /* Initialize Page tables to 0 */
149 leal pgtable(%ebx), %edi
151 movl $(BOOT_INIT_PGT_SIZE/4), %ecx
155 leal pgtable + 0(%ebx), %edi
156 leal 0x1007 (%edi), %eax
161 leal pgtable + 0x1000(%ebx), %edi
162 leal 0x1007(%edi), %eax
164 1: movl %eax, 0x00(%edi)
165 addl %edx, 0x04(%edi)
166 addl $0x00001000, %eax
172 leal pgtable + 0x2000(%ebx), %edi
173 movl $0x00000183, %eax
175 1: movl %eax, 0(%edi)
177 addl $0x00200000, %eax
182 /* Enable the boot page tables */
183 leal pgtable(%ebx), %eax
186 /* Enable Long mode in EFER (Extended Feature Enable Register) */
189 btsl $_EFER_LME, %eax
192 /* After gdt is loaded */
195 movl $__BOOT_TSS, %eax
199 * Setup for the jump to 64bit mode
201 * When the jump is performend we will be in long mode but
202 * in 32bit compatibility mode with EFER.LME = 1, CS.L = 0, CS.D = 1
203 * (and in turn EFER.LMA = 1). To jump into 64bit mode we use
204 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
205 * We place all of the values on our mini stack so lret can
206 * used to perform that far jump.
209 leal startup_64(%ebp), %eax
210 #ifdef CONFIG_EFI_MIXED
211 movl efi32_config(%ebp), %ebx
214 leal handover_entry(%ebp), %eax
219 /* Enter paged protected Mode, activating Long Mode */
220 movl $(X86_CR0_PG | X86_CR0_PE), %eax /* Enable Paging and Protected mode */
223 /* Jump from 32bit compatibility mode into 64bit mode. */
227 #ifdef CONFIG_EFI_MIXED
229 ENTRY(efi32_stub_entry)
230 add $0x4, %esp /* Discard return address */
235 leal (BP_scratch+4)(%esi), %esp
240 movl %ecx, efi32_config(%ebp)
241 movl %edx, efi32_config+8(%ebp)
242 sgdtl efi32_boot_gdt(%ebp)
244 leal efi32_config(%ebp), %eax
245 movl %eax, efi_config(%ebp)
248 ENDPROC(efi32_stub_entry)
255 * 64bit entry is 0x200 and it is ABI so immutable!
256 * We come here either from startup_32 or directly from a
258 * If we come here from a bootloader, kernel(text+data+bss+brk),
259 * ramdisk, zero_page, command line could be above 4G.
260 * We depend on an identity mapped page table being provided
261 * that maps our entire kernel(text+data+bss+brk), zero page
265 /* Setup data segments. */
274 * Compute the decompressed kernel start address. It is where
275 * we were loaded at aligned to a 2M boundary. %rbp contains the
276 * decompressed kernel start address.
278 * If it is a relocatable kernel then decompress and run the kernel
279 * from load address aligned to 2MB addr, otherwise decompress and
280 * run the kernel from LOAD_PHYSICAL_ADDR
282 * We cannot rely on the calculation done in 32-bit mode, since we
283 * may have been invoked via the 64-bit entry point.
286 /* Start with the delta to where the kernel will run at. */
287 #ifdef CONFIG_RELOCATABLE
288 leaq startup_32(%rip) /* - $startup_32 */, %rbp
289 movl BP_kernel_alignment(%rsi), %eax
294 cmpq $LOAD_PHYSICAL_ADDR, %rbp
297 movq $LOAD_PHYSICAL_ADDR, %rbp
300 /* Target address to relocate to for decompression */
301 movl BP_init_size(%rsi), %ebx
305 /* Set up the stack */
306 leaq boot_stack_end(%rbx), %rsp
309 * paging_prepare() and cleanup_trampoline() below can have GOT
310 * references. Adjust the table with address we are running at.
312 * Zero RAX for adjust_got: the GOT was not adjusted before;
313 * there's no adjustment to undo.
318 * Calculate the address the binary is loaded at and use it as
328 * At this point we are in long mode with 4-level paging enabled,
329 * but we might want to enable 5-level paging or vice versa.
331 * The problem is that we cannot do it directly. Setting or clearing
332 * CR4.LA57 in long mode would trigger #GP. So we need to switch off
333 * long mode and paging first.
335 * We also need a trampoline in lower memory to switch over from
336 * 4- to 5-level paging for cases when the bootloader puts the kernel
337 * above 4G, but didn't enable 5-level paging for us.
339 * The same trampoline can be used to switch from 5- to 4-level paging
340 * mode, like when starting 4-level paging kernel via kexec() when
341 * original kernel worked in 5-level paging mode.
343 * For the trampoline, we need the top page table to reside in lower
344 * memory as we don't have a way to load 64-bit values into CR3 in
347 * We go though the trampoline even if we don't have to: if we're
348 * already in a desired paging mode. This way the trampoline code gets
349 * tested on every boot.
352 /* Make sure we have GDT with 32-bit code segment */
354 movq %rax, gdt64+2(%rip)
358 * paging_prepare() sets up the trampoline and checks if we need to
359 * enable 5-level paging.
361 * Address of the trampoline is returned in RAX.
362 * Non zero RDX on return means we need to enable 5-level paging.
364 * RSI holds real mode data and needs to be preserved across
365 * this function call.
368 movq %rsi, %rdi /* real mode address */
372 /* Save the trampoline address in RCX */
376 * Load the address of trampoline_return() into RDI.
377 * It will be used by the trampoline to return to the main code.
379 leaq trampoline_return(%rip), %rdi
381 /* Switch to compatibility mode (CS.L = 0 CS.D = 1) via far return */
383 leaq TRAMPOLINE_32BIT_CODE_OFFSET(%rax), %rax
387 /* Restore the stack, the 32-bit trampoline uses its own stack */
388 leaq boot_stack_end(%rbx), %rsp
391 * cleanup_trampoline() would restore trampoline memory.
393 * RDI is address of the page table to use instead of page table
394 * in trampoline memory (if required).
396 * RSI holds real mode data and needs to be preserved across
397 * this function call.
400 leaq top_pgtable(%rbx), %rdi
401 call cleanup_trampoline
409 * Previously we've adjusted the GOT with address the binary was
410 * loaded at. Now we need to re-adjust for relocation address.
412 * Calculate the address the binary is loaded at, so that we can
413 * undo the previous GOT adjustment.
419 /* The new adjustment is the relocation address */
424 * Copy the compressed kernel to the end of our buffer
425 * where decompression in place becomes safe.
428 leaq (_bss-8)(%rip), %rsi
429 leaq (_bss-8)(%rbx), %rdi
430 movq $_bss /* - $startup_32 */, %rcx
438 * Jump to the relocated address.
440 leaq relocated(%rbx), %rax
443 #ifdef CONFIG_EFI_STUB
445 /* The entry point for the PE/COFF executable is efi_pe_entry. */
447 movq %rcx, efi64_config(%rip) /* Handle */
448 movq %rdx, efi64_config+8(%rip) /* EFI System table pointer */
450 leaq efi64_config(%rip), %rax
451 movq %rax, efi_config(%rip)
458 * Relocate efi_config->call().
460 addq %rbp, efi64_config+40(%rip)
463 call make_boot_params
467 leaq startup_32(%rip), %rax
468 movl %eax, BP_code32_start(%rsi)
469 jmp 2f /* Skip the relocation */
477 * Relocate efi_config->call().
479 movq efi_config(%rip), %rax
482 movq efi_config(%rip), %rdi
488 /* EFI init failed, so hang. */
492 movl BP_code32_start(%esi), %eax
493 leaq startup_64(%rax), %rax
495 ENDPROC(efi_pe_entry)
498 ENTRY(efi64_stub_entry)
499 movq %rdi, efi64_config(%rip) /* Handle */
500 movq %rsi, efi64_config+8(%rip) /* EFI System table pointer */
502 leaq efi64_config(%rip), %rax
503 movq %rax, efi_config(%rip)
507 ENDPROC(efi64_stub_entry)
514 * Clear BSS (stack is currently empty)
517 leaq _bss(%rip), %rdi
518 leaq _ebss(%rip), %rcx
524 * Do the extraction, and jump to the new kernel..
526 pushq %rsi /* Save the real mode argument */
527 movq %rsi, %rdi /* real mode address */
528 leaq boot_heap(%rip), %rsi /* malloc area for uncompression */
529 leaq input_data(%rip), %rdx /* input_data */
530 movl $z_input_len, %ecx /* input_len */
531 movq %rbp, %r8 /* output target address */
532 movq $z_output_len, %r9 /* decompressed length, end of relocs */
533 call extract_kernel /* returns kernel location in %rax */
537 * Jump to the decompressed kernel.
542 * Adjust the global offset table
544 * RAX is the previous adjustment of the table to undo (use 0 if it's the
545 * first time we touch GOT).
546 * RDI is the new adjustment to apply.
549 /* Walk through the GOT adding the address to the entries */
550 leaq _got(%rip), %rdx
551 leaq _egot(%rip), %rcx
555 subq %rax, (%rdx) /* Undo previous adjustment */
556 addq %rdi, (%rdx) /* Apply the new adjustment */
564 * This is the 32-bit trampoline that will be copied over to low memory.
566 * RDI contains the return address (might be above 4G).
567 * ECX contains the base address of the trampoline memory.
568 * Non zero RDX on return means we need to enable 5-level paging.
570 ENTRY(trampoline_32bit_src)
571 /* Set up data and stack segments */
572 movl $__KERNEL_DS, %eax
576 /* Set up new stack */
577 leal TRAMPOLINE_32BIT_STACK_END(%ecx), %esp
581 btrl $X86_CR0_PG_BIT, %eax
584 /* Check what paging mode we want to be in after the trampoline */
588 /* We want 5-level paging: don't touch CR3 if it already points to 5-level page tables */
590 testl $X86_CR4_LA57, %eax
594 /* We want 4-level paging: don't touch CR3 if it already points to 4-level page tables */
596 testl $X86_CR4_LA57, %eax
599 /* Point CR3 to the trampoline's new top level page table */
600 leal TRAMPOLINE_32BIT_PGTABLE_OFFSET(%ecx), %eax
603 /* Set EFER.LME=1 as a precaution in case hypervsior pulls the rug */
608 btsl $_EFER_LME, %eax
613 /* Enable PAE and LA57 (if required) paging modes */
614 movl $X86_CR4_PAE, %eax
617 orl $X86_CR4_LA57, %eax
621 /* Calculate address of paging_enabled() once we are executing in the trampoline */
622 leal paging_enabled - trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_OFFSET(%ecx), %eax
624 /* Prepare the stack for far return to Long Mode */
628 /* Enable paging again */
629 movl $(X86_CR0_PG | X86_CR0_PE), %eax
636 /* Return from the trampoline */
640 * The trampoline code has a size limit.
641 * Make sure we fail to compile if the trampoline code grows
642 * beyond TRAMPOLINE_32BIT_CODE_SIZE bytes.
644 .org trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_SIZE
648 /* This isn't an x86-64 CPU, so hang intentionally, we cannot continue */
653 #include "../../kernel/verify_cpu.S"
665 .quad 0x00cf9a000000ffff /* __KERNEL32_CS */
666 .quad 0x00af9a000000ffff /* __KERNEL_CS */
667 .quad 0x00cf92000000ffff /* __KERNEL_DS */
668 .quad 0x0080890000000000 /* TS descriptor */
669 .quad 0x0000000000000000 /* TS continued */
672 #ifdef CONFIG_EFI_STUB
676 #ifdef CONFIG_EFI_MIXED
689 #endif /* CONFIG_EFI_STUB */
692 * Stack and heap for uncompression
697 .fill BOOT_HEAP_SIZE, 1, 0
699 .fill BOOT_STACK_SIZE, 1, 0
703 * Space for page tables (not in .bss so not zeroed)
705 .section ".pgtable","a",@nobits
708 .fill BOOT_PGT_SIZE, 1, 0
711 * The page table is going to be used instead of page table in the trampoline
715 .fill PAGE_SIZE, 1, 0