1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Compatibility mode system call entry point for x86-64.
5 * Copyright 2000-2002 Andi Kleen, SuSE Labs.
8 #include <asm/asm-offsets.h>
9 #include <asm/current.h>
10 #include <asm/errno.h>
11 #include <asm/ia32_unistd.h>
12 #include <asm/thread_info.h>
13 #include <asm/segment.h>
14 #include <asm/irqflags.h>
17 #include <linux/linkage.h>
18 #include <linux/err.h>
20 .section .entry.text, "ax"
23 * 32-bit SYSENTER entry.
25 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
26 * on 64-bit kernels running on Intel CPUs.
28 * The SYSENTER instruction, in principle, should *only* occur in the
29 * vDSO. In practice, a small number of Android devices were shipped
30 * with a copy of Bionic that inlined a SYSENTER instruction. This
31 * never happened in any of Google's Bionic versions -- it only happened
32 * in a narrow range of Intel-provided versions.
34 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs.
35 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
36 * SYSENTER does not save anything on the stack,
37 * and does not save old RIP (!!!), RSP, or RFLAGS.
40 * eax system call number
49 ENTRY(entry_SYSENTER_compat)
50 /* Interrupts are off on entry. */
53 /* We are about to clobber %rsp anyway, clobbering here is OK */
54 SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
56 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
59 * User tracing code (ptrace or signal handlers) might assume that
60 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
61 * syscall. Just in case the high bits are nonzero, zero-extend
62 * the syscall number. (This could almost certainly be deleted
63 * with no ill effects.)
67 /* Construct struct pt_regs on stack */
68 pushq $__USER32_DS /* pt_regs->ss */
69 pushq %rbp /* pt_regs->sp (stashed in bp) */
72 * Push flags. This is nasty. First, interrupts are currently
73 * off, but we need pt_regs->flags to have IF set. Second, even
74 * if TF was set when SYSENTER started, it's clear by now. We fix
75 * that later using TIF_SINGLESTEP.
77 pushfq /* pt_regs->flags (except IF = 0) */
78 orl $X86_EFLAGS_IF, (%rsp) /* Fix saved flags */
79 pushq $__USER32_CS /* pt_regs->cs */
80 pushq $0 /* pt_regs->ip = 0 (placeholder) */
81 pushq %rax /* pt_regs->orig_ax */
82 pushq %rdi /* pt_regs->di */
83 pushq %rsi /* pt_regs->si */
84 pushq %rdx /* pt_regs->dx */
85 pushq %rcx /* pt_regs->cx */
86 pushq $-ENOSYS /* pt_regs->ax */
87 pushq $0 /* pt_regs->r8 = 0 */
88 xorl %r8d, %r8d /* nospec r8 */
89 pushq $0 /* pt_regs->r9 = 0 */
90 xorl %r9d, %r9d /* nospec r9 */
91 pushq $0 /* pt_regs->r10 = 0 */
92 xorl %r10d, %r10d /* nospec r10 */
93 pushq $0 /* pt_regs->r11 = 0 */
94 xorl %r11d, %r11d /* nospec r11 */
95 pushq %rbx /* pt_regs->rbx */
96 xorl %ebx, %ebx /* nospec rbx */
97 pushq %rbp /* pt_regs->rbp (will be overwritten) */
98 xorl %ebp, %ebp /* nospec rbp */
99 pushq $0 /* pt_regs->r12 = 0 */
100 xorl %r12d, %r12d /* nospec r12 */
101 pushq $0 /* pt_regs->r13 = 0 */
102 xorl %r13d, %r13d /* nospec r13 */
103 pushq $0 /* pt_regs->r14 = 0 */
104 xorl %r14d, %r14d /* nospec r14 */
105 pushq $0 /* pt_regs->r15 = 0 */
106 xorl %r15d, %r15d /* nospec r15 */
110 * SYSENTER doesn't filter flags, so we need to clear NT and AC
111 * ourselves. To save a few cycles, we can check whether
112 * either was set instead of doing an unconditional popfq.
113 * This needs to happen before enabling interrupts so that
114 * we don't get preempted with NT set.
116 * If TF is set, we will single-step all the way to here -- do_debug
117 * will ignore all the traps. (Yes, this is slow, but so is
118 * single-stepping in general. This allows us to avoid having
119 * a more complicated code to handle the case where a user program
120 * forces us to single-step through the SYSENTER entry code.)
122 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
123 * out-of-line as an optimization: NT is unlikely to be set in the
124 * majority of the cases and instead of polluting the I$ unnecessarily,
125 * we're keeping that code behind a branch which will predict as
126 * not-taken and therefore its instructions won't be fetched.
128 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp)
129 jnz .Lsysenter_fix_flags
130 .Lsysenter_flags_fixed:
133 * User mode is traced as though IRQs are on, and SYSENTER
139 call do_fast_syscall_32
140 /* XEN PV guests always use IRET path */
141 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
142 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
143 jmp sysret32_from_system_call
145 .Lsysenter_fix_flags:
146 pushq $X86_EFLAGS_FIXED
148 jmp .Lsysenter_flags_fixed
149 GLOBAL(__end_entry_SYSENTER_compat)
150 ENDPROC(entry_SYSENTER_compat)
153 * 32-bit SYSCALL entry.
155 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
156 * on 64-bit kernels running on AMD CPUs.
158 * The SYSCALL instruction, in principle, should *only* occur in the
159 * vDSO. In practice, it appears that this really is the case.
162 * - The calling convention for SYSCALL has changed several times without
165 * - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything
166 * user task that did SYSCALL without immediately reloading SS
167 * would randomly crash.
169 * - Most programmers do not directly target AMD CPUs, and the 32-bit
170 * SYSCALL instruction does not exist on Intel CPUs. Even on AMD
171 * CPUs, Linux disables the SYSCALL instruction on 32-bit kernels
172 * because the SYSCALL instruction in legacy/native 32-bit mode (as
173 * opposed to compat mode) is sufficiently poorly designed as to be
174 * essentially unusable.
176 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves
177 * RFLAGS to R11, then loads new SS, CS, and RIP from previously
178 * programmed MSRs. RFLAGS gets masked by a value from another MSR
179 * (so CLD and CLAC are not needed). SYSCALL does not save anything on
180 * the stack and does not change RSP.
182 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode
183 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it).
184 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit
185 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes
186 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors).
189 * eax system call number
192 * ebp arg2 (note: not saved in the stack frame, should not be touched)
199 ENTRY(entry_SYSCALL_compat)
200 /* Interrupts are off on entry. */
206 /* Use %rsp as scratch reg. User ESP is stashed in r8 */
207 SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
209 /* Switch to the kernel stack */
210 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
212 /* Construct struct pt_regs on stack */
213 pushq $__USER32_DS /* pt_regs->ss */
214 pushq %r8 /* pt_regs->sp */
215 pushq %r11 /* pt_regs->flags */
216 pushq $__USER32_CS /* pt_regs->cs */
217 pushq %rcx /* pt_regs->ip */
218 GLOBAL(entry_SYSCALL_compat_after_hwframe)
219 movl %eax, %eax /* discard orig_ax high bits */
220 pushq %rax /* pt_regs->orig_ax */
221 pushq %rdi /* pt_regs->di */
222 pushq %rsi /* pt_regs->si */
223 xorl %esi, %esi /* nospec si */
224 pushq %rdx /* pt_regs->dx */
225 xorl %edx, %edx /* nospec dx */
226 pushq %rbp /* pt_regs->cx (stashed in bp) */
227 xorl %ecx, %ecx /* nospec cx */
228 pushq $-ENOSYS /* pt_regs->ax */
229 pushq $0 /* pt_regs->r8 = 0 */
230 xorl %r8d, %r8d /* nospec r8 */
231 pushq $0 /* pt_regs->r9 = 0 */
232 xorl %r9d, %r9d /* nospec r9 */
233 pushq $0 /* pt_regs->r10 = 0 */
234 xorl %r10d, %r10d /* nospec r10 */
235 pushq $0 /* pt_regs->r11 = 0 */
236 xorl %r11d, %r11d /* nospec r11 */
237 pushq %rbx /* pt_regs->rbx */
238 xorl %ebx, %ebx /* nospec rbx */
239 pushq %rbp /* pt_regs->rbp (will be overwritten) */
240 xorl %ebp, %ebp /* nospec rbp */
241 pushq $0 /* pt_regs->r12 = 0 */
242 xorl %r12d, %r12d /* nospec r12 */
243 pushq $0 /* pt_regs->r13 = 0 */
244 xorl %r13d, %r13d /* nospec r13 */
245 pushq $0 /* pt_regs->r14 = 0 */
246 xorl %r14d, %r14d /* nospec r14 */
247 pushq $0 /* pt_regs->r15 = 0 */
248 xorl %r15d, %r15d /* nospec r15 */
251 * User mode is traced as though IRQs are on, and SYSENTER
257 call do_fast_syscall_32
258 /* XEN PV guests always use IRET path */
259 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
260 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
262 /* Opportunistic SYSRET */
263 sysret32_from_system_call:
264 TRACE_IRQS_ON /* User mode traces as IRQs on. */
265 movq RBX(%rsp), %rbx /* pt_regs->rbx */
266 movq RBP(%rsp), %rbp /* pt_regs->rbp */
267 movq EFLAGS(%rsp), %r11 /* pt_regs->flags (in r11) */
268 movq RIP(%rsp), %rcx /* pt_regs->ip (in rcx) */
269 addq $RAX, %rsp /* Skip r8-r15 */
270 popq %rax /* pt_regs->rax */
271 popq %rdx /* Skip pt_regs->cx */
272 popq %rdx /* pt_regs->dx */
273 popq %rsi /* pt_regs->si */
274 popq %rdi /* pt_regs->di */
277 * USERGS_SYSRET32 does:
278 * GSBASE = user's GS base
284 * ECX will not match pt_regs->cx, but we're returning to a vDSO
285 * trampoline that will fix up RCX, so this is okay.
287 * R12-R15 are callee-saved, so they contain whatever was in them
288 * when the system call started, which is already known to user
289 * code. We zero R8-R10 to avoid info leaks.
291 movq RSP-ORIG_RAX(%rsp), %rsp
294 * The original userspace %rsp (RSP-ORIG_RAX(%rsp)) is stored
295 * on the process stack which is not mapped to userspace and
296 * not readable after we SWITCH_TO_USER_CR3. Delay the CR3
297 * switch until after after the last reference to the process
300 * %r8/%r9 are zeroed before the sysret, thus safe to clobber.
302 SWITCH_TO_USER_CR3_NOSTACK scratch_reg=%r8 scratch_reg2=%r9
309 END(entry_SYSCALL_compat)
312 * 32-bit legacy system call entry.
314 * 32-bit x86 Linux system calls traditionally used the INT $0x80
315 * instruction. INT $0x80 lands here.
317 * This entry point can be used by 32-bit and 64-bit programs to perform
318 * 32-bit system calls. Instances of INT $0x80 can be found inline in
319 * various programs and libraries. It is also used by the vDSO's
320 * __kernel_vsyscall fallback for hardware that doesn't support a faster
321 * entry method. Restarted 32-bit system calls also fall back to INT
322 * $0x80 regardless of what instruction was originally used to do the
325 * This is considered a slow path. It is not used by most libc
326 * implementations on modern hardware except during process startup.
329 * eax system call number
337 ENTRY(entry_INT80_compat)
339 * Interrupts are off on entry.
341 ASM_CLAC /* Do this early to minimize exposure */
345 * User tracing code (ptrace or signal handlers) might assume that
346 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
347 * syscall. Just in case the high bits are nonzero, zero-extend
348 * the syscall number. (This could almost certainly be deleted
349 * with no ill effects.)
353 /* switch to thread stack expects orig_ax and rdi to be pushed */
354 pushq %rax /* pt_regs->orig_ax */
355 pushq %rdi /* pt_regs->di */
357 /* Need to switch before accessing the thread stack. */
358 SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi
359 /* In the Xen PV case we already run on the thread stack. */
360 ALTERNATIVE "movq %rsp, %rdi", "jmp .Lint80_keep_stack", X86_FEATURE_XENPV
361 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
363 pushq 6*8(%rdi) /* regs->ss */
364 pushq 5*8(%rdi) /* regs->rsp */
365 pushq 4*8(%rdi) /* regs->eflags */
366 pushq 3*8(%rdi) /* regs->cs */
367 pushq 2*8(%rdi) /* regs->ip */
368 pushq 1*8(%rdi) /* regs->orig_ax */
369 pushq (%rdi) /* pt_regs->di */
372 pushq %rsi /* pt_regs->si */
373 xorl %esi, %esi /* nospec si */
374 pushq %rdx /* pt_regs->dx */
375 xorl %edx, %edx /* nospec dx */
376 pushq %rcx /* pt_regs->cx */
377 xorl %ecx, %ecx /* nospec cx */
378 pushq $-ENOSYS /* pt_regs->ax */
379 pushq %r8 /* pt_regs->r8 */
380 xorl %r8d, %r8d /* nospec r8 */
381 pushq %r9 /* pt_regs->r9 */
382 xorl %r9d, %r9d /* nospec r9 */
383 pushq %r10 /* pt_regs->r10*/
384 xorl %r10d, %r10d /* nospec r10 */
385 pushq %r11 /* pt_regs->r11 */
386 xorl %r11d, %r11d /* nospec r11 */
387 pushq %rbx /* pt_regs->rbx */
388 xorl %ebx, %ebx /* nospec rbx */
389 pushq %rbp /* pt_regs->rbp */
390 xorl %ebp, %ebp /* nospec rbp */
391 pushq %r12 /* pt_regs->r12 */
392 xorl %r12d, %r12d /* nospec r12 */
393 pushq %r13 /* pt_regs->r13 */
394 xorl %r13d, %r13d /* nospec r13 */
395 pushq %r14 /* pt_regs->r14 */
396 xorl %r14d, %r14d /* nospec r14 */
397 pushq %r15 /* pt_regs->r15 */
398 xorl %r15d, %r15d /* nospec r15 */
402 * User mode is traced as though IRQs are on, and the interrupt
403 * gate turned them off.
408 call do_int80_syscall_32
411 /* Go back to user mode. */
413 jmp swapgs_restore_regs_and_return_to_usermode
414 END(entry_INT80_compat)