iwlwifi: mvm: fix version check for GEO_TX_POWER_LIMIT support
[linux/fpc-iii.git] / arch / x86 / include / asm / segment.h
blobe293c122d0d54fbc802c1212edc9ed099be582f0
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_SEGMENT_H
3 #define _ASM_X86_SEGMENT_H
5 #include <linux/const.h>
6 #include <asm/alternative.h>
8 /*
9 * Constructor for a conventional segment GDT (or LDT) entry.
10 * This is a macro so it can be used in initializers.
12 #define GDT_ENTRY(flags, base, limit) \
13 ((((base) & _AC(0xff000000,ULL)) << (56-24)) | \
14 (((flags) & _AC(0x0000f0ff,ULL)) << 40) | \
15 (((limit) & _AC(0x000f0000,ULL)) << (48-16)) | \
16 (((base) & _AC(0x00ffffff,ULL)) << 16) | \
17 (((limit) & _AC(0x0000ffff,ULL))))
19 /* Simple and small GDT entries for booting only: */
21 #define GDT_ENTRY_BOOT_CS 2
22 #define GDT_ENTRY_BOOT_DS 3
23 #define GDT_ENTRY_BOOT_TSS 4
24 #define __BOOT_CS (GDT_ENTRY_BOOT_CS*8)
25 #define __BOOT_DS (GDT_ENTRY_BOOT_DS*8)
26 #define __BOOT_TSS (GDT_ENTRY_BOOT_TSS*8)
29 * Bottom two bits of selector give the ring
30 * privilege level
32 #define SEGMENT_RPL_MASK 0x3
34 /* User mode is privilege level 3: */
35 #define USER_RPL 0x3
37 /* Bit 2 is Table Indicator (TI): selects between LDT or GDT */
38 #define SEGMENT_TI_MASK 0x4
39 /* LDT segment has TI set ... */
40 #define SEGMENT_LDT 0x4
41 /* ... GDT has it cleared */
42 #define SEGMENT_GDT 0x0
44 #define GDT_ENTRY_INVALID_SEG 0
46 #ifdef CONFIG_X86_32
48 * The layout of the per-CPU GDT under Linux:
50 * 0 - null <=== cacheline #1
51 * 1 - reserved
52 * 2 - reserved
53 * 3 - reserved
55 * 4 - unused <=== cacheline #2
56 * 5 - unused
58 * ------- start of TLS (Thread-Local Storage) segments:
60 * 6 - TLS segment #1 [ glibc's TLS segment ]
61 * 7 - TLS segment #2 [ Wine's %fs Win32 segment ]
62 * 8 - TLS segment #3 <=== cacheline #3
63 * 9 - reserved
64 * 10 - reserved
65 * 11 - reserved
67 * ------- start of kernel segments:
69 * 12 - kernel code segment <=== cacheline #4
70 * 13 - kernel data segment
71 * 14 - default user CS
72 * 15 - default user DS
73 * 16 - TSS <=== cacheline #5
74 * 17 - LDT
75 * 18 - PNPBIOS support (16->32 gate)
76 * 19 - PNPBIOS support
77 * 20 - PNPBIOS support <=== cacheline #6
78 * 21 - PNPBIOS support
79 * 22 - PNPBIOS support
80 * 23 - APM BIOS support
81 * 24 - APM BIOS support <=== cacheline #7
82 * 25 - APM BIOS support
84 * 26 - ESPFIX small SS
85 * 27 - per-cpu [ offset to per-cpu data area ]
86 * 28 - stack_canary-20 [ for stack protector ] <=== cacheline #8
87 * 29 - unused
88 * 30 - unused
89 * 31 - TSS for double fault handler
91 #define GDT_ENTRY_TLS_MIN 6
92 #define GDT_ENTRY_TLS_MAX (GDT_ENTRY_TLS_MIN + GDT_ENTRY_TLS_ENTRIES - 1)
94 #define GDT_ENTRY_KERNEL_CS 12
95 #define GDT_ENTRY_KERNEL_DS 13
96 #define GDT_ENTRY_DEFAULT_USER_CS 14
97 #define GDT_ENTRY_DEFAULT_USER_DS 15
98 #define GDT_ENTRY_TSS 16
99 #define GDT_ENTRY_LDT 17
100 #define GDT_ENTRY_PNPBIOS_CS32 18
101 #define GDT_ENTRY_PNPBIOS_CS16 19
102 #define GDT_ENTRY_PNPBIOS_DS 20
103 #define GDT_ENTRY_PNPBIOS_TS1 21
104 #define GDT_ENTRY_PNPBIOS_TS2 22
105 #define GDT_ENTRY_APMBIOS_BASE 23
107 #define GDT_ENTRY_ESPFIX_SS 26
108 #define GDT_ENTRY_PERCPU 27
109 #define GDT_ENTRY_STACK_CANARY 28
111 #define GDT_ENTRY_DOUBLEFAULT_TSS 31
114 * Number of entries in the GDT table:
116 #define GDT_ENTRIES 32
119 * Segment selector values corresponding to the above entries:
122 #define __KERNEL_CS (GDT_ENTRY_KERNEL_CS*8)
123 #define __KERNEL_DS (GDT_ENTRY_KERNEL_DS*8)
124 #define __USER_DS (GDT_ENTRY_DEFAULT_USER_DS*8 + 3)
125 #define __USER_CS (GDT_ENTRY_DEFAULT_USER_CS*8 + 3)
126 #define __ESPFIX_SS (GDT_ENTRY_ESPFIX_SS*8)
128 /* segment for calling fn: */
129 #define PNP_CS32 (GDT_ENTRY_PNPBIOS_CS32*8)
130 /* code segment for BIOS: */
131 #define PNP_CS16 (GDT_ENTRY_PNPBIOS_CS16*8)
133 /* "Is this PNP code selector (PNP_CS32 or PNP_CS16)?" */
134 #define SEGMENT_IS_PNP_CODE(x) (((x) & 0xf4) == PNP_CS32)
136 /* data segment for BIOS: */
137 #define PNP_DS (GDT_ENTRY_PNPBIOS_DS*8)
138 /* transfer data segment: */
139 #define PNP_TS1 (GDT_ENTRY_PNPBIOS_TS1*8)
140 /* another data segment: */
141 #define PNP_TS2 (GDT_ENTRY_PNPBIOS_TS2*8)
143 #ifdef CONFIG_SMP
144 # define __KERNEL_PERCPU (GDT_ENTRY_PERCPU*8)
145 #else
146 # define __KERNEL_PERCPU 0
147 #endif
149 #ifdef CONFIG_STACKPROTECTOR
150 # define __KERNEL_STACK_CANARY (GDT_ENTRY_STACK_CANARY*8)
151 #else
152 # define __KERNEL_STACK_CANARY 0
153 #endif
155 #else /* 64-bit: */
157 #include <asm/cache.h>
159 #define GDT_ENTRY_KERNEL32_CS 1
160 #define GDT_ENTRY_KERNEL_CS 2
161 #define GDT_ENTRY_KERNEL_DS 3
164 * We cannot use the same code segment descriptor for user and kernel mode,
165 * not even in long flat mode, because of different DPL.
167 * GDT layout to get 64-bit SYSCALL/SYSRET support right. SYSRET hardcodes
168 * selectors:
170 * if returning to 32-bit userspace: cs = STAR.SYSRET_CS,
171 * if returning to 64-bit userspace: cs = STAR.SYSRET_CS+16,
173 * ss = STAR.SYSRET_CS+8 (in either case)
175 * thus USER_DS should be between 32-bit and 64-bit code selectors:
177 #define GDT_ENTRY_DEFAULT_USER32_CS 4
178 #define GDT_ENTRY_DEFAULT_USER_DS 5
179 #define GDT_ENTRY_DEFAULT_USER_CS 6
181 /* Needs two entries */
182 #define GDT_ENTRY_TSS 8
183 /* Needs two entries */
184 #define GDT_ENTRY_LDT 10
186 #define GDT_ENTRY_TLS_MIN 12
187 #define GDT_ENTRY_TLS_MAX 14
189 /* Abused to load per CPU data from limit */
190 #define GDT_ENTRY_PER_CPU 15
193 * Number of entries in the GDT table:
195 #define GDT_ENTRIES 16
198 * Segment selector values corresponding to the above entries:
200 * Note, selectors also need to have a correct RPL,
201 * expressed with the +3 value for user-space selectors:
203 #define __KERNEL32_CS (GDT_ENTRY_KERNEL32_CS*8)
204 #define __KERNEL_CS (GDT_ENTRY_KERNEL_CS*8)
205 #define __KERNEL_DS (GDT_ENTRY_KERNEL_DS*8)
206 #define __USER32_CS (GDT_ENTRY_DEFAULT_USER32_CS*8 + 3)
207 #define __USER_DS (GDT_ENTRY_DEFAULT_USER_DS*8 + 3)
208 #define __USER32_DS __USER_DS
209 #define __USER_CS (GDT_ENTRY_DEFAULT_USER_CS*8 + 3)
210 #define __PER_CPU_SEG (GDT_ENTRY_PER_CPU*8 + 3)
212 #endif
214 #ifndef CONFIG_PARAVIRT
215 # define get_kernel_rpl() 0
216 #endif
218 #define IDT_ENTRIES 256
219 #define NUM_EXCEPTION_VECTORS 32
221 /* Bitmask of exception vectors which push an error code on the stack: */
222 #define EXCEPTION_ERRCODE_MASK 0x00027d00
224 #define GDT_SIZE (GDT_ENTRIES*8)
225 #define GDT_ENTRY_TLS_ENTRIES 3
226 #define TLS_SIZE (GDT_ENTRY_TLS_ENTRIES* 8)
228 #ifdef __KERNEL__
231 * early_idt_handler_array is an array of entry points referenced in the
232 * early IDT. For simplicity, it's a real array with one entry point
233 * every nine bytes. That leaves room for an optional 'push $0' if the
234 * vector has no error code (two bytes), a 'push $vector_number' (two
235 * bytes), and a jump to the common entry code (up to five bytes).
237 #define EARLY_IDT_HANDLER_SIZE 9
240 * xen_early_idt_handler_array is for Xen pv guests: for each entry in
241 * early_idt_handler_array it contains a prequel in the form of
242 * pop %rcx; pop %r11; jmp early_idt_handler_array[i]; summing up to
243 * max 8 bytes.
245 #define XEN_EARLY_IDT_HANDLER_SIZE 8
247 #ifndef __ASSEMBLY__
249 extern const char early_idt_handler_array[NUM_EXCEPTION_VECTORS][EARLY_IDT_HANDLER_SIZE];
250 extern void early_ignore_irq(void);
252 #if defined(CONFIG_X86_64) && defined(CONFIG_XEN_PV)
253 extern const char xen_early_idt_handler_array[NUM_EXCEPTION_VECTORS][XEN_EARLY_IDT_HANDLER_SIZE];
254 #endif
257 * Load a segment. Fall back on loading the zero segment if something goes
258 * wrong. This variant assumes that loading zero fully clears the segment.
259 * This is always the case on Intel CPUs and, even on 64-bit AMD CPUs, any
260 * failure to fully clear the cached descriptor is only observable for
261 * FS and GS.
263 #define __loadsegment_simple(seg, value) \
264 do { \
265 unsigned short __val = (value); \
267 asm volatile(" \n" \
268 "1: movl %k0,%%" #seg " \n" \
270 ".section .fixup,\"ax\" \n" \
271 "2: xorl %k0,%k0 \n" \
272 " jmp 1b \n" \
273 ".previous \n" \
275 _ASM_EXTABLE(1b, 2b) \
277 : "+r" (__val) : : "memory"); \
278 } while (0)
280 #define __loadsegment_ss(value) __loadsegment_simple(ss, (value))
281 #define __loadsegment_ds(value) __loadsegment_simple(ds, (value))
282 #define __loadsegment_es(value) __loadsegment_simple(es, (value))
284 #ifdef CONFIG_X86_32
287 * On 32-bit systems, the hidden parts of FS and GS are unobservable if
288 * the selector is NULL, so there's no funny business here.
290 #define __loadsegment_fs(value) __loadsegment_simple(fs, (value))
291 #define __loadsegment_gs(value) __loadsegment_simple(gs, (value))
293 #else
295 static inline void __loadsegment_fs(unsigned short value)
297 asm volatile(" \n"
298 "1: movw %0, %%fs \n"
299 "2: \n"
301 _ASM_EXTABLE_HANDLE(1b, 2b, ex_handler_clear_fs)
303 : : "rm" (value) : "memory");
306 /* __loadsegment_gs is intentionally undefined. Use load_gs_index instead. */
308 #endif
310 #define loadsegment(seg, value) __loadsegment_ ## seg (value)
313 * Save a segment register away:
315 #define savesegment(seg, value) \
316 asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
319 * x86-32 user GS accessors:
321 #ifdef CONFIG_X86_32
322 # ifdef CONFIG_X86_32_LAZY_GS
323 # define get_user_gs(regs) (u16)({ unsigned long v; savesegment(gs, v); v; })
324 # define set_user_gs(regs, v) loadsegment(gs, (unsigned long)(v))
325 # define task_user_gs(tsk) ((tsk)->thread.gs)
326 # define lazy_save_gs(v) savesegment(gs, (v))
327 # define lazy_load_gs(v) loadsegment(gs, (v))
328 # else /* X86_32_LAZY_GS */
329 # define get_user_gs(regs) (u16)((regs)->gs)
330 # define set_user_gs(regs, v) do { (regs)->gs = (v); } while (0)
331 # define task_user_gs(tsk) (task_pt_regs(tsk)->gs)
332 # define lazy_save_gs(v) do { } while (0)
333 # define lazy_load_gs(v) do { } while (0)
334 # endif /* X86_32_LAZY_GS */
335 #endif /* X86_32 */
337 #endif /* !__ASSEMBLY__ */
338 #endif /* __KERNEL__ */
340 #endif /* _ASM_X86_SEGMENT_H */