2 * SuperH Pin Function Controller pinmux support.
4 * Copyright (C) 2012 Paul Mundt
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
11 #define DRV_NAME "sh-pfc"
13 #include <linux/device.h>
14 #include <linux/err.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
18 #include <linux/pinctrl/consumer.h>
19 #include <linux/pinctrl/machine.h>
20 #include <linux/pinctrl/pinconf.h>
21 #include <linux/pinctrl/pinconf-generic.h>
22 #include <linux/pinctrl/pinctrl.h>
23 #include <linux/pinctrl/pinmux.h>
24 #include <linux/slab.h>
25 #include <linux/spinlock.h>
29 #include "../pinconf.h"
31 struct sh_pfc_pin_config
{
35 struct sh_pfc_pinctrl
{
36 struct pinctrl_dev
*pctl
;
37 struct pinctrl_desc pctl_desc
;
41 struct pinctrl_pin_desc
*pins
;
42 struct sh_pfc_pin_config
*configs
;
44 const char *func_prop_name
;
45 const char *groups_prop_name
;
46 const char *pins_prop_name
;
49 static int sh_pfc_get_groups_count(struct pinctrl_dev
*pctldev
)
51 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
53 return pmx
->pfc
->info
->nr_groups
;
56 static const char *sh_pfc_get_group_name(struct pinctrl_dev
*pctldev
,
59 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
61 return pmx
->pfc
->info
->groups
[selector
].name
;
64 static int sh_pfc_get_group_pins(struct pinctrl_dev
*pctldev
, unsigned selector
,
65 const unsigned **pins
, unsigned *num_pins
)
67 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
69 *pins
= pmx
->pfc
->info
->groups
[selector
].pins
;
70 *num_pins
= pmx
->pfc
->info
->groups
[selector
].nr_pins
;
75 static void sh_pfc_pin_dbg_show(struct pinctrl_dev
*pctldev
, struct seq_file
*s
,
78 seq_printf(s
, "%s", DRV_NAME
);
82 static int sh_pfc_map_add_config(struct pinctrl_map
*map
,
83 const char *group_or_pin
,
84 enum pinctrl_map_type type
,
85 unsigned long *configs
,
86 unsigned int num_configs
)
90 cfgs
= kmemdup(configs
, num_configs
* sizeof(*cfgs
),
96 map
->data
.configs
.group_or_pin
= group_or_pin
;
97 map
->data
.configs
.configs
= cfgs
;
98 map
->data
.configs
.num_configs
= num_configs
;
103 static int sh_pfc_dt_subnode_to_map(struct pinctrl_dev
*pctldev
,
104 struct device_node
*np
,
105 struct pinctrl_map
**map
,
106 unsigned int *num_maps
, unsigned int *index
)
108 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
109 struct device
*dev
= pmx
->pfc
->dev
;
110 struct pinctrl_map
*maps
= *map
;
111 unsigned int nmaps
= *num_maps
;
112 unsigned int idx
= *index
;
113 unsigned int num_configs
;
114 const char *function
= NULL
;
115 unsigned long *configs
;
116 struct property
*prop
;
117 unsigned int num_groups
;
118 unsigned int num_pins
;
123 /* Support both the old Renesas-specific properties and the new standard
124 * properties. Mixing old and new properties isn't allowed, neither
125 * inside a subnode nor across subnodes.
127 if (!pmx
->func_prop_name
) {
128 if (of_find_property(np
, "groups", NULL
) ||
129 of_find_property(np
, "pins", NULL
)) {
130 pmx
->func_prop_name
= "function";
131 pmx
->groups_prop_name
= "groups";
132 pmx
->pins_prop_name
= "pins";
134 pmx
->func_prop_name
= "renesas,function";
135 pmx
->groups_prop_name
= "renesas,groups";
136 pmx
->pins_prop_name
= "renesas,pins";
140 /* Parse the function and configuration properties. At least a function
141 * or one configuration must be specified.
143 ret
= of_property_read_string(np
, pmx
->func_prop_name
, &function
);
144 if (ret
< 0 && ret
!= -EINVAL
) {
145 dev_err(dev
, "Invalid function in DT\n");
149 ret
= pinconf_generic_parse_dt_config(np
, NULL
, &configs
, &num_configs
);
153 if (!function
&& num_configs
== 0) {
155 "DT node must contain at least a function or config\n");
160 /* Count the number of pins and groups and reallocate mappings. */
161 ret
= of_property_count_strings(np
, pmx
->pins_prop_name
);
162 if (ret
== -EINVAL
) {
164 } else if (ret
< 0) {
165 dev_err(dev
, "Invalid pins list in DT\n");
171 ret
= of_property_count_strings(np
, pmx
->groups_prop_name
);
172 if (ret
== -EINVAL
) {
174 } else if (ret
< 0) {
175 dev_err(dev
, "Invalid pin groups list in DT\n");
181 if (!num_pins
&& !num_groups
) {
182 dev_err(dev
, "No pin or group provided in DT node\n");
190 nmaps
+= num_pins
+ num_groups
;
192 maps
= krealloc(maps
, sizeof(*maps
) * nmaps
, GFP_KERNEL
);
201 /* Iterate over pins and groups and create the mappings. */
202 of_property_for_each_string(np
, pmx
->groups_prop_name
, prop
, group
) {
204 maps
[idx
].type
= PIN_MAP_TYPE_MUX_GROUP
;
205 maps
[idx
].data
.mux
.group
= group
;
206 maps
[idx
].data
.mux
.function
= function
;
211 ret
= sh_pfc_map_add_config(&maps
[idx
], group
,
212 PIN_MAP_TYPE_CONFIGS_GROUP
,
213 configs
, num_configs
);
226 of_property_for_each_string(np
, pmx
->pins_prop_name
, prop
, pin
) {
227 ret
= sh_pfc_map_add_config(&maps
[idx
], pin
,
228 PIN_MAP_TYPE_CONFIGS_PIN
,
229 configs
, num_configs
);
242 static void sh_pfc_dt_free_map(struct pinctrl_dev
*pctldev
,
243 struct pinctrl_map
*map
, unsigned num_maps
)
250 for (i
= 0; i
< num_maps
; ++i
) {
251 if (map
[i
].type
== PIN_MAP_TYPE_CONFIGS_GROUP
||
252 map
[i
].type
== PIN_MAP_TYPE_CONFIGS_PIN
)
253 kfree(map
[i
].data
.configs
.configs
);
259 static int sh_pfc_dt_node_to_map(struct pinctrl_dev
*pctldev
,
260 struct device_node
*np
,
261 struct pinctrl_map
**map
, unsigned *num_maps
)
263 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
264 struct device
*dev
= pmx
->pfc
->dev
;
265 struct device_node
*child
;
273 for_each_child_of_node(np
, child
) {
274 ret
= sh_pfc_dt_subnode_to_map(pctldev
, child
, map
, num_maps
,
280 /* If no mapping has been found in child nodes try the config node. */
281 if (*num_maps
== 0) {
282 ret
= sh_pfc_dt_subnode_to_map(pctldev
, np
, map
, num_maps
,
291 dev_err(dev
, "no mapping found in node %s\n", np
->full_name
);
296 sh_pfc_dt_free_map(pctldev
, *map
, *num_maps
);
300 #endif /* CONFIG_OF */
302 static const struct pinctrl_ops sh_pfc_pinctrl_ops
= {
303 .get_groups_count
= sh_pfc_get_groups_count
,
304 .get_group_name
= sh_pfc_get_group_name
,
305 .get_group_pins
= sh_pfc_get_group_pins
,
306 .pin_dbg_show
= sh_pfc_pin_dbg_show
,
308 .dt_node_to_map
= sh_pfc_dt_node_to_map
,
309 .dt_free_map
= sh_pfc_dt_free_map
,
313 static int sh_pfc_get_functions_count(struct pinctrl_dev
*pctldev
)
315 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
317 return pmx
->pfc
->info
->nr_functions
;
320 static const char *sh_pfc_get_function_name(struct pinctrl_dev
*pctldev
,
323 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
325 return pmx
->pfc
->info
->functions
[selector
].name
;
328 static int sh_pfc_get_function_groups(struct pinctrl_dev
*pctldev
,
330 const char * const **groups
,
331 unsigned * const num_groups
)
333 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
335 *groups
= pmx
->pfc
->info
->functions
[selector
].groups
;
336 *num_groups
= pmx
->pfc
->info
->functions
[selector
].nr_groups
;
341 static int sh_pfc_func_set_mux(struct pinctrl_dev
*pctldev
, unsigned selector
,
344 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
345 struct sh_pfc
*pfc
= pmx
->pfc
;
346 const struct sh_pfc_pin_group
*grp
= &pfc
->info
->groups
[group
];
351 spin_lock_irqsave(&pfc
->lock
, flags
);
353 for (i
= 0; i
< grp
->nr_pins
; ++i
) {
354 int idx
= sh_pfc_get_pin_index(pfc
, grp
->pins
[i
]);
355 struct sh_pfc_pin_config
*cfg
= &pmx
->configs
[idx
];
357 if (cfg
->type
!= PINMUX_TYPE_NONE
) {
363 for (i
= 0; i
< grp
->nr_pins
; ++i
) {
364 ret
= sh_pfc_config_mux(pfc
, grp
->mux
[i
], PINMUX_TYPE_FUNCTION
);
370 spin_unlock_irqrestore(&pfc
->lock
, flags
);
374 static int sh_pfc_gpio_request_enable(struct pinctrl_dev
*pctldev
,
375 struct pinctrl_gpio_range
*range
,
378 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
379 struct sh_pfc
*pfc
= pmx
->pfc
;
380 int idx
= sh_pfc_get_pin_index(pfc
, offset
);
381 struct sh_pfc_pin_config
*cfg
= &pmx
->configs
[idx
];
385 spin_lock_irqsave(&pfc
->lock
, flags
);
387 if (cfg
->type
!= PINMUX_TYPE_NONE
) {
389 "Pin %u is busy, can't configure it as GPIO.\n",
396 /* If GPIOs are handled externally the pin mux type need to be
399 const struct sh_pfc_pin
*pin
= &pfc
->info
->pins
[idx
];
401 ret
= sh_pfc_config_mux(pfc
, pin
->enum_id
, PINMUX_TYPE_GPIO
);
406 cfg
->type
= PINMUX_TYPE_GPIO
;
411 spin_unlock_irqrestore(&pfc
->lock
, flags
);
416 static void sh_pfc_gpio_disable_free(struct pinctrl_dev
*pctldev
,
417 struct pinctrl_gpio_range
*range
,
420 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
421 struct sh_pfc
*pfc
= pmx
->pfc
;
422 int idx
= sh_pfc_get_pin_index(pfc
, offset
);
423 struct sh_pfc_pin_config
*cfg
= &pmx
->configs
[idx
];
426 spin_lock_irqsave(&pfc
->lock
, flags
);
427 cfg
->type
= PINMUX_TYPE_NONE
;
428 spin_unlock_irqrestore(&pfc
->lock
, flags
);
431 static int sh_pfc_gpio_set_direction(struct pinctrl_dev
*pctldev
,
432 struct pinctrl_gpio_range
*range
,
433 unsigned offset
, bool input
)
435 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
436 struct sh_pfc
*pfc
= pmx
->pfc
;
437 int new_type
= input
? PINMUX_TYPE_INPUT
: PINMUX_TYPE_OUTPUT
;
438 int idx
= sh_pfc_get_pin_index(pfc
, offset
);
439 const struct sh_pfc_pin
*pin
= &pfc
->info
->pins
[idx
];
440 struct sh_pfc_pin_config
*cfg
= &pmx
->configs
[idx
];
445 /* Check if the requested direction is supported by the pin. Not all SoC
446 * provide pin config data, so perform the check conditionally.
449 dir
= input
? SH_PFC_PIN_CFG_INPUT
: SH_PFC_PIN_CFG_OUTPUT
;
450 if (!(pin
->configs
& dir
))
454 spin_lock_irqsave(&pfc
->lock
, flags
);
456 ret
= sh_pfc_config_mux(pfc
, pin
->enum_id
, new_type
);
460 cfg
->type
= new_type
;
463 spin_unlock_irqrestore(&pfc
->lock
, flags
);
467 static const struct pinmux_ops sh_pfc_pinmux_ops
= {
468 .get_functions_count
= sh_pfc_get_functions_count
,
469 .get_function_name
= sh_pfc_get_function_name
,
470 .get_function_groups
= sh_pfc_get_function_groups
,
471 .set_mux
= sh_pfc_func_set_mux
,
472 .gpio_request_enable
= sh_pfc_gpio_request_enable
,
473 .gpio_disable_free
= sh_pfc_gpio_disable_free
,
474 .gpio_set_direction
= sh_pfc_gpio_set_direction
,
477 /* Check whether the requested parameter is supported for a pin. */
478 static bool sh_pfc_pinconf_validate(struct sh_pfc
*pfc
, unsigned int _pin
,
479 enum pin_config_param param
)
481 int idx
= sh_pfc_get_pin_index(pfc
, _pin
);
482 const struct sh_pfc_pin
*pin
= &pfc
->info
->pins
[idx
];
485 case PIN_CONFIG_BIAS_DISABLE
:
486 return pin
->configs
&
487 (SH_PFC_PIN_CFG_PULL_UP
| SH_PFC_PIN_CFG_PULL_DOWN
);
489 case PIN_CONFIG_BIAS_PULL_UP
:
490 return pin
->configs
& SH_PFC_PIN_CFG_PULL_UP
;
492 case PIN_CONFIG_BIAS_PULL_DOWN
:
493 return pin
->configs
& SH_PFC_PIN_CFG_PULL_DOWN
;
495 case PIN_CONFIG_POWER_SOURCE
:
496 return pin
->configs
& SH_PFC_PIN_CFG_IO_VOLTAGE
;
503 static int sh_pfc_pinconf_get(struct pinctrl_dev
*pctldev
, unsigned _pin
,
504 unsigned long *config
)
506 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
507 struct sh_pfc
*pfc
= pmx
->pfc
;
508 enum pin_config_param param
= pinconf_to_config_param(*config
);
511 if (!sh_pfc_pinconf_validate(pfc
, _pin
, param
))
515 case PIN_CONFIG_BIAS_DISABLE
:
516 case PIN_CONFIG_BIAS_PULL_UP
:
517 case PIN_CONFIG_BIAS_PULL_DOWN
: {
520 if (!pfc
->info
->ops
|| !pfc
->info
->ops
->get_bias
)
523 spin_lock_irqsave(&pfc
->lock
, flags
);
524 bias
= pfc
->info
->ops
->get_bias(pfc
, _pin
);
525 spin_unlock_irqrestore(&pfc
->lock
, flags
);
534 case PIN_CONFIG_POWER_SOURCE
: {
537 if (!pfc
->info
->ops
|| !pfc
->info
->ops
->get_io_voltage
)
540 spin_lock_irqsave(&pfc
->lock
, flags
);
541 ret
= pfc
->info
->ops
->get_io_voltage(pfc
, _pin
);
542 spin_unlock_irqrestore(&pfc
->lock
, flags
);
558 static int sh_pfc_pinconf_set(struct pinctrl_dev
*pctldev
, unsigned _pin
,
559 unsigned long *configs
, unsigned num_configs
)
561 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
562 struct sh_pfc
*pfc
= pmx
->pfc
;
563 enum pin_config_param param
;
567 for (i
= 0; i
< num_configs
; i
++) {
568 param
= pinconf_to_config_param(configs
[i
]);
570 if (!sh_pfc_pinconf_validate(pfc
, _pin
, param
))
574 case PIN_CONFIG_BIAS_PULL_UP
:
575 case PIN_CONFIG_BIAS_PULL_DOWN
:
576 case PIN_CONFIG_BIAS_DISABLE
:
577 if (!pfc
->info
->ops
|| !pfc
->info
->ops
->set_bias
)
580 spin_lock_irqsave(&pfc
->lock
, flags
);
581 pfc
->info
->ops
->set_bias(pfc
, _pin
, param
);
582 spin_unlock_irqrestore(&pfc
->lock
, flags
);
586 case PIN_CONFIG_POWER_SOURCE
: {
588 pinconf_to_config_argument(configs
[i
]);
591 if (!pfc
->info
->ops
|| !pfc
->info
->ops
->set_io_voltage
)
594 spin_lock_irqsave(&pfc
->lock
, flags
);
595 ret
= pfc
->info
->ops
->set_io_voltage(pfc
, _pin
, arg
);
596 spin_unlock_irqrestore(&pfc
->lock
, flags
);
607 } /* for each config */
612 static int sh_pfc_pinconf_group_set(struct pinctrl_dev
*pctldev
, unsigned group
,
613 unsigned long *configs
,
614 unsigned num_configs
)
616 struct sh_pfc_pinctrl
*pmx
= pinctrl_dev_get_drvdata(pctldev
);
617 const unsigned int *pins
;
618 unsigned int num_pins
;
621 pins
= pmx
->pfc
->info
->groups
[group
].pins
;
622 num_pins
= pmx
->pfc
->info
->groups
[group
].nr_pins
;
624 for (i
= 0; i
< num_pins
; ++i
)
625 sh_pfc_pinconf_set(pctldev
, pins
[i
], configs
, num_configs
);
630 static const struct pinconf_ops sh_pfc_pinconf_ops
= {
632 .pin_config_get
= sh_pfc_pinconf_get
,
633 .pin_config_set
= sh_pfc_pinconf_set
,
634 .pin_config_group_set
= sh_pfc_pinconf_group_set
,
635 .pin_config_config_dbg_show
= pinconf_generic_dump_config
,
638 /* PFC ranges -> pinctrl pin descs */
639 static int sh_pfc_map_pins(struct sh_pfc
*pfc
, struct sh_pfc_pinctrl
*pmx
)
643 /* Allocate and initialize the pins and configs arrays. */
644 pmx
->pins
= devm_kzalloc(pfc
->dev
,
645 sizeof(*pmx
->pins
) * pfc
->info
->nr_pins
,
647 if (unlikely(!pmx
->pins
))
650 pmx
->configs
= devm_kzalloc(pfc
->dev
,
651 sizeof(*pmx
->configs
) * pfc
->info
->nr_pins
,
653 if (unlikely(!pmx
->configs
))
656 for (i
= 0; i
< pfc
->info
->nr_pins
; ++i
) {
657 const struct sh_pfc_pin
*info
= &pfc
->info
->pins
[i
];
658 struct sh_pfc_pin_config
*cfg
= &pmx
->configs
[i
];
659 struct pinctrl_pin_desc
*pin
= &pmx
->pins
[i
];
661 /* If the pin number is equal to -1 all pins are considered */
662 pin
->number
= info
->pin
!= (u16
)-1 ? info
->pin
: i
;
663 pin
->name
= info
->name
;
664 cfg
->type
= PINMUX_TYPE_NONE
;
670 int sh_pfc_register_pinctrl(struct sh_pfc
*pfc
)
672 struct sh_pfc_pinctrl
*pmx
;
675 pmx
= devm_kzalloc(pfc
->dev
, sizeof(*pmx
), GFP_KERNEL
);
682 ret
= sh_pfc_map_pins(pfc
, pmx
);
686 pmx
->pctl_desc
.name
= DRV_NAME
;
687 pmx
->pctl_desc
.owner
= THIS_MODULE
;
688 pmx
->pctl_desc
.pctlops
= &sh_pfc_pinctrl_ops
;
689 pmx
->pctl_desc
.pmxops
= &sh_pfc_pinmux_ops
;
690 pmx
->pctl_desc
.confops
= &sh_pfc_pinconf_ops
;
691 pmx
->pctl_desc
.pins
= pmx
->pins
;
692 pmx
->pctl_desc
.npins
= pfc
->info
->nr_pins
;
694 pmx
->pctl
= pinctrl_register(&pmx
->pctl_desc
, pfc
->dev
, pmx
);
695 if (IS_ERR(pmx
->pctl
))
696 return PTR_ERR(pmx
->pctl
);
701 int sh_pfc_unregister_pinctrl(struct sh_pfc
*pfc
)
703 struct sh_pfc_pinctrl
*pmx
= pfc
->pinctrl
;
705 pinctrl_unregister(pmx
->pctl
);