drivers/clocksource/acpi_pm.c

   1 /*
   2  * linux/drivers/clocksource/acpi_pm.c
   3  *
   4  * This file contains the ACPI PM based clocksource.
   5  *
   6  * This code was largely moved from the i386 timer_pm.c file
   7  * which was (C) Dominik Brodowski <linux@brodo.de> 2003
   8  * and contained the following comments:
   9  *
  10  * Driver to use the Power Management Timer (PMTMR) available in some
  11  * southbridges as primary timing source for the Linux kernel.
  12  *
  13  * Based on parts of linux/drivers/acpi/hardware/hwtimer.c, timer_pit.c,
  14  * timer_hpet.c, and on Arjan van de Ven's implementation for 2.4.
  15  *
  16  * This file is licensed under the GPL v2.
  17  */
  18
  19 #include <linux/acpi_pmtmr.h>
  20 #include <linux/clocksource.h>
  21 #include <linux/timex.h>
  22 #include <linux/errno.h>
  23 #include <linux/init.h>
  24 #include <linux/pci.h>
  25 #include <linux/delay.h>
  26 #include <asm/io.h>
  27
  28 /*
  29  * The I/O port the PMTMR resides at.
  30  * The location is detected during setup_arch(),
  31  * in arch/i386/kernel/acpi/boot.c
  32  */
  33 u32 pmtmr_ioport __read_mostly;
  34
  35 static inline u32 read_pmtmr(void)
  36 {
  37         /* mask the output to 24 bits */
  38         return inl(pmtmr_ioport) & ACPI_PM_MASK;
  39 }
  40
  41 u32 acpi_pm_read_verified(void)
  42 {
  43         u32 v1 = 0, v2 = 0, v3 = 0;
  44
  45         /*
  46          * It has been reported that because of various broken
  47          * chipsets (ICH4, PIIX4 and PIIX4E) where the ACPI PM clock
  48          * source is not latched, you must read it multiple
  49          * times to ensure a safe value is read:
  50          */
  51         do {
  52                 v1 = read_pmtmr();
  53                 v2 = read_pmtmr();
  54                 v3 = read_pmtmr();
  55         } while (unlikely((v1 > v2 && v1 < v3) || (v2 > v3 && v2 < v1)
  56                           || (v3 > v1 && v3 < v2)));
  57
  58         return v2;
  59 }
  60
  61 static u64 acpi_pm_read(struct clocksource *cs)
  62 {
  63         return (u64)read_pmtmr();
  64 }
  65
  66 static struct clocksource clocksource_acpi_pm = {
  67         .name           = "acpi_pm",
  68         .rating         = 200,
  69         .read           = acpi_pm_read,
  70         .mask           = (u64)ACPI_PM_MASK,
  71         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
  72 };
  73
  74
  75 #ifdef CONFIG_PCI
  76 static int acpi_pm_good;
  77 static int __init acpi_pm_good_setup(char *__str)
  78 {
  79         acpi_pm_good = 1;
  80         return 1;
  81 }
  82 __setup("acpi_pm_good", acpi_pm_good_setup);
  83
  84 static u64 acpi_pm_read_slow(struct clocksource *cs)
  85 {
  86         return (u64)acpi_pm_read_verified();
  87 }
  88
  89 static inline void acpi_pm_need_workaround(void)
  90 {
  91         clocksource_acpi_pm.read = acpi_pm_read_slow;
  92         clocksource_acpi_pm.rating = 120;
  93 }
  94
  95 /*
  96  * PIIX4 Errata:
  97  *
  98  * The power management timer may return improper results when read.
  99  * Although the timer value settles properly after incrementing,
 100  * while incrementing there is a 3 ns window every 69.8 ns where the
 101  * timer value is indeterminate (a 4.2% chance that the data will be
 102  * incorrect when read). As a result, the ACPI free running count up
 103  * timer specification is violated due to erroneous reads.
 104  */
 105 static void acpi_pm_check_blacklist(struct pci_dev *dev)
 106 {
 107         if (acpi_pm_good)
 108                 return;
 109
 110         /* the bug has been fixed in PIIX4M */
 111         if (dev->revision < 3) {
 112                 pr_warn("* Found PM-Timer Bug on the chipset. Due to workarounds for a bug,\n"
 113                         "* this clock source is slow. Consider trying other clock sources\n");
 114
 115                 acpi_pm_need_workaround();
 116         }
 117 }
 118 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3,
 119                         acpi_pm_check_blacklist);
 120
 121 static void acpi_pm_check_graylist(struct pci_dev *dev)
 122 {
 123         if (acpi_pm_good)
 124                 return;
 125
 126         pr_warn("* The chipset may have PM-Timer Bug. Due to workarounds for a bug,\n"
 127                 "* this clock source is slow. If you are sure your timer does not have\n"
 128                 "* this bug, please use \"acpi_pm_good\" to disable the workaround\n");
 129
 130         acpi_pm_need_workaround();
 131 }
 132 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0,
 133                         acpi_pm_check_graylist);
 134 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_LE,
 135                         acpi_pm_check_graylist);
 136 #endif
 137
 138 #ifndef CONFIG_X86_64
 139 #include <asm/mach_timer.h>
 140 #define PMTMR_EXPECTED_RATE \
 141   ((CALIBRATE_LATCH * (PMTMR_TICKS_PER_SEC >> 10)) / (PIT_TICK_RATE>>10))
 142 /*
 143  * Some boards have the PMTMR running way too fast. We check
 144  * the PMTMR rate against PIT channel 2 to catch these cases.
 145  */
 146 static int verify_pmtmr_rate(void)
 147 {
 148         u64 value1, value2;
 149         unsigned long count, delta;
 150
 151         mach_prepare_counter();
 152         value1 = clocksource_acpi_pm.read(&clocksource_acpi_pm);
 153         mach_countup(&count);
 154         value2 = clocksource_acpi_pm.read(&clocksource_acpi_pm);
 155         delta = (value2 - value1) & ACPI_PM_MASK;
 156
 157         /* Check that the PMTMR delta is within 5% of what we expect */
 158         if (delta < (PMTMR_EXPECTED_RATE * 19) / 20 ||
 159             delta > (PMTMR_EXPECTED_RATE * 21) / 20) {
 160                 pr_info("PM-Timer running at invalid rate: %lu%% of normal - aborting.\n",
 161                         100UL * delta / PMTMR_EXPECTED_RATE);
 162                 return -1;
 163         }
 164
 165         return 0;
 166 }
 167 #else
 168 #define verify_pmtmr_rate() (0)
 169 #endif
 170
 171 /* Number of monotonicity checks to perform during initialization */
 172 #define ACPI_PM_MONOTONICITY_CHECKS 10
 173 /* Number of reads we try to get two different values */
 174 #define ACPI_PM_READ_CHECKS 10000
 175
 176 static int __init init_acpi_pm_clocksource(void)
 177 {
 178         u64 value1, value2;
 179         unsigned int i, j = 0;
 180
 181         if (!pmtmr_ioport)
 182                 return -ENODEV;
 183
 184         /* "verify" this timing source: */
 185         for (j = 0; j < ACPI_PM_MONOTONICITY_CHECKS; j++) {
 186                 udelay(100 * j);
 187                 value1 = clocksource_acpi_pm.read(&clocksource_acpi_pm);
 188                 for (i = 0; i < ACPI_PM_READ_CHECKS; i++) {
 189                         value2 = clocksource_acpi_pm.read(&clocksource_acpi_pm);
 190                         if (value2 == value1)
 191                                 continue;
 192                         if (value2 > value1)
 193                                 break;
 194                         if ((value2 < value1) && ((value2) < 0xFFF))
 195                                 break;
 196                         pr_info("PM-Timer had inconsistent results: %#llx, %#llx - aborting.\n",
 197                                 value1, value2);
 198                         pmtmr_ioport = 0;
 199                         return -EINVAL;
 200                 }
 201                 if (i == ACPI_PM_READ_CHECKS) {
 202                         pr_info("PM-Timer failed consistency check  (%#llx) - aborting.\n",
 203                                 value1);
 204                         pmtmr_ioport = 0;
 205                         return -ENODEV;
 206                 }
 207         }
 208
 209         if (verify_pmtmr_rate() != 0){
 210                 pmtmr_ioport = 0;
 211                 return -ENODEV;
 212         }
 213
 214         return clocksource_register_hz(&clocksource_acpi_pm,
 215                                                 PMTMR_TICKS_PER_SEC);
 216 }
 217
 218 /* We use fs_initcall because we want the PCI fixups to have run
 219  * but we still need to load before device_initcall
 220  */
 221 fs_initcall(init_acpi_pm_clocksource);
 222
 223 /*
 224  * Allow an override of the IOPort. Stupid BIOSes do not tell us about
 225  * the PMTimer, but we might know where it is.
 226  */
 227 static int __init parse_pmtmr(char *arg)
 228 {
 229         unsigned int base;
 230         int ret;
 231
 232         ret = kstrtouint(arg, 16, &base);
 233         if (ret)
 234                 return ret;
 235
 236         pr_info("PMTMR IOPort override: 0x%04x -> 0x%04x\n", pmtmr_ioport,
 237                 base);
 238         pmtmr_ioport = base;
 239
 240         return 1;
 241 }
 242 __setup("pmtmr=", parse_pmtmr);