2 * Toumaz Xenif TZ1090 PDC GPIO handling.
4 * Copyright (C) 2012-2013 Imagination Technologies Ltd.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/bitops.h>
12 #include <linux/gpio.h>
14 #include <linux/module.h>
15 #include <linux/of_irq.h>
16 #include <linux/pinctrl/consumer.h>
17 #include <linux/platform_device.h>
18 #include <linux/slab.h>
19 #include <linux/syscore_ops.h>
20 #include <asm/global_lock.h>
22 /* Register offsets from SOC_GPIO_CONTROL0 */
23 #define REG_SOC_GPIO_CONTROL0 0x00
24 #define REG_SOC_GPIO_CONTROL1 0x04
25 #define REG_SOC_GPIO_CONTROL2 0x08
26 #define REG_SOC_GPIO_CONTROL3 0x0c
27 #define REG_SOC_GPIO_STATUS 0x80
29 /* PDC GPIOs go after normal GPIOs */
30 #define GPIO_PDC_BASE 90
31 #define GPIO_PDC_NGPIO 7
33 /* Out of PDC gpios, only syswakes have irqs */
34 #define GPIO_PDC_IRQ_FIRST 2
35 #define GPIO_PDC_NIRQ 3
38 * struct tz1090_pdc_gpio - GPIO bank private data
39 * @chip: Generic GPIO chip for GPIO bank
40 * @reg: Base of registers, offset for this GPIO bank
41 * @irq: IRQ numbers for Syswake GPIOs
43 * This is the main private data for the PDC GPIO driver. It encapsulates a
44 * gpio_chip, and the callbacks for the gpio_chip can access the private data
45 * with the to_pdc() macro below.
47 struct tz1090_pdc_gpio
{
48 struct gpio_chip chip
;
50 int irq
[GPIO_PDC_NIRQ
];
53 /* Register accesses into the PDC MMIO area */
55 static inline void pdc_write(struct tz1090_pdc_gpio
*priv
, unsigned int reg_offs
,
58 writel(data
, priv
->reg
+ reg_offs
);
61 static inline unsigned int pdc_read(struct tz1090_pdc_gpio
*priv
,
62 unsigned int reg_offs
)
64 return readl(priv
->reg
+ reg_offs
);
67 /* Generic GPIO interface */
69 static int tz1090_pdc_gpio_direction_input(struct gpio_chip
*chip
,
72 struct tz1090_pdc_gpio
*priv
= gpiochip_get_data(chip
);
76 __global_lock2(lstat
);
77 value
= pdc_read(priv
, REG_SOC_GPIO_CONTROL1
);
79 pdc_write(priv
, REG_SOC_GPIO_CONTROL1
, value
);
80 __global_unlock2(lstat
);
85 static int tz1090_pdc_gpio_direction_output(struct gpio_chip
*chip
,
89 struct tz1090_pdc_gpio
*priv
= gpiochip_get_data(chip
);
93 __global_lock2(lstat
);
94 /* EXT_POWER doesn't seem to have an output value bit */
96 value
= pdc_read(priv
, REG_SOC_GPIO_CONTROL0
);
100 value
&= ~BIT(offset
);
101 pdc_write(priv
, REG_SOC_GPIO_CONTROL0
, value
);
104 value
= pdc_read(priv
, REG_SOC_GPIO_CONTROL1
);
105 value
&= ~BIT(offset
);
106 pdc_write(priv
, REG_SOC_GPIO_CONTROL1
, value
);
107 __global_unlock2(lstat
);
112 static int tz1090_pdc_gpio_get(struct gpio_chip
*chip
, unsigned int offset
)
114 struct tz1090_pdc_gpio
*priv
= gpiochip_get_data(chip
);
115 return !!(pdc_read(priv
, REG_SOC_GPIO_STATUS
) & BIT(offset
));
118 static void tz1090_pdc_gpio_set(struct gpio_chip
*chip
, unsigned int offset
,
121 struct tz1090_pdc_gpio
*priv
= gpiochip_get_data(chip
);
125 /* EXT_POWER doesn't seem to have an output value bit */
129 __global_lock2(lstat
);
130 value
= pdc_read(priv
, REG_SOC_GPIO_CONTROL0
);
132 value
|= BIT(offset
);
134 value
&= ~BIT(offset
);
135 pdc_write(priv
, REG_SOC_GPIO_CONTROL0
, value
);
136 __global_unlock2(lstat
);
139 static int tz1090_pdc_gpio_to_irq(struct gpio_chip
*chip
, unsigned int offset
)
141 struct tz1090_pdc_gpio
*priv
= gpiochip_get_data(chip
);
142 unsigned int syswake
= offset
- GPIO_PDC_IRQ_FIRST
;
145 /* only syswakes have irqs */
146 if (syswake
>= GPIO_PDC_NIRQ
)
149 irq
= priv
->irq
[syswake
];
156 static int tz1090_pdc_gpio_probe(struct platform_device
*pdev
)
158 struct device_node
*np
= pdev
->dev
.of_node
;
159 struct resource
*res_regs
;
160 struct tz1090_pdc_gpio
*priv
;
164 dev_err(&pdev
->dev
, "must be instantiated via devicetree\n");
168 res_regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
170 dev_err(&pdev
->dev
, "cannot find registers resource\n");
174 priv
= devm_kzalloc(&pdev
->dev
, sizeof(*priv
), GFP_KERNEL
);
176 dev_err(&pdev
->dev
, "unable to allocate driver data\n");
180 /* Ioremap the registers */
181 priv
->reg
= devm_ioremap(&pdev
->dev
, res_regs
->start
,
182 resource_size(res_regs
));
184 dev_err(&pdev
->dev
, "unable to ioremap registers\n");
188 /* Set up GPIO chip */
189 priv
->chip
.label
= "tz1090-pdc-gpio";
190 priv
->chip
.parent
= &pdev
->dev
;
191 priv
->chip
.direction_input
= tz1090_pdc_gpio_direction_input
;
192 priv
->chip
.direction_output
= tz1090_pdc_gpio_direction_output
;
193 priv
->chip
.get
= tz1090_pdc_gpio_get
;
194 priv
->chip
.set
= tz1090_pdc_gpio_set
;
195 priv
->chip
.free
= gpiochip_generic_free
;
196 priv
->chip
.request
= gpiochip_generic_request
;
197 priv
->chip
.to_irq
= tz1090_pdc_gpio_to_irq
;
198 priv
->chip
.of_node
= np
;
201 priv
->chip
.base
= GPIO_PDC_BASE
;
202 priv
->chip
.ngpio
= GPIO_PDC_NGPIO
;
204 /* Map the syswake irqs */
205 for (i
= 0; i
< GPIO_PDC_NIRQ
; ++i
)
206 priv
->irq
[i
] = irq_of_parse_and_map(np
, i
);
208 /* Add the GPIO bank */
209 gpiochip_add_data(&priv
->chip
, priv
);
214 static struct of_device_id tz1090_pdc_gpio_of_match
[] = {
215 { .compatible
= "img,tz1090-pdc-gpio" },
219 static struct platform_driver tz1090_pdc_gpio_driver
= {
221 .name
= "tz1090-pdc-gpio",
222 .of_match_table
= tz1090_pdc_gpio_of_match
,
224 .probe
= tz1090_pdc_gpio_probe
,
227 static int __init
tz1090_pdc_gpio_init(void)
229 return platform_driver_register(&tz1090_pdc_gpio_driver
);
231 subsys_initcall(tz1090_pdc_gpio_init
);