1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2009 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/pci.h>
12 #include <linux/tcp.h>
15 #include <linux/ipv6.h>
16 #include <linux/slab.h>
18 #include <linux/if_ether.h>
19 #include <linux/highmem.h>
20 #include "net_driver.h"
23 #include "workarounds.h"
26 * TX descriptor ring full threshold
28 * The tx_queue descriptor ring fill-level must fall below this value
29 * before we restart the netif queue
31 #define EFX_TXQ_THRESHOLD (EFX_TXQ_MASK / 2u)
33 /* We need to be able to nest calls to netif_tx_stop_queue(), partly
34 * because of the 2 hardware queues associated with each core queue,
35 * but also so that we can inhibit TX for reasons other than a full
37 void efx_stop_queue(struct efx_channel
*channel
)
39 struct efx_nic
*efx
= channel
->efx
;
41 if (!channel
->tx_queue
)
44 spin_lock_bh(&channel
->tx_stop_lock
);
45 netif_vdbg(efx
, tx_queued
, efx
->net_dev
, "stop TX queue\n");
47 atomic_inc(&channel
->tx_stop_count
);
51 channel
->tx_queue
->queue
/ EFX_TXQ_TYPES
));
53 spin_unlock_bh(&channel
->tx_stop_lock
);
56 /* Decrement core TX queue stop count and wake it if the count is 0 */
57 void efx_wake_queue(struct efx_channel
*channel
)
59 struct efx_nic
*efx
= channel
->efx
;
61 if (!channel
->tx_queue
)
65 if (atomic_dec_and_lock(&channel
->tx_stop_count
,
66 &channel
->tx_stop_lock
)) {
67 netif_vdbg(efx
, tx_queued
, efx
->net_dev
, "waking TX queue\n");
71 channel
->tx_queue
->queue
/ EFX_TXQ_TYPES
));
72 spin_unlock(&channel
->tx_stop_lock
);
77 static void efx_dequeue_buffer(struct efx_tx_queue
*tx_queue
,
78 struct efx_tx_buffer
*buffer
)
80 if (buffer
->unmap_len
) {
81 struct pci_dev
*pci_dev
= tx_queue
->efx
->pci_dev
;
82 dma_addr_t unmap_addr
= (buffer
->dma_addr
+ buffer
->len
-
84 if (buffer
->unmap_single
)
85 pci_unmap_single(pci_dev
, unmap_addr
, buffer
->unmap_len
,
88 pci_unmap_page(pci_dev
, unmap_addr
, buffer
->unmap_len
,
90 buffer
->unmap_len
= 0;
91 buffer
->unmap_single
= false;
95 dev_kfree_skb_any((struct sk_buff
*) buffer
->skb
);
97 netif_vdbg(tx_queue
->efx
, tx_done
, tx_queue
->efx
->net_dev
,
98 "TX queue %d transmission id %x complete\n",
99 tx_queue
->queue
, tx_queue
->read_count
);
104 * struct efx_tso_header - a DMA mapped buffer for packet headers
105 * @next: Linked list of free ones.
106 * The list is protected by the TX queue lock.
107 * @dma_unmap_len: Length to unmap for an oversize buffer, or 0.
108 * @dma_addr: The DMA address of the header below.
110 * This controls the memory used for a TSO header. Use TSOH_DATA()
111 * to find the packet header data. Use TSOH_SIZE() to calculate the
112 * total size required for a given packet header length. TSO headers
113 * in the free list are exactly %TSOH_STD_SIZE bytes in size.
115 struct efx_tso_header
{
117 struct efx_tso_header
*next
;
123 static int efx_enqueue_skb_tso(struct efx_tx_queue
*tx_queue
,
124 struct sk_buff
*skb
);
125 static void efx_fini_tso(struct efx_tx_queue
*tx_queue
);
126 static void efx_tsoh_heap_free(struct efx_tx_queue
*tx_queue
,
127 struct efx_tso_header
*tsoh
);
129 static void efx_tsoh_free(struct efx_tx_queue
*tx_queue
,
130 struct efx_tx_buffer
*buffer
)
133 if (likely(!buffer
->tsoh
->unmap_len
)) {
134 buffer
->tsoh
->next
= tx_queue
->tso_headers_free
;
135 tx_queue
->tso_headers_free
= buffer
->tsoh
;
137 efx_tsoh_heap_free(tx_queue
, buffer
->tsoh
);
144 static inline unsigned
145 efx_max_tx_len(struct efx_nic
*efx
, dma_addr_t dma_addr
)
147 /* Depending on the NIC revision, we can use descriptor
148 * lengths up to 8K or 8K-1. However, since PCI Express
149 * devices must split read requests at 4K boundaries, there is
150 * little benefit from using descriptors that cross those
151 * boundaries and we keep things simple by not doing so.
153 unsigned len
= (~dma_addr
& 0xfff) + 1;
155 /* Work around hardware bug for unaligned buffers. */
156 if (EFX_WORKAROUND_5391(efx
) && (dma_addr
& 0xf))
157 len
= min_t(unsigned, len
, 512 - (dma_addr
& 0xf));
163 * Add a socket buffer to a TX queue
165 * This maps all fragments of a socket buffer for DMA and adds them to
166 * the TX queue. The queue's insert pointer will be incremented by
167 * the number of fragments in the socket buffer.
169 * If any DMA mapping fails, any mapped fragments will be unmapped,
170 * the queue's insert pointer will be restored to its original value.
172 * This function is split out from efx_hard_start_xmit to allow the
173 * loopback test to direct packets via specific TX queues.
175 * Returns NETDEV_TX_OK or NETDEV_TX_BUSY
176 * You must hold netif_tx_lock() to call this function.
178 netdev_tx_t
efx_enqueue_skb(struct efx_tx_queue
*tx_queue
, struct sk_buff
*skb
)
180 struct efx_nic
*efx
= tx_queue
->efx
;
181 struct pci_dev
*pci_dev
= efx
->pci_dev
;
182 struct efx_tx_buffer
*buffer
;
183 skb_frag_t
*fragment
;
186 unsigned int len
, unmap_len
= 0, fill_level
, insert_ptr
;
187 dma_addr_t dma_addr
, unmap_addr
= 0;
188 unsigned int dma_len
;
191 netdev_tx_t rc
= NETDEV_TX_OK
;
193 EFX_BUG_ON_PARANOID(tx_queue
->write_count
!= tx_queue
->insert_count
);
195 if (skb_shinfo(skb
)->gso_size
)
196 return efx_enqueue_skb_tso(tx_queue
, skb
);
198 /* Get size of the initial fragment */
199 len
= skb_headlen(skb
);
201 /* Pad if necessary */
202 if (EFX_WORKAROUND_15592(efx
) && skb
->len
<= 32) {
203 EFX_BUG_ON_PARANOID(skb
->data_len
);
205 if (skb_pad(skb
, len
- skb
->len
))
209 fill_level
= tx_queue
->insert_count
- tx_queue
->old_read_count
;
210 q_space
= EFX_TXQ_MASK
- 1 - fill_level
;
212 /* Map for DMA. Use pci_map_single rather than pci_map_page
213 * since this is more efficient on machines with sparse
217 dma_addr
= pci_map_single(pci_dev
, skb
->data
, len
, PCI_DMA_TODEVICE
);
219 /* Process all fragments */
221 if (unlikely(pci_dma_mapping_error(pci_dev
, dma_addr
)))
224 /* Store fields for marking in the per-fragment final
227 unmap_addr
= dma_addr
;
229 /* Add to TX queue, splitting across DMA boundaries */
231 if (unlikely(q_space
-- <= 0)) {
232 /* It might be that completions have
233 * happened since the xmit path last
234 * checked. Update the xmit path's
235 * copy of read_count.
238 /* This memory barrier protects the
239 * change of stopped from the access
242 tx_queue
->old_read_count
=
243 *(volatile unsigned *)
244 &tx_queue
->read_count
;
245 fill_level
= (tx_queue
->insert_count
246 - tx_queue
->old_read_count
);
247 q_space
= EFX_TXQ_MASK
- 1 - fill_level
;
248 if (unlikely(q_space
-- <= 0))
254 insert_ptr
= tx_queue
->insert_count
& EFX_TXQ_MASK
;
255 buffer
= &tx_queue
->buffer
[insert_ptr
];
256 efx_tsoh_free(tx_queue
, buffer
);
257 EFX_BUG_ON_PARANOID(buffer
->tsoh
);
258 EFX_BUG_ON_PARANOID(buffer
->skb
);
259 EFX_BUG_ON_PARANOID(buffer
->len
);
260 EFX_BUG_ON_PARANOID(!buffer
->continuation
);
261 EFX_BUG_ON_PARANOID(buffer
->unmap_len
);
263 dma_len
= efx_max_tx_len(efx
, dma_addr
);
264 if (likely(dma_len
>= len
))
267 /* Fill out per descriptor fields */
268 buffer
->len
= dma_len
;
269 buffer
->dma_addr
= dma_addr
;
272 ++tx_queue
->insert_count
;
275 /* Transfer ownership of the unmapping to the final buffer */
276 buffer
->unmap_single
= unmap_single
;
277 buffer
->unmap_len
= unmap_len
;
280 /* Get address and size of next fragment */
281 if (i
>= skb_shinfo(skb
)->nr_frags
)
283 fragment
= &skb_shinfo(skb
)->frags
[i
];
284 len
= fragment
->size
;
285 page
= fragment
->page
;
286 page_offset
= fragment
->page_offset
;
289 unmap_single
= false;
290 dma_addr
= pci_map_page(pci_dev
, page
, page_offset
, len
,
294 /* Transfer ownership of the skb to the final buffer */
296 buffer
->continuation
= false;
298 /* Pass off to hardware */
299 efx_nic_push_buffers(tx_queue
);
304 netif_err(efx
, tx_err
, efx
->net_dev
,
305 " TX queue %d could not map skb with %d bytes %d "
306 "fragments for DMA\n", tx_queue
->queue
, skb
->len
,
307 skb_shinfo(skb
)->nr_frags
+ 1);
309 /* Mark the packet as transmitted, and free the SKB ourselves */
310 dev_kfree_skb_any(skb
);
316 if (tx_queue
->stopped
== 1)
317 efx_stop_queue(tx_queue
->channel
);
320 /* Work backwards until we hit the original insert pointer value */
321 while (tx_queue
->insert_count
!= tx_queue
->write_count
) {
322 --tx_queue
->insert_count
;
323 insert_ptr
= tx_queue
->insert_count
& EFX_TXQ_MASK
;
324 buffer
= &tx_queue
->buffer
[insert_ptr
];
325 efx_dequeue_buffer(tx_queue
, buffer
);
329 /* Free the fragment we were mid-way through pushing */
332 pci_unmap_single(pci_dev
, unmap_addr
, unmap_len
,
335 pci_unmap_page(pci_dev
, unmap_addr
, unmap_len
,
342 /* Remove packets from the TX queue
344 * This removes packets from the TX queue, up to and including the
347 static void efx_dequeue_buffers(struct efx_tx_queue
*tx_queue
,
350 struct efx_nic
*efx
= tx_queue
->efx
;
351 unsigned int stop_index
, read_ptr
;
353 stop_index
= (index
+ 1) & EFX_TXQ_MASK
;
354 read_ptr
= tx_queue
->read_count
& EFX_TXQ_MASK
;
356 while (read_ptr
!= stop_index
) {
357 struct efx_tx_buffer
*buffer
= &tx_queue
->buffer
[read_ptr
];
358 if (unlikely(buffer
->len
== 0)) {
359 netif_err(efx
, tx_err
, efx
->net_dev
,
360 "TX queue %d spurious TX completion id %x\n",
361 tx_queue
->queue
, read_ptr
);
362 efx_schedule_reset(efx
, RESET_TYPE_TX_SKIP
);
366 efx_dequeue_buffer(tx_queue
, buffer
);
367 buffer
->continuation
= true;
370 ++tx_queue
->read_count
;
371 read_ptr
= tx_queue
->read_count
& EFX_TXQ_MASK
;
375 /* Initiate a packet transmission. We use one channel per CPU
376 * (sharing when we have more CPUs than channels). On Falcon, the TX
377 * completion events will be directed back to the CPU that transmitted
378 * the packet, which should be cache-efficient.
380 * Context: non-blocking.
381 * Note that returning anything other than NETDEV_TX_OK will cause the
382 * OS to free the skb.
384 netdev_tx_t
efx_hard_start_xmit(struct sk_buff
*skb
,
385 struct net_device
*net_dev
)
387 struct efx_nic
*efx
= netdev_priv(net_dev
);
388 struct efx_tx_queue
*tx_queue
;
390 if (unlikely(efx
->port_inhibited
))
391 return NETDEV_TX_BUSY
;
393 tx_queue
= &efx
->tx_queue
[EFX_TXQ_TYPES
* skb_get_queue_mapping(skb
)];
394 if (likely(skb
->ip_summed
== CHECKSUM_PARTIAL
))
395 tx_queue
+= EFX_TXQ_TYPE_OFFLOAD
;
397 return efx_enqueue_skb(tx_queue
, skb
);
400 void efx_xmit_done(struct efx_tx_queue
*tx_queue
, unsigned int index
)
403 struct efx_nic
*efx
= tx_queue
->efx
;
405 EFX_BUG_ON_PARANOID(index
> EFX_TXQ_MASK
);
407 efx_dequeue_buffers(tx_queue
, index
);
409 /* See if we need to restart the netif queue. This barrier
410 * separates the update of read_count from the test of
413 if (unlikely(tx_queue
->stopped
) && likely(efx
->port_enabled
)) {
414 fill_level
= tx_queue
->insert_count
- tx_queue
->read_count
;
415 if (fill_level
< EFX_TXQ_THRESHOLD
) {
416 EFX_BUG_ON_PARANOID(!efx_dev_registered(efx
));
418 /* Do this under netif_tx_lock(), to avoid racing
419 * with efx_xmit(). */
420 netif_tx_lock(efx
->net_dev
);
421 if (tx_queue
->stopped
) {
422 tx_queue
->stopped
= 0;
423 efx_wake_queue(tx_queue
->channel
);
425 netif_tx_unlock(efx
->net_dev
);
430 int efx_probe_tx_queue(struct efx_tx_queue
*tx_queue
)
432 struct efx_nic
*efx
= tx_queue
->efx
;
433 unsigned int txq_size
;
436 netif_dbg(efx
, probe
, efx
->net_dev
, "creating TX queue %d\n",
439 /* Allocate software ring */
440 txq_size
= EFX_TXQ_SIZE
* sizeof(*tx_queue
->buffer
);
441 tx_queue
->buffer
= kzalloc(txq_size
, GFP_KERNEL
);
442 if (!tx_queue
->buffer
)
444 for (i
= 0; i
<= EFX_TXQ_MASK
; ++i
)
445 tx_queue
->buffer
[i
].continuation
= true;
447 /* Allocate hardware ring */
448 rc
= efx_nic_probe_tx(tx_queue
);
455 kfree(tx_queue
->buffer
);
456 tx_queue
->buffer
= NULL
;
460 void efx_init_tx_queue(struct efx_tx_queue
*tx_queue
)
462 netif_dbg(tx_queue
->efx
, drv
, tx_queue
->efx
->net_dev
,
463 "initialising TX queue %d\n", tx_queue
->queue
);
465 tx_queue
->insert_count
= 0;
466 tx_queue
->write_count
= 0;
467 tx_queue
->read_count
= 0;
468 tx_queue
->old_read_count
= 0;
469 BUG_ON(tx_queue
->stopped
);
471 /* Set up TX descriptor ring */
472 efx_nic_init_tx(tx_queue
);
475 void efx_release_tx_buffers(struct efx_tx_queue
*tx_queue
)
477 struct efx_tx_buffer
*buffer
;
479 if (!tx_queue
->buffer
)
482 /* Free any buffers left in the ring */
483 while (tx_queue
->read_count
!= tx_queue
->write_count
) {
484 buffer
= &tx_queue
->buffer
[tx_queue
->read_count
& EFX_TXQ_MASK
];
485 efx_dequeue_buffer(tx_queue
, buffer
);
486 buffer
->continuation
= true;
489 ++tx_queue
->read_count
;
493 void efx_fini_tx_queue(struct efx_tx_queue
*tx_queue
)
495 netif_dbg(tx_queue
->efx
, drv
, tx_queue
->efx
->net_dev
,
496 "shutting down TX queue %d\n", tx_queue
->queue
);
498 /* Flush TX queue, remove descriptor ring */
499 efx_nic_fini_tx(tx_queue
);
501 efx_release_tx_buffers(tx_queue
);
503 /* Free up TSO header cache */
504 efx_fini_tso(tx_queue
);
506 /* Release queue's stop on port, if any */
507 if (tx_queue
->stopped
) {
508 tx_queue
->stopped
= 0;
509 efx_wake_queue(tx_queue
->channel
);
513 void efx_remove_tx_queue(struct efx_tx_queue
*tx_queue
)
515 netif_dbg(tx_queue
->efx
, drv
, tx_queue
->efx
->net_dev
,
516 "destroying TX queue %d\n", tx_queue
->queue
);
517 efx_nic_remove_tx(tx_queue
);
519 kfree(tx_queue
->buffer
);
520 tx_queue
->buffer
= NULL
;
524 /* Efx TCP segmentation acceleration.
526 * Why? Because by doing it here in the driver we can go significantly
527 * faster than the GSO.
529 * Requires TX checksum offload support.
532 /* Number of bytes inserted at the start of a TSO header buffer,
533 * similar to NET_IP_ALIGN.
535 #ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
536 #define TSOH_OFFSET 0
538 #define TSOH_OFFSET NET_IP_ALIGN
541 #define TSOH_BUFFER(tsoh) ((u8 *)(tsoh + 1) + TSOH_OFFSET)
543 /* Total size of struct efx_tso_header, buffer and padding */
544 #define TSOH_SIZE(hdr_len) \
545 (sizeof(struct efx_tso_header) + TSOH_OFFSET + hdr_len)
547 /* Size of blocks on free list. Larger blocks must be allocated from
550 #define TSOH_STD_SIZE 128
552 #define PTR_DIFF(p1, p2) ((u8 *)(p1) - (u8 *)(p2))
553 #define ETH_HDR_LEN(skb) (skb_network_header(skb) - (skb)->data)
554 #define SKB_TCP_OFF(skb) PTR_DIFF(tcp_hdr(skb), (skb)->data)
555 #define SKB_IPV4_OFF(skb) PTR_DIFF(ip_hdr(skb), (skb)->data)
556 #define SKB_IPV6_OFF(skb) PTR_DIFF(ipv6_hdr(skb), (skb)->data)
559 * struct tso_state - TSO state for an SKB
560 * @out_len: Remaining length in current segment
561 * @seqnum: Current sequence number
562 * @ipv4_id: Current IPv4 ID, host endian
563 * @packet_space: Remaining space in current packet
564 * @dma_addr: DMA address of current position
565 * @in_len: Remaining length in current SKB fragment
566 * @unmap_len: Length of SKB fragment
567 * @unmap_addr: DMA address of SKB fragment
568 * @unmap_single: DMA single vs page mapping flag
569 * @protocol: Network protocol (after any VLAN header)
570 * @header_len: Number of bytes of header
571 * @full_packet_size: Number of bytes to put in each outgoing segment
573 * The state used during segmentation. It is put into this data structure
574 * just to make it easy to pass into inline functions.
577 /* Output position */
581 unsigned packet_space
;
587 dma_addr_t unmap_addr
;
592 int full_packet_size
;
597 * Verify that our various assumptions about sk_buffs and the conditions
598 * under which TSO will be attempted hold true. Return the protocol number.
600 static __be16
efx_tso_check_protocol(struct sk_buff
*skb
)
602 __be16 protocol
= skb
->protocol
;
604 EFX_BUG_ON_PARANOID(((struct ethhdr
*)skb
->data
)->h_proto
!=
606 if (protocol
== htons(ETH_P_8021Q
)) {
607 /* Find the encapsulated protocol; reset network header
608 * and transport header based on that. */
609 struct vlan_ethhdr
*veh
= (struct vlan_ethhdr
*)skb
->data
;
610 protocol
= veh
->h_vlan_encapsulated_proto
;
611 skb_set_network_header(skb
, sizeof(*veh
));
612 if (protocol
== htons(ETH_P_IP
))
613 skb_set_transport_header(skb
, sizeof(*veh
) +
614 4 * ip_hdr(skb
)->ihl
);
615 else if (protocol
== htons(ETH_P_IPV6
))
616 skb_set_transport_header(skb
, sizeof(*veh
) +
617 sizeof(struct ipv6hdr
));
620 if (protocol
== htons(ETH_P_IP
)) {
621 EFX_BUG_ON_PARANOID(ip_hdr(skb
)->protocol
!= IPPROTO_TCP
);
623 EFX_BUG_ON_PARANOID(protocol
!= htons(ETH_P_IPV6
));
624 EFX_BUG_ON_PARANOID(ipv6_hdr(skb
)->nexthdr
!= NEXTHDR_TCP
);
626 EFX_BUG_ON_PARANOID((PTR_DIFF(tcp_hdr(skb
), skb
->data
)
627 + (tcp_hdr(skb
)->doff
<< 2u)) >
635 * Allocate a page worth of efx_tso_header structures, and string them
636 * into the tx_queue->tso_headers_free linked list. Return 0 or -ENOMEM.
638 static int efx_tsoh_block_alloc(struct efx_tx_queue
*tx_queue
)
641 struct pci_dev
*pci_dev
= tx_queue
->efx
->pci_dev
;
642 struct efx_tso_header
*tsoh
;
646 base_kva
= pci_alloc_consistent(pci_dev
, PAGE_SIZE
, &dma_addr
);
647 if (base_kva
== NULL
) {
648 netif_err(tx_queue
->efx
, tx_err
, tx_queue
->efx
->net_dev
,
649 "Unable to allocate page for TSO headers\n");
653 /* pci_alloc_consistent() allocates pages. */
654 EFX_BUG_ON_PARANOID(dma_addr
& (PAGE_SIZE
- 1u));
656 for (kva
= base_kva
; kva
< base_kva
+ PAGE_SIZE
; kva
+= TSOH_STD_SIZE
) {
657 tsoh
= (struct efx_tso_header
*)kva
;
658 tsoh
->dma_addr
= dma_addr
+ (TSOH_BUFFER(tsoh
) - base_kva
);
659 tsoh
->next
= tx_queue
->tso_headers_free
;
660 tx_queue
->tso_headers_free
= tsoh
;
667 /* Free up a TSO header, and all others in the same page. */
668 static void efx_tsoh_block_free(struct efx_tx_queue
*tx_queue
,
669 struct efx_tso_header
*tsoh
,
670 struct pci_dev
*pci_dev
)
672 struct efx_tso_header
**p
;
673 unsigned long base_kva
;
676 base_kva
= (unsigned long)tsoh
& PAGE_MASK
;
677 base_dma
= tsoh
->dma_addr
& PAGE_MASK
;
679 p
= &tx_queue
->tso_headers_free
;
681 if (((unsigned long)*p
& PAGE_MASK
) == base_kva
)
687 pci_free_consistent(pci_dev
, PAGE_SIZE
, (void *)base_kva
, base_dma
);
690 static struct efx_tso_header
*
691 efx_tsoh_heap_alloc(struct efx_tx_queue
*tx_queue
, size_t header_len
)
693 struct efx_tso_header
*tsoh
;
695 tsoh
= kmalloc(TSOH_SIZE(header_len
), GFP_ATOMIC
| GFP_DMA
);
699 tsoh
->dma_addr
= pci_map_single(tx_queue
->efx
->pci_dev
,
700 TSOH_BUFFER(tsoh
), header_len
,
702 if (unlikely(pci_dma_mapping_error(tx_queue
->efx
->pci_dev
,
708 tsoh
->unmap_len
= header_len
;
713 efx_tsoh_heap_free(struct efx_tx_queue
*tx_queue
, struct efx_tso_header
*tsoh
)
715 pci_unmap_single(tx_queue
->efx
->pci_dev
,
716 tsoh
->dma_addr
, tsoh
->unmap_len
,
722 * efx_tx_queue_insert - push descriptors onto the TX queue
723 * @tx_queue: Efx TX queue
724 * @dma_addr: DMA address of fragment
725 * @len: Length of fragment
726 * @final_buffer: The final buffer inserted into the queue
728 * Push descriptors onto the TX queue. Return 0 on success or 1 if
731 static int efx_tx_queue_insert(struct efx_tx_queue
*tx_queue
,
732 dma_addr_t dma_addr
, unsigned len
,
733 struct efx_tx_buffer
**final_buffer
)
735 struct efx_tx_buffer
*buffer
;
736 struct efx_nic
*efx
= tx_queue
->efx
;
737 unsigned dma_len
, fill_level
, insert_ptr
;
740 EFX_BUG_ON_PARANOID(len
<= 0);
742 fill_level
= tx_queue
->insert_count
- tx_queue
->old_read_count
;
743 /* -1 as there is no way to represent all descriptors used */
744 q_space
= EFX_TXQ_MASK
- 1 - fill_level
;
747 if (unlikely(q_space
-- <= 0)) {
748 /* It might be that completions have happened
749 * since the xmit path last checked. Update
750 * the xmit path's copy of read_count.
753 /* This memory barrier protects the change of
754 * stopped from the access of read_count. */
756 tx_queue
->old_read_count
=
757 *(volatile unsigned *)&tx_queue
->read_count
;
758 fill_level
= (tx_queue
->insert_count
759 - tx_queue
->old_read_count
);
760 q_space
= EFX_TXQ_MASK
- 1 - fill_level
;
761 if (unlikely(q_space
-- <= 0)) {
762 *final_buffer
= NULL
;
769 insert_ptr
= tx_queue
->insert_count
& EFX_TXQ_MASK
;
770 buffer
= &tx_queue
->buffer
[insert_ptr
];
771 ++tx_queue
->insert_count
;
773 EFX_BUG_ON_PARANOID(tx_queue
->insert_count
-
774 tx_queue
->read_count
>
777 efx_tsoh_free(tx_queue
, buffer
);
778 EFX_BUG_ON_PARANOID(buffer
->len
);
779 EFX_BUG_ON_PARANOID(buffer
->unmap_len
);
780 EFX_BUG_ON_PARANOID(buffer
->skb
);
781 EFX_BUG_ON_PARANOID(!buffer
->continuation
);
782 EFX_BUG_ON_PARANOID(buffer
->tsoh
);
784 buffer
->dma_addr
= dma_addr
;
786 dma_len
= efx_max_tx_len(efx
, dma_addr
);
788 /* If there is enough space to send then do so */
792 buffer
->len
= dma_len
; /* Don't set the other members */
797 EFX_BUG_ON_PARANOID(!len
);
799 *final_buffer
= buffer
;
805 * Put a TSO header into the TX queue.
807 * This is special-cased because we know that it is small enough to fit in
808 * a single fragment, and we know it doesn't cross a page boundary. It
809 * also allows us to not worry about end-of-packet etc.
811 static void efx_tso_put_header(struct efx_tx_queue
*tx_queue
,
812 struct efx_tso_header
*tsoh
, unsigned len
)
814 struct efx_tx_buffer
*buffer
;
816 buffer
= &tx_queue
->buffer
[tx_queue
->insert_count
& EFX_TXQ_MASK
];
817 efx_tsoh_free(tx_queue
, buffer
);
818 EFX_BUG_ON_PARANOID(buffer
->len
);
819 EFX_BUG_ON_PARANOID(buffer
->unmap_len
);
820 EFX_BUG_ON_PARANOID(buffer
->skb
);
821 EFX_BUG_ON_PARANOID(!buffer
->continuation
);
822 EFX_BUG_ON_PARANOID(buffer
->tsoh
);
824 buffer
->dma_addr
= tsoh
->dma_addr
;
827 ++tx_queue
->insert_count
;
831 /* Remove descriptors put into a tx_queue. */
832 static void efx_enqueue_unwind(struct efx_tx_queue
*tx_queue
)
834 struct efx_tx_buffer
*buffer
;
835 dma_addr_t unmap_addr
;
837 /* Work backwards until we hit the original insert pointer value */
838 while (tx_queue
->insert_count
!= tx_queue
->write_count
) {
839 --tx_queue
->insert_count
;
840 buffer
= &tx_queue
->buffer
[tx_queue
->insert_count
&
842 efx_tsoh_free(tx_queue
, buffer
);
843 EFX_BUG_ON_PARANOID(buffer
->skb
);
844 if (buffer
->unmap_len
) {
845 unmap_addr
= (buffer
->dma_addr
+ buffer
->len
-
847 if (buffer
->unmap_single
)
848 pci_unmap_single(tx_queue
->efx
->pci_dev
,
849 unmap_addr
, buffer
->unmap_len
,
852 pci_unmap_page(tx_queue
->efx
->pci_dev
,
853 unmap_addr
, buffer
->unmap_len
,
855 buffer
->unmap_len
= 0;
858 buffer
->continuation
= true;
863 /* Parse the SKB header and initialise state. */
864 static void tso_start(struct tso_state
*st
, const struct sk_buff
*skb
)
866 /* All ethernet/IP/TCP headers combined size is TCP header size
867 * plus offset of TCP header relative to start of packet.
869 st
->header_len
= ((tcp_hdr(skb
)->doff
<< 2u)
870 + PTR_DIFF(tcp_hdr(skb
), skb
->data
));
871 st
->full_packet_size
= st
->header_len
+ skb_shinfo(skb
)->gso_size
;
873 if (st
->protocol
== htons(ETH_P_IP
))
874 st
->ipv4_id
= ntohs(ip_hdr(skb
)->id
);
877 st
->seqnum
= ntohl(tcp_hdr(skb
)->seq
);
879 EFX_BUG_ON_PARANOID(tcp_hdr(skb
)->urg
);
880 EFX_BUG_ON_PARANOID(tcp_hdr(skb
)->syn
);
881 EFX_BUG_ON_PARANOID(tcp_hdr(skb
)->rst
);
883 st
->packet_space
= st
->full_packet_size
;
884 st
->out_len
= skb
->len
- st
->header_len
;
886 st
->unmap_single
= false;
889 static int tso_get_fragment(struct tso_state
*st
, struct efx_nic
*efx
,
892 st
->unmap_addr
= pci_map_page(efx
->pci_dev
, frag
->page
,
893 frag
->page_offset
, frag
->size
,
895 if (likely(!pci_dma_mapping_error(efx
->pci_dev
, st
->unmap_addr
))) {
896 st
->unmap_single
= false;
897 st
->unmap_len
= frag
->size
;
898 st
->in_len
= frag
->size
;
899 st
->dma_addr
= st
->unmap_addr
;
905 static int tso_get_head_fragment(struct tso_state
*st
, struct efx_nic
*efx
,
906 const struct sk_buff
*skb
)
908 int hl
= st
->header_len
;
909 int len
= skb_headlen(skb
) - hl
;
911 st
->unmap_addr
= pci_map_single(efx
->pci_dev
, skb
->data
+ hl
,
912 len
, PCI_DMA_TODEVICE
);
913 if (likely(!pci_dma_mapping_error(efx
->pci_dev
, st
->unmap_addr
))) {
914 st
->unmap_single
= true;
917 st
->dma_addr
= st
->unmap_addr
;
925 * tso_fill_packet_with_fragment - form descriptors for the current fragment
926 * @tx_queue: Efx TX queue
927 * @skb: Socket buffer
930 * Form descriptors for the current fragment, until we reach the end
931 * of fragment or end-of-packet. Return 0 on success, 1 if not enough
932 * space in @tx_queue.
934 static int tso_fill_packet_with_fragment(struct efx_tx_queue
*tx_queue
,
935 const struct sk_buff
*skb
,
936 struct tso_state
*st
)
938 struct efx_tx_buffer
*buffer
;
939 int n
, end_of_packet
, rc
;
943 if (st
->packet_space
== 0)
946 EFX_BUG_ON_PARANOID(st
->in_len
<= 0);
947 EFX_BUG_ON_PARANOID(st
->packet_space
<= 0);
949 n
= min(st
->in_len
, st
->packet_space
);
951 st
->packet_space
-= n
;
955 rc
= efx_tx_queue_insert(tx_queue
, st
->dma_addr
, n
, &buffer
);
956 if (likely(rc
== 0)) {
957 if (st
->out_len
== 0)
958 /* Transfer ownership of the skb */
961 end_of_packet
= st
->out_len
== 0 || st
->packet_space
== 0;
962 buffer
->continuation
= !end_of_packet
;
964 if (st
->in_len
== 0) {
965 /* Transfer ownership of the pci mapping */
966 buffer
->unmap_len
= st
->unmap_len
;
967 buffer
->unmap_single
= st
->unmap_single
;
978 * tso_start_new_packet - generate a new header and prepare for the new packet
979 * @tx_queue: Efx TX queue
980 * @skb: Socket buffer
983 * Generate a new header and prepare for the new packet. Return 0 on
984 * success, or -1 if failed to alloc header.
986 static int tso_start_new_packet(struct efx_tx_queue
*tx_queue
,
987 const struct sk_buff
*skb
,
988 struct tso_state
*st
)
990 struct efx_tso_header
*tsoh
;
991 struct tcphdr
*tsoh_th
;
995 /* Allocate a DMA-mapped header buffer. */
996 if (likely(TSOH_SIZE(st
->header_len
) <= TSOH_STD_SIZE
)) {
997 if (tx_queue
->tso_headers_free
== NULL
) {
998 if (efx_tsoh_block_alloc(tx_queue
))
1001 EFX_BUG_ON_PARANOID(!tx_queue
->tso_headers_free
);
1002 tsoh
= tx_queue
->tso_headers_free
;
1003 tx_queue
->tso_headers_free
= tsoh
->next
;
1004 tsoh
->unmap_len
= 0;
1006 tx_queue
->tso_long_headers
++;
1007 tsoh
= efx_tsoh_heap_alloc(tx_queue
, st
->header_len
);
1008 if (unlikely(!tsoh
))
1012 header
= TSOH_BUFFER(tsoh
);
1013 tsoh_th
= (struct tcphdr
*)(header
+ SKB_TCP_OFF(skb
));
1015 /* Copy and update the headers. */
1016 memcpy(header
, skb
->data
, st
->header_len
);
1018 tsoh_th
->seq
= htonl(st
->seqnum
);
1019 st
->seqnum
+= skb_shinfo(skb
)->gso_size
;
1020 if (st
->out_len
> skb_shinfo(skb
)->gso_size
) {
1021 /* This packet will not finish the TSO burst. */
1022 ip_length
= st
->full_packet_size
- ETH_HDR_LEN(skb
);
1026 /* This packet will be the last in the TSO burst. */
1027 ip_length
= st
->header_len
- ETH_HDR_LEN(skb
) + st
->out_len
;
1028 tsoh_th
->fin
= tcp_hdr(skb
)->fin
;
1029 tsoh_th
->psh
= tcp_hdr(skb
)->psh
;
1032 if (st
->protocol
== htons(ETH_P_IP
)) {
1033 struct iphdr
*tsoh_iph
=
1034 (struct iphdr
*)(header
+ SKB_IPV4_OFF(skb
));
1036 tsoh_iph
->tot_len
= htons(ip_length
);
1038 /* Linux leaves suitable gaps in the IP ID space for us to fill. */
1039 tsoh_iph
->id
= htons(st
->ipv4_id
);
1042 struct ipv6hdr
*tsoh_iph
=
1043 (struct ipv6hdr
*)(header
+ SKB_IPV6_OFF(skb
));
1045 tsoh_iph
->payload_len
= htons(ip_length
- sizeof(*tsoh_iph
));
1048 st
->packet_space
= skb_shinfo(skb
)->gso_size
;
1049 ++tx_queue
->tso_packets
;
1051 /* Form a descriptor for this header. */
1052 efx_tso_put_header(tx_queue
, tsoh
, st
->header_len
);
1059 * efx_enqueue_skb_tso - segment and transmit a TSO socket buffer
1060 * @tx_queue: Efx TX queue
1061 * @skb: Socket buffer
1063 * Context: You must hold netif_tx_lock() to call this function.
1065 * Add socket buffer @skb to @tx_queue, doing TSO or return != 0 if
1066 * @skb was not enqueued. In all cases @skb is consumed. Return
1067 * %NETDEV_TX_OK or %NETDEV_TX_BUSY.
1069 static int efx_enqueue_skb_tso(struct efx_tx_queue
*tx_queue
,
1070 struct sk_buff
*skb
)
1072 struct efx_nic
*efx
= tx_queue
->efx
;
1073 int frag_i
, rc
, rc2
= NETDEV_TX_OK
;
1074 struct tso_state state
;
1076 /* Find the packet protocol and sanity-check it */
1077 state
.protocol
= efx_tso_check_protocol(skb
);
1079 EFX_BUG_ON_PARANOID(tx_queue
->write_count
!= tx_queue
->insert_count
);
1081 tso_start(&state
, skb
);
1083 /* Assume that skb header area contains exactly the headers, and
1084 * all payload is in the frag list.
1086 if (skb_headlen(skb
) == state
.header_len
) {
1087 /* Grab the first payload fragment. */
1088 EFX_BUG_ON_PARANOID(skb_shinfo(skb
)->nr_frags
< 1);
1090 rc
= tso_get_fragment(&state
, efx
,
1091 skb_shinfo(skb
)->frags
+ frag_i
);
1095 rc
= tso_get_head_fragment(&state
, efx
, skb
);
1101 if (tso_start_new_packet(tx_queue
, skb
, &state
) < 0)
1105 rc
= tso_fill_packet_with_fragment(tx_queue
, skb
, &state
);
1109 /* Move onto the next fragment? */
1110 if (state
.in_len
== 0) {
1111 if (++frag_i
>= skb_shinfo(skb
)->nr_frags
)
1112 /* End of payload reached. */
1114 rc
= tso_get_fragment(&state
, efx
,
1115 skb_shinfo(skb
)->frags
+ frag_i
);
1120 /* Start at new packet? */
1121 if (state
.packet_space
== 0 &&
1122 tso_start_new_packet(tx_queue
, skb
, &state
) < 0)
1126 /* Pass off to hardware */
1127 efx_nic_push_buffers(tx_queue
);
1129 tx_queue
->tso_bursts
++;
1130 return NETDEV_TX_OK
;
1133 netif_err(efx
, tx_err
, efx
->net_dev
,
1134 "Out of memory for TSO headers, or PCI mapping error\n");
1135 dev_kfree_skb_any(skb
);
1139 rc2
= NETDEV_TX_BUSY
;
1141 /* Stop the queue if it wasn't stopped before. */
1142 if (tx_queue
->stopped
== 1)
1143 efx_stop_queue(tx_queue
->channel
);
1146 /* Free the DMA mapping we were in the process of writing out */
1147 if (state
.unmap_len
) {
1148 if (state
.unmap_single
)
1149 pci_unmap_single(efx
->pci_dev
, state
.unmap_addr
,
1150 state
.unmap_len
, PCI_DMA_TODEVICE
);
1152 pci_unmap_page(efx
->pci_dev
, state
.unmap_addr
,
1153 state
.unmap_len
, PCI_DMA_TODEVICE
);
1156 efx_enqueue_unwind(tx_queue
);
1162 * Free up all TSO datastructures associated with tx_queue. This
1163 * routine should be called only once the tx_queue is both empty and
1164 * will no longer be used.
1166 static void efx_fini_tso(struct efx_tx_queue
*tx_queue
)
1170 if (tx_queue
->buffer
) {
1171 for (i
= 0; i
<= EFX_TXQ_MASK
; ++i
)
1172 efx_tsoh_free(tx_queue
, &tx_queue
->buffer
[i
]);
1175 while (tx_queue
->tso_headers_free
!= NULL
)
1176 efx_tsoh_block_free(tx_queue
, tx_queue
->tso_headers_free
,
1177 tx_queue
->efx
->pci_dev
);