drivers/rtc/rtc-vr41xx.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  Driver for NEC VR4100 series Real Time Clock unit.
   4  *
   5  *  Copyright (C) 2003-2008  Yoichi Yuasa <yuasa@linux-mips.org>
   6  */
   7 #include <linux/err.h>
   8 #include <linux/fs.h>
   9 #include <linux/init.h>
  10 #include <linux/io.h>
  11 #include <linux/ioport.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/module.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/rtc.h>
  16 #include <linux/spinlock.h>
  17 #include <linux/types.h>
  18 #include <linux/uaccess.h>
  19 #include <linux/log2.h>
  20
  21 #include <asm/div64.h>
  22
  23 MODULE_AUTHOR("Yoichi Yuasa <yuasa@linux-mips.org>");
  24 MODULE_DESCRIPTION("NEC VR4100 series RTC driver");
  25 MODULE_LICENSE("GPL v2");
  26
  27 /* RTC 1 registers */
  28 #define ETIMELREG               0x00
  29 #define ETIMEMREG               0x02
  30 #define ETIMEHREG               0x04
  31 /* RFU */
  32 #define ECMPLREG                0x08
  33 #define ECMPMREG                0x0a
  34 #define ECMPHREG                0x0c
  35 /* RFU */
  36 #define RTCL1LREG               0x10
  37 #define RTCL1HREG               0x12
  38 #define RTCL1CNTLREG            0x14
  39 #define RTCL1CNTHREG            0x16
  40 #define RTCL2LREG               0x18
  41 #define RTCL2HREG               0x1a
  42 #define RTCL2CNTLREG            0x1c
  43 #define RTCL2CNTHREG            0x1e
  44
  45 /* RTC 2 registers */
  46 #define TCLKLREG                0x00
  47 #define TCLKHREG                0x02
  48 #define TCLKCNTLREG             0x04
  49 #define TCLKCNTHREG             0x06
  50 /* RFU */
  51 #define RTCINTREG               0x1e
  52  #define TCLOCK_INT             0x08
  53  #define RTCLONG2_INT           0x04
  54  #define RTCLONG1_INT           0x02
  55  #define ELAPSEDTIME_INT        0x01
  56
  57 #define RTC_FREQUENCY           32768
  58 #define MAX_PERIODIC_RATE       6553
  59
  60 static void __iomem *rtc1_base;
  61 static void __iomem *rtc2_base;
  62
  63 #define rtc1_read(offset)               readw(rtc1_base + (offset))
  64 #define rtc1_write(offset, value)       writew((value), rtc1_base + (offset))
  65
  66 #define rtc2_read(offset)               readw(rtc2_base + (offset))
  67 #define rtc2_write(offset, value)       writew((value), rtc2_base + (offset))
  68
  69 static unsigned long epoch = 1970;      /* Jan 1 1970 00:00:00 */
  70
  71 static DEFINE_SPINLOCK(rtc_lock);
  72 static char rtc_name[] = "RTC";
  73 static unsigned long periodic_count;
  74 static unsigned int alarm_enabled;
  75 static int aie_irq;
  76 static int pie_irq;
  77
  78 static inline time64_t read_elapsed_second(void)
  79 {
  80
  81         unsigned long first_low, first_mid, first_high;
  82
  83         unsigned long second_low, second_mid, second_high;
  84
  85         do {
  86                 first_low = rtc1_read(ETIMELREG);
  87                 first_mid = rtc1_read(ETIMEMREG);
  88                 first_high = rtc1_read(ETIMEHREG);
  89                 second_low = rtc1_read(ETIMELREG);
  90                 second_mid = rtc1_read(ETIMEMREG);
  91                 second_high = rtc1_read(ETIMEHREG);
  92         } while (first_low != second_low || first_mid != second_mid ||
  93                  first_high != second_high);
  94
  95         return ((u64)first_high << 17) | (first_mid << 1) | (first_low >> 15);
  96 }
  97
  98 static inline void write_elapsed_second(time64_t sec)
  99 {
 100         spin_lock_irq(&rtc_lock);
 101
 102         rtc1_write(ETIMELREG, (uint16_t)(sec << 15));
 103         rtc1_write(ETIMEMREG, (uint16_t)(sec >> 1));
 104         rtc1_write(ETIMEHREG, (uint16_t)(sec >> 17));
 105
 106         spin_unlock_irq(&rtc_lock);
 107 }
 108
 109 static int vr41xx_rtc_read_time(struct device *dev, struct rtc_time *time)
 110 {
 111         time64_t epoch_sec, elapsed_sec;
 112
 113         epoch_sec = mktime64(epoch, 1, 1, 0, 0, 0);
 114         elapsed_sec = read_elapsed_second();
 115
 116         rtc_time64_to_tm(epoch_sec + elapsed_sec, time);
 117
 118         return 0;
 119 }
 120
 121 static int vr41xx_rtc_set_time(struct device *dev, struct rtc_time *time)
 122 {
 123         time64_t epoch_sec, current_sec;
 124
 125         epoch_sec = mktime64(epoch, 1, 1, 0, 0, 0);
 126         current_sec = rtc_tm_to_time64(time);
 127
 128         write_elapsed_second(current_sec - epoch_sec);
 129
 130         return 0;
 131 }
 132
 133 static int vr41xx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
 134 {
 135         unsigned long low, mid, high;
 136         struct rtc_time *time = &wkalrm->time;
 137
 138         spin_lock_irq(&rtc_lock);
 139
 140         low = rtc1_read(ECMPLREG);
 141         mid = rtc1_read(ECMPMREG);
 142         high = rtc1_read(ECMPHREG);
 143         wkalrm->enabled = alarm_enabled;
 144
 145         spin_unlock_irq(&rtc_lock);
 146
 147         rtc_time64_to_tm((high << 17) | (mid << 1) | (low >> 15), time);
 148
 149         return 0;
 150 }
 151
 152 static int vr41xx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
 153 {
 154         time64_t alarm_sec;
 155
 156         alarm_sec = rtc_tm_to_time64(&wkalrm->time);
 157
 158         spin_lock_irq(&rtc_lock);
 159
 160         if (alarm_enabled)
 161                 disable_irq(aie_irq);
 162
 163         rtc1_write(ECMPLREG, (uint16_t)(alarm_sec << 15));
 164         rtc1_write(ECMPMREG, (uint16_t)(alarm_sec >> 1));
 165         rtc1_write(ECMPHREG, (uint16_t)(alarm_sec >> 17));
 166
 167         if (wkalrm->enabled)
 168                 enable_irq(aie_irq);
 169
 170         alarm_enabled = wkalrm->enabled;
 171
 172         spin_unlock_irq(&rtc_lock);
 173
 174         return 0;
 175 }
 176
 177 static int vr41xx_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
 178 {
 179         switch (cmd) {
 180         case RTC_EPOCH_READ:
 181                 return put_user(epoch, (unsigned long __user *)arg);
 182         case RTC_EPOCH_SET:
 183                 /* Doesn't support before 1900 */
 184                 if (arg < 1900)
 185                         return -EINVAL;
 186                 epoch = arg;
 187                 break;
 188         default:
 189                 return -ENOIOCTLCMD;
 190         }
 191
 192         return 0;
 193 }
 194
 195 static int vr41xx_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 196 {
 197         spin_lock_irq(&rtc_lock);
 198         if (enabled) {
 199                 if (!alarm_enabled) {
 200                         enable_irq(aie_irq);
 201                         alarm_enabled = 1;
 202                 }
 203         } else {
 204                 if (alarm_enabled) {
 205                         disable_irq(aie_irq);
 206                         alarm_enabled = 0;
 207                 }
 208         }
 209         spin_unlock_irq(&rtc_lock);
 210         return 0;
 211 }
 212
 213 static irqreturn_t elapsedtime_interrupt(int irq, void *dev_id)
 214 {
 215         struct platform_device *pdev = (struct platform_device *)dev_id;
 216         struct rtc_device *rtc = platform_get_drvdata(pdev);
 217
 218         rtc2_write(RTCINTREG, ELAPSEDTIME_INT);
 219
 220         rtc_update_irq(rtc, 1, RTC_AF);
 221
 222         return IRQ_HANDLED;
 223 }
 224
 225 static irqreturn_t rtclong1_interrupt(int irq, void *dev_id)
 226 {
 227         struct platform_device *pdev = (struct platform_device *)dev_id;
 228         struct rtc_device *rtc = platform_get_drvdata(pdev);
 229         unsigned long count = periodic_count;
 230
 231         rtc2_write(RTCINTREG, RTCLONG1_INT);
 232
 233         rtc1_write(RTCL1LREG, count);
 234         rtc1_write(RTCL1HREG, count >> 16);
 235
 236         rtc_update_irq(rtc, 1, RTC_PF);
 237
 238         return IRQ_HANDLED;
 239 }
 240
 241 static const struct rtc_class_ops vr41xx_rtc_ops = {
 242         .ioctl                  = vr41xx_rtc_ioctl,
 243         .read_time              = vr41xx_rtc_read_time,
 244         .set_time               = vr41xx_rtc_set_time,
 245         .read_alarm             = vr41xx_rtc_read_alarm,
 246         .set_alarm              = vr41xx_rtc_set_alarm,
 247         .alarm_irq_enable       = vr41xx_rtc_alarm_irq_enable,
 248 };
 249
 250 static int rtc_probe(struct platform_device *pdev)
 251 {
 252         struct resource *res;
 253         struct rtc_device *rtc;
 254         int retval;
 255
 256         if (pdev->num_resources != 4)
 257                 return -EBUSY;
 258
 259         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 260         if (!res)
 261                 return -EBUSY;
 262
 263         rtc1_base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
 264         if (!rtc1_base)
 265                 return -EBUSY;
 266
 267         res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 268         if (!res) {
 269                 retval = -EBUSY;
 270                 goto err_rtc1_iounmap;
 271         }
 272
 273         rtc2_base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
 274         if (!rtc2_base) {
 275                 retval = -EBUSY;
 276                 goto err_rtc1_iounmap;
 277         }
 278
 279         rtc = devm_rtc_allocate_device(&pdev->dev);
 280         if (IS_ERR(rtc)) {
 281                 retval = PTR_ERR(rtc);
 282                 goto err_iounmap_all;
 283         }
 284
 285         rtc->ops = &vr41xx_rtc_ops;
 286
 287         /* 48-bit counter at 32.768 kHz */
 288         rtc->range_max = (1ULL << 33) - 1;
 289         rtc->max_user_freq = MAX_PERIODIC_RATE;
 290
 291         spin_lock_irq(&rtc_lock);
 292
 293         rtc1_write(ECMPLREG, 0);
 294         rtc1_write(ECMPMREG, 0);
 295         rtc1_write(ECMPHREG, 0);
 296         rtc1_write(RTCL1LREG, 0);
 297         rtc1_write(RTCL1HREG, 0);
 298
 299         spin_unlock_irq(&rtc_lock);
 300
 301         aie_irq = platform_get_irq(pdev, 0);
 302         if (aie_irq <= 0) {
 303                 retval = -EBUSY;
 304                 goto err_iounmap_all;
 305         }
 306
 307         retval = devm_request_irq(&pdev->dev, aie_irq, elapsedtime_interrupt, 0,
 308                                 "elapsed_time", pdev);
 309         if (retval < 0)
 310                 goto err_iounmap_all;
 311
 312         pie_irq = platform_get_irq(pdev, 1);
 313         if (pie_irq <= 0) {
 314                 retval = -EBUSY;
 315                 goto err_iounmap_all;
 316         }
 317
 318         retval = devm_request_irq(&pdev->dev, pie_irq, rtclong1_interrupt, 0,
 319                                 "rtclong1", pdev);
 320         if (retval < 0)
 321                 goto err_iounmap_all;
 322
 323         platform_set_drvdata(pdev, rtc);
 324
 325         disable_irq(aie_irq);
 326         disable_irq(pie_irq);
 327
 328         dev_info(&pdev->dev, "Real Time Clock of NEC VR4100 series\n");
 329
 330         retval = rtc_register_device(rtc);
 331         if (retval)
 332                 goto err_iounmap_all;
 333
 334         return 0;
 335
 336 err_iounmap_all:
 337         rtc2_base = NULL;
 338
 339 err_rtc1_iounmap:
 340         rtc1_base = NULL;
 341
 342         return retval;
 343 }
 344
 345 /* work with hotplug and coldplug */
 346 MODULE_ALIAS("platform:RTC");
 347
 348 static struct platform_driver rtc_platform_driver = {
 349         .probe          = rtc_probe,
 350         .driver         = {
 351                 .name   = rtc_name,
 352         },
 353 };
 354
 355 module_platform_driver(rtc_platform_driver);