1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - http://www.ti.com
6 * Jyri Sarha <jsarha@ti.com>
7 * Sergej Sawazki <ce3a@gmx.de>
9 * Gpio controlled clock implementation
12 #include <linux/clk-provider.h>
13 #include <linux/export.h>
14 #include <linux/slab.h>
15 #include <linux/gpio/consumer.h>
16 #include <linux/err.h>
17 #include <linux/device.h>
18 #include <linux/platform_device.h>
19 #include <linux/of_device.h>
22 * DOC: basic gpio gated clock which can be enabled and disabled
24 * Traits of this clock:
25 * prepare - clk_(un)prepare only ensures parent is (un)prepared
26 * enable - clk_enable and clk_disable are functional & control gpio
27 * rate - inherits rate from parent. No clk_set_rate support
28 * parent - fixed parent. No clk_set_parent support
31 static int clk_gpio_gate_enable(struct clk_hw
*hw
)
33 struct clk_gpio
*clk
= to_clk_gpio(hw
);
35 gpiod_set_value(clk
->gpiod
, 1);
40 static void clk_gpio_gate_disable(struct clk_hw
*hw
)
42 struct clk_gpio
*clk
= to_clk_gpio(hw
);
44 gpiod_set_value(clk
->gpiod
, 0);
47 static int clk_gpio_gate_is_enabled(struct clk_hw
*hw
)
49 struct clk_gpio
*clk
= to_clk_gpio(hw
);
51 return gpiod_get_value(clk
->gpiod
);
54 const struct clk_ops clk_gpio_gate_ops
= {
55 .enable
= clk_gpio_gate_enable
,
56 .disable
= clk_gpio_gate_disable
,
57 .is_enabled
= clk_gpio_gate_is_enabled
,
59 EXPORT_SYMBOL_GPL(clk_gpio_gate_ops
);
61 static int clk_sleeping_gpio_gate_prepare(struct clk_hw
*hw
)
63 struct clk_gpio
*clk
= to_clk_gpio(hw
);
65 gpiod_set_value_cansleep(clk
->gpiod
, 1);
70 static void clk_sleeping_gpio_gate_unprepare(struct clk_hw
*hw
)
72 struct clk_gpio
*clk
= to_clk_gpio(hw
);
74 gpiod_set_value_cansleep(clk
->gpiod
, 0);
77 static int clk_sleeping_gpio_gate_is_prepared(struct clk_hw
*hw
)
79 struct clk_gpio
*clk
= to_clk_gpio(hw
);
81 return gpiod_get_value_cansleep(clk
->gpiod
);
84 static const struct clk_ops clk_sleeping_gpio_gate_ops
= {
85 .prepare
= clk_sleeping_gpio_gate_prepare
,
86 .unprepare
= clk_sleeping_gpio_gate_unprepare
,
87 .is_prepared
= clk_sleeping_gpio_gate_is_prepared
,
91 * DOC: basic clock multiplexer which can be controlled with a gpio output
92 * Traits of this clock:
93 * prepare - clk_prepare only ensures that parents are prepared
94 * rate - rate is only affected by parent switching. No clk_set_rate support
95 * parent - parent is adjustable through clk_set_parent
98 static u8
clk_gpio_mux_get_parent(struct clk_hw
*hw
)
100 struct clk_gpio
*clk
= to_clk_gpio(hw
);
102 return gpiod_get_value_cansleep(clk
->gpiod
);
105 static int clk_gpio_mux_set_parent(struct clk_hw
*hw
, u8 index
)
107 struct clk_gpio
*clk
= to_clk_gpio(hw
);
109 gpiod_set_value_cansleep(clk
->gpiod
, index
);
114 const struct clk_ops clk_gpio_mux_ops
= {
115 .get_parent
= clk_gpio_mux_get_parent
,
116 .set_parent
= clk_gpio_mux_set_parent
,
117 .determine_rate
= __clk_mux_determine_rate
,
119 EXPORT_SYMBOL_GPL(clk_gpio_mux_ops
);
121 static struct clk_hw
*clk_register_gpio(struct device
*dev
, const char *name
,
122 const char * const *parent_names
, u8 num_parents
, struct gpio_desc
*gpiod
,
123 unsigned long flags
, const struct clk_ops
*clk_gpio_ops
)
125 struct clk_gpio
*clk_gpio
;
127 struct clk_init_data init
= {};
131 clk_gpio
= devm_kzalloc(dev
, sizeof(*clk_gpio
), GFP_KERNEL
);
133 clk_gpio
= kzalloc(sizeof(*clk_gpio
), GFP_KERNEL
);
136 return ERR_PTR(-ENOMEM
);
139 init
.ops
= clk_gpio_ops
;
141 init
.parent_names
= parent_names
;
142 init
.num_parents
= num_parents
;
144 clk_gpio
->gpiod
= gpiod
;
145 clk_gpio
->hw
.init
= &init
;
149 err
= devm_clk_hw_register(dev
, hw
);
151 err
= clk_hw_register(NULL
, hw
);
164 * clk_hw_register_gpio_gate - register a gpio clock gate with the clock
166 * @dev: device that is registering this clock
167 * @name: name of this clock
168 * @parent_name: name of this clock's parent
169 * @gpiod: gpio descriptor to gate this clock
170 * @flags: clock flags
172 struct clk_hw
*clk_hw_register_gpio_gate(struct device
*dev
, const char *name
,
173 const char *parent_name
, struct gpio_desc
*gpiod
,
176 const struct clk_ops
*ops
;
178 if (gpiod_cansleep(gpiod
))
179 ops
= &clk_sleeping_gpio_gate_ops
;
181 ops
= &clk_gpio_gate_ops
;
183 return clk_register_gpio(dev
, name
,
184 (parent_name
? &parent_name
: NULL
),
185 (parent_name
? 1 : 0), gpiod
, flags
, ops
);
187 EXPORT_SYMBOL_GPL(clk_hw_register_gpio_gate
);
189 struct clk
*clk_register_gpio_gate(struct device
*dev
, const char *name
,
190 const char *parent_name
, struct gpio_desc
*gpiod
,
195 hw
= clk_hw_register_gpio_gate(dev
, name
, parent_name
, gpiod
, flags
);
200 EXPORT_SYMBOL_GPL(clk_register_gpio_gate
);
203 * clk_hw_register_gpio_mux - register a gpio clock mux with the clock framework
204 * @dev: device that is registering this clock
205 * @name: name of this clock
206 * @parent_names: names of this clock's parents
207 * @num_parents: number of parents listed in @parent_names
208 * @gpiod: gpio descriptor to gate this clock
209 * @flags: clock flags
211 struct clk_hw
*clk_hw_register_gpio_mux(struct device
*dev
, const char *name
,
212 const char * const *parent_names
, u8 num_parents
, struct gpio_desc
*gpiod
,
215 if (num_parents
!= 2) {
216 pr_err("mux-clock %s must have 2 parents\n", name
);
217 return ERR_PTR(-EINVAL
);
220 return clk_register_gpio(dev
, name
, parent_names
, num_parents
,
221 gpiod
, flags
, &clk_gpio_mux_ops
);
223 EXPORT_SYMBOL_GPL(clk_hw_register_gpio_mux
);
225 struct clk
*clk_register_gpio_mux(struct device
*dev
, const char *name
,
226 const char * const *parent_names
, u8 num_parents
, struct gpio_desc
*gpiod
,
231 hw
= clk_hw_register_gpio_mux(dev
, name
, parent_names
, num_parents
,
237 EXPORT_SYMBOL_GPL(clk_register_gpio_mux
);
239 static int gpio_clk_driver_probe(struct platform_device
*pdev
)
241 struct device_node
*node
= pdev
->dev
.of_node
;
242 const char **parent_names
, *gpio_name
;
243 unsigned int num_parents
;
244 struct gpio_desc
*gpiod
;
249 num_parents
= of_clk_get_parent_count(node
);
251 parent_names
= devm_kcalloc(&pdev
->dev
, num_parents
,
252 sizeof(char *), GFP_KERNEL
);
256 of_clk_parent_fill(node
, parent_names
, num_parents
);
261 is_mux
= of_device_is_compatible(node
, "gpio-mux-clock");
263 gpio_name
= is_mux
? "select" : "enable";
264 gpiod
= devm_gpiod_get(&pdev
->dev
, gpio_name
, GPIOD_OUT_LOW
);
266 ret
= PTR_ERR(gpiod
);
267 if (ret
== -EPROBE_DEFER
)
268 pr_debug("%pOFn: %s: GPIOs not yet available, retry later\n",
271 pr_err("%pOFn: %s: Can't get '%s' named GPIO property\n",
278 clk
= clk_register_gpio_mux(&pdev
->dev
, node
->name
,
279 parent_names
, num_parents
, gpiod
, 0);
281 clk
= clk_register_gpio_gate(&pdev
->dev
, node
->name
,
282 parent_names
? parent_names
[0] : NULL
, gpiod
,
287 return of_clk_add_provider(node
, of_clk_src_simple_get
, clk
);
290 static const struct of_device_id gpio_clk_match_table
[] = {
291 { .compatible
= "gpio-mux-clock" },
292 { .compatible
= "gpio-gate-clock" },
296 static struct platform_driver gpio_clk_driver
= {
297 .probe
= gpio_clk_driver_probe
,
300 .of_match_table
= gpio_clk_match_table
,
303 builtin_platform_driver(gpio_clk_driver
);