arch/mips/generic/board-sead3.c

   1 /*
   2  * Copyright (C) 2016 Imagination Technologies
   3  * Author: Paul Burton <paul.burton@mips.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License as published by the
   7  * Free Software Foundation;  either version 2 of the  License, or (at your
   8  * option) any later version.
   9  */
  10
  11 #define pr_fmt(fmt) "sead3: " fmt
  12
  13 #include <linux/errno.h>
  14 #include <linux/libfdt.h>
  15 #include <linux/printk.h>
  16 #include <linux/sizes.h>
  17
  18 #include <asm/fw/fw.h>
  19 #include <asm/io.h>
  20 #include <asm/machine.h>
  21 #include <asm/yamon-dt.h>
  22
  23 #define SEAD_CONFIG                     CKSEG1ADDR(0x1b100110)
  24 #define SEAD_CONFIG_GIC_PRESENT         BIT(1)
  25
  26 #define MIPS_REVISION                   CKSEG1ADDR(0x1fc00010)
  27 #define MIPS_REVISION_MACHINE           (0xf << 4)
  28 #define MIPS_REVISION_MACHINE_SEAD3     (0x4 << 4)
  29
  30 /*
  31  * Maximum 384MB RAM at physical address 0, preceding any I/O.
  32  */
  33 static struct yamon_mem_region mem_regions[] __initdata = {
  34         /* start        size */
  35         { 0,            SZ_256M + SZ_128M },
  36         {}
  37 };
  38
  39 static __init bool sead3_detect(void)
  40 {
  41         uint32_t rev;
  42
  43         rev = __raw_readl((void *)MIPS_REVISION);
  44         return (rev & MIPS_REVISION_MACHINE) == MIPS_REVISION_MACHINE_SEAD3;
  45 }
  46
  47 static __init int append_memory(void *fdt)
  48 {
  49         return yamon_dt_append_memory(fdt, mem_regions);
  50 }
  51
  52 static __init int remove_gic(void *fdt)
  53 {
  54         const unsigned int cpu_ehci_int = 2;
  55         const unsigned int cpu_uart_int = 4;
  56         const unsigned int cpu_eth_int = 6;
  57         int gic_off, cpu_off, uart_off, eth_off, ehci_off, err;
  58         uint32_t cfg, cpu_phandle;
  59
  60         /* leave the GIC node intact if a GIC is present */
  61         cfg = __raw_readl((uint32_t *)SEAD_CONFIG);
  62         if (cfg & SEAD_CONFIG_GIC_PRESENT)
  63                 return 0;
  64
  65         gic_off = fdt_node_offset_by_compatible(fdt, -1, "mti,gic");
  66         if (gic_off < 0) {
  67                 pr_err("unable to find DT GIC node: %d\n", gic_off);
  68                 return gic_off;
  69         }
  70
  71         err = fdt_nop_node(fdt, gic_off);
  72         if (err) {
  73                 pr_err("unable to nop GIC node\n");
  74                 return err;
  75         }
  76
  77         cpu_off = fdt_node_offset_by_compatible(fdt, -1,
  78                         "mti,cpu-interrupt-controller");
  79         if (cpu_off < 0) {
  80                 pr_err("unable to find CPU intc node: %d\n", cpu_off);
  81                 return cpu_off;
  82         }
  83
  84         cpu_phandle = fdt_get_phandle(fdt, cpu_off);
  85         if (!cpu_phandle) {
  86                 pr_err("unable to get CPU intc phandle\n");
  87                 return -EINVAL;
  88         }
  89
  90         uart_off = fdt_node_offset_by_compatible(fdt, -1, "ns16550a");
  91         while (uart_off >= 0) {
  92                 err = fdt_setprop_u32(fdt, uart_off, "interrupt-parent",
  93                                       cpu_phandle);
  94                 if (err) {
  95                         pr_warn("unable to set UART interrupt-parent: %d\n",
  96                                 err);
  97                         return err;
  98                 }
  99
 100                 err = fdt_setprop_u32(fdt, uart_off, "interrupts",
 101                                       cpu_uart_int);
 102                 if (err) {
 103                         pr_err("unable to set UART interrupts property: %d\n",
 104                                err);
 105                         return err;
 106                 }
 107
 108                 uart_off = fdt_node_offset_by_compatible(fdt, uart_off,
 109                                                          "ns16550a");
 110         }
 111         if (uart_off != -FDT_ERR_NOTFOUND) {
 112                 pr_err("error searching for UART DT node: %d\n", uart_off);
 113                 return uart_off;
 114         }
 115
 116         eth_off = fdt_node_offset_by_compatible(fdt, -1, "smsc,lan9115");
 117         if (eth_off < 0) {
 118                 pr_err("unable to find ethernet DT node: %d\n", eth_off);
 119                 return eth_off;
 120         }
 121
 122         err = fdt_setprop_u32(fdt, eth_off, "interrupt-parent", cpu_phandle);
 123         if (err) {
 124                 pr_err("unable to set ethernet interrupt-parent: %d\n", err);
 125                 return err;
 126         }
 127
 128         err = fdt_setprop_u32(fdt, eth_off, "interrupts", cpu_eth_int);
 129         if (err) {
 130                 pr_err("unable to set ethernet interrupts property: %d\n", err);
 131                 return err;
 132         }
 133
 134         ehci_off = fdt_node_offset_by_compatible(fdt, -1, "generic-ehci");
 135         if (ehci_off < 0) {
 136                 pr_err("unable to find EHCI DT node: %d\n", ehci_off);
 137                 return ehci_off;
 138         }
 139
 140         err = fdt_setprop_u32(fdt, ehci_off, "interrupt-parent", cpu_phandle);
 141         if (err) {
 142                 pr_err("unable to set EHCI interrupt-parent: %d\n", err);
 143                 return err;
 144         }
 145
 146         err = fdt_setprop_u32(fdt, ehci_off, "interrupts", cpu_ehci_int);
 147         if (err) {
 148                 pr_err("unable to set EHCI interrupts property: %d\n", err);
 149                 return err;
 150         }
 151
 152         return 0;
 153 }
 154
 155 static const struct mips_fdt_fixup sead3_fdt_fixups[] __initconst = {
 156         { yamon_dt_append_cmdline, "append command line" },
 157         { append_memory, "append memory" },
 158         { remove_gic, "remove GIC when not present" },
 159         { yamon_dt_serial_config, "append serial configuration" },
 160         { },
 161 };
 162
 163 static __init const void *sead3_fixup_fdt(const void *fdt,
 164                                           const void *match_data)
 165 {
 166         static unsigned char fdt_buf[16 << 10] __initdata;
 167         int err;
 168
 169         if (fdt_check_header(fdt))
 170                 panic("Corrupt DT");
 171
 172         /* if this isn't SEAD3, something went wrong */
 173         BUG_ON(fdt_node_check_compatible(fdt, 0, "mti,sead-3"));
 174
 175         fw_init_cmdline();
 176
 177         err = apply_mips_fdt_fixups(fdt_buf, sizeof(fdt_buf),
 178                                     fdt, sead3_fdt_fixups);
 179         if (err)
 180                 panic("Unable to fixup FDT: %d", err);
 181
 182         return fdt_buf;
 183 }
 184
 185 static __init unsigned int sead3_measure_hpt_freq(void)
 186 {
 187         void __iomem *status_reg = (void __iomem *)0xbf000410;
 188         unsigned int freq, orig, tick = 0;
 189         unsigned long flags;
 190
 191         local_irq_save(flags);
 192
 193         orig = readl(status_reg) & 0x2;               /* get original sample */
 194         /* wait for transition */
 195         while ((readl(status_reg) & 0x2) == orig)
 196                 ;
 197         orig = orig ^ 0x2;                            /* flip the bit */
 198
 199         write_c0_count(0);
 200
 201         /* wait 1 second (the sampling clock transitions every 10ms) */
 202         while (tick < 100) {
 203                 /* wait for transition */
 204                 while ((readl(status_reg) & 0x2) == orig)
 205                         ;
 206                 orig = orig ^ 0x2;                            /* flip the bit */
 207                 tick++;
 208         }
 209
 210         freq = read_c0_count();
 211
 212         local_irq_restore(flags);
 213
 214         return freq;
 215 }
 216
 217 extern char __dtb_sead3_begin[];
 218
 219 MIPS_MACHINE(sead3) = {
 220         .fdt = __dtb_sead3_begin,
 221         .detect = sead3_detect,
 222         .fixup_fdt = sead3_fixup_fdt,
 223         .measure_hpt_freq = sead3_measure_hpt_freq,
 224 };