arch/mips/pic32/pic32mzda/early_pin.c

   1 /*
   2  * Joshua Henderson <joshua.henderson@microchip.com>
   3  * Copyright (C) 2015 Microchip Technology Inc.  All rights reserved.
   4  *
   5  *  This program is free software; you can distribute it and/or modify it
   6  *  under the terms of the GNU General Public License (Version 2) as
   7  *  published by the Free Software Foundation.
   8  *
   9  *  This program is distributed in the hope it will be useful, but WITHOUT
  10  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  *  for more details.
  13  */
  14 #include <asm/io.h>
  15
  16 #include "early_pin.h"
  17
  18 #define PPS_BASE 0x1f800000
  19
  20 /* Input PPS Registers */
  21 #define INT1R 0x1404
  22 #define INT2R 0x1408
  23 #define INT3R 0x140C
  24 #define INT4R 0x1410
  25 #define T2CKR 0x1418
  26 #define T3CKR 0x141C
  27 #define T4CKR 0x1420
  28 #define T5CKR 0x1424
  29 #define T6CKR 0x1428
  30 #define T7CKR 0x142C
  31 #define T8CKR 0x1430
  32 #define T9CKR 0x1434
  33 #define IC1R 0x1438
  34 #define IC2R 0x143C
  35 #define IC3R 0x1440
  36 #define IC4R 0x1444
  37 #define IC5R 0x1448
  38 #define IC6R 0x144C
  39 #define IC7R 0x1450
  40 #define IC8R 0x1454
  41 #define IC9R 0x1458
  42 #define OCFAR 0x1460
  43 #define U1RXR 0x1468
  44 #define U1CTSR 0x146C
  45 #define U2RXR 0x1470
  46 #define U2CTSR 0x1474
  47 #define U3RXR 0x1478
  48 #define U3CTSR 0x147C
  49 #define U4RXR 0x1480
  50 #define U4CTSR 0x1484
  51 #define U5RXR 0x1488
  52 #define U5CTSR 0x148C
  53 #define U6RXR 0x1490
  54 #define U6CTSR 0x1494
  55 #define SDI1R 0x149C
  56 #define SS1R 0x14A0
  57 #define SDI2R 0x14A8
  58 #define SS2R 0x14AC
  59 #define SDI3R 0x14B4
  60 #define SS3R 0x14B8
  61 #define SDI4R 0x14C0
  62 #define SS4R 0x14C4
  63 #define SDI5R 0x14CC
  64 #define SS5R 0x14D0
  65 #define SDI6R 0x14D8
  66 #define SS6R 0x14DC
  67 #define C1RXR 0x14E0
  68 #define C2RXR 0x14E4
  69 #define REFCLKI1R 0x14E8
  70 #define REFCLKI3R 0x14F0
  71 #define REFCLKI4R 0x14F4
  72
  73 static const struct
  74 {
  75         int function;
  76         int reg;
  77 } input_pin_reg[] = {
  78         { IN_FUNC_INT3, INT3R },
  79         { IN_FUNC_T2CK, T2CKR },
  80         { IN_FUNC_T6CK, T6CKR },
  81         { IN_FUNC_IC3, IC3R  },
  82         { IN_FUNC_IC7, IC7R },
  83         { IN_FUNC_U1RX, U1RXR },
  84         { IN_FUNC_U2CTS, U2CTSR },
  85         { IN_FUNC_U5RX, U5RXR },
  86         { IN_FUNC_U6CTS, U6CTSR },
  87         { IN_FUNC_SDI1, SDI1R },
  88         { IN_FUNC_SDI3, SDI3R },
  89         { IN_FUNC_SDI5, SDI5R },
  90         { IN_FUNC_SS6, SS6R },
  91         { IN_FUNC_REFCLKI1, REFCLKI1R },
  92         { IN_FUNC_INT4, INT4R },
  93         { IN_FUNC_T5CK, T5CKR },
  94         { IN_FUNC_T7CK, T7CKR },
  95         { IN_FUNC_IC4, IC4R },
  96         { IN_FUNC_IC8, IC8R },
  97         { IN_FUNC_U3RX, U3RXR },
  98         { IN_FUNC_U4CTS, U4CTSR },
  99         { IN_FUNC_SDI2, SDI2R },
 100         { IN_FUNC_SDI4, SDI4R },
 101         { IN_FUNC_C1RX, C1RXR },
 102         { IN_FUNC_REFCLKI4, REFCLKI4R },
 103         { IN_FUNC_INT2, INT2R },
 104         { IN_FUNC_T3CK, T3CKR },
 105         { IN_FUNC_T8CK, T8CKR },
 106         { IN_FUNC_IC2, IC2R },
 107         { IN_FUNC_IC5, IC5R },
 108         { IN_FUNC_IC9, IC9R },
 109         { IN_FUNC_U1CTS, U1CTSR },
 110         { IN_FUNC_U2RX, U2RXR },
 111         { IN_FUNC_U5CTS, U5CTSR },
 112         { IN_FUNC_SS1, SS1R },
 113         { IN_FUNC_SS3, SS3R },
 114         { IN_FUNC_SS4, SS4R },
 115         { IN_FUNC_SS5, SS5R },
 116         { IN_FUNC_C2RX, C2RXR },
 117         { IN_FUNC_INT1, INT1R },
 118         { IN_FUNC_T4CK, T4CKR },
 119         { IN_FUNC_T9CK, T9CKR },
 120         { IN_FUNC_IC1, IC1R },
 121         { IN_FUNC_IC6, IC6R },
 122         { IN_FUNC_U3CTS, U3CTSR },
 123         { IN_FUNC_U4RX, U4RXR },
 124         { IN_FUNC_U6RX, U6RXR },
 125         { IN_FUNC_SS2, SS2R },
 126         { IN_FUNC_SDI6, SDI6R },
 127         { IN_FUNC_OCFA, OCFAR },
 128         { IN_FUNC_REFCLKI3, REFCLKI3R },
 129 };
 130
 131 void pic32_pps_input(int function, int pin)
 132 {
 133         void __iomem *pps_base = ioremap_nocache(PPS_BASE, 0xF4);
 134         int i;
 135
 136         for (i = 0; i < ARRAY_SIZE(input_pin_reg); i++) {
 137                 if (input_pin_reg[i].function == function) {
 138                         __raw_writel(pin, pps_base + input_pin_reg[i].reg);
 139                         return;
 140                 }
 141         }
 142
 143         iounmap(pps_base);
 144 }
 145
 146 /* Output PPS Registers */
 147 #define RPA14R 0x1538
 148 #define RPA15R 0x153C
 149 #define RPB0R 0x1540
 150 #define RPB1R 0x1544
 151 #define RPB2R 0x1548
 152 #define RPB3R 0x154C
 153 #define RPB5R 0x1554
 154 #define RPB6R 0x1558
 155 #define RPB7R 0x155C
 156 #define RPB8R 0x1560
 157 #define RPB9R 0x1564
 158 #define RPB10R 0x1568
 159 #define RPB14R 0x1578
 160 #define RPB15R 0x157C
 161 #define RPC1R 0x1584
 162 #define RPC2R 0x1588
 163 #define RPC3R 0x158C
 164 #define RPC4R 0x1590
 165 #define RPC13R 0x15B4
 166 #define RPC14R 0x15B8
 167 #define RPD0R 0x15C0
 168 #define RPD1R 0x15C4
 169 #define RPD2R 0x15C8
 170 #define RPD3R 0x15CC
 171 #define RPD4R 0x15D0
 172 #define RPD5R 0x15D4
 173 #define RPD6R 0x15D8
 174 #define RPD7R 0x15DC
 175 #define RPD9R 0x15E4
 176 #define RPD10R 0x15E8
 177 #define RPD11R 0x15EC
 178 #define RPD12R 0x15F0
 179 #define RPD14R 0x15F8
 180 #define RPD15R 0x15FC
 181 #define RPE3R 0x160C
 182 #define RPE5R 0x1614
 183 #define RPE8R 0x1620
 184 #define RPE9R 0x1624
 185 #define RPF0R 0x1640
 186 #define RPF1R 0x1644
 187 #define RPF2R 0x1648
 188 #define RPF3R 0x164C
 189 #define RPF4R 0x1650
 190 #define RPF5R 0x1654
 191 #define RPF8R 0x1660
 192 #define RPF12R 0x1670
 193 #define RPF13R 0x1674
 194 #define RPG0R 0x1680
 195 #define RPG1R 0x1684
 196 #define RPG6R 0x1698
 197 #define RPG7R 0x169C
 198 #define RPG8R 0x16A0
 199 #define RPG9R 0x16A4
 200
 201 static const struct
 202 {
 203         int pin;
 204         int reg;
 205 } output_pin_reg[] = {
 206         { OUT_RPD2, RPD2R },
 207         { OUT_RPG8, RPG8R },
 208         { OUT_RPF4, RPF4R },
 209         { OUT_RPD10, RPD10R },
 210         { OUT_RPF1, RPF1R },
 211         { OUT_RPB9, RPB9R },
 212         { OUT_RPB10, RPB10R },
 213         { OUT_RPC14, RPC14R },
 214         { OUT_RPB5, RPB5R },
 215         { OUT_RPC1, RPC1R },
 216         { OUT_RPD14, RPD14R },
 217         { OUT_RPG1, RPG1R },
 218         { OUT_RPA14, RPA14R },
 219         { OUT_RPD6, RPD6R },
 220         { OUT_RPD3, RPD3R },
 221         { OUT_RPG7, RPG7R },
 222         { OUT_RPF5, RPF5R },
 223         { OUT_RPD11, RPD11R },
 224         { OUT_RPF0, RPF0R },
 225         { OUT_RPB1, RPB1R },
 226         { OUT_RPE5, RPE5R },
 227         { OUT_RPC13, RPC13R },
 228         { OUT_RPB3, RPB3R },
 229         { OUT_RPC4, RPC4R },
 230         { OUT_RPD15, RPD15R },
 231         { OUT_RPG0, RPG0R },
 232         { OUT_RPA15, RPA15R },
 233         { OUT_RPD7, RPD7R },
 234         { OUT_RPD9, RPD9R },
 235         { OUT_RPG6, RPG6R },
 236         { OUT_RPB8, RPB8R },
 237         { OUT_RPB15, RPB15R },
 238         { OUT_RPD4, RPD4R },
 239         { OUT_RPB0, RPB0R },
 240         { OUT_RPE3, RPE3R },
 241         { OUT_RPB7, RPB7R },
 242         { OUT_RPF12, RPF12R },
 243         { OUT_RPD12, RPD12R },
 244         { OUT_RPF8, RPF8R },
 245         { OUT_RPC3, RPC3R },
 246         { OUT_RPE9, RPE9R },
 247         { OUT_RPD1, RPD1R },
 248         { OUT_RPG9, RPG9R },
 249         { OUT_RPB14, RPB14R },
 250         { OUT_RPD0, RPD0R },
 251         { OUT_RPB6, RPB6R },
 252         { OUT_RPD5, RPD5R },
 253         { OUT_RPB2, RPB2R },
 254         { OUT_RPF3, RPF3R },
 255         { OUT_RPF13, RPF13R },
 256         { OUT_RPC2, RPC2R },
 257         { OUT_RPE8, RPE8R },
 258         { OUT_RPF2, RPF2R },
 259 };
 260
 261 void pic32_pps_output(int function, int pin)
 262 {
 263         void __iomem *pps_base = ioremap_nocache(PPS_BASE, 0x170);
 264         int i;
 265
 266         for (i = 0; i < ARRAY_SIZE(output_pin_reg); i++) {
 267                 if (output_pin_reg[i].pin == pin) {
 268                         __raw_writel(function,
 269                                 pps_base + output_pin_reg[i].reg);
 270                         return;
 271                 }
 272         }
 273
 274         iounmap(pps_base);
 275 }