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lkdtm: Add Control Flow Integrity test
[linux/fpc-iii.git] / drivers / scsi / smartpqi / smartpqi_init.c
blob8fd5ffc557924c89210f11ab1def2917c00dce58
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * driver for Microsemi PQI-based storage controllers
4 * Copyright (c) 2019 Microchip Technology Inc. and its subsidiaries
5 * Copyright (c) 2016-2018 Microsemi Corporation
6 * Copyright (c) 2016 PMC-Sierra, Inc.
7 *
8 * Questions/Comments/Bugfixes to storagedev@microchip.com
9 *
10 */
11
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/pci.h>
15 #include <linux/delay.h>
16 #include <linux/interrupt.h>
17 #include <linux/sched.h>
18 #include <linux/rtc.h>
19 #include <linux/bcd.h>
20 #include <linux/reboot.h>
21 #include <linux/cciss_ioctl.h>
22 #include <linux/blk-mq-pci.h>
23 #include <scsi/scsi_host.h>
24 #include <scsi/scsi_cmnd.h>
25 #include <scsi/scsi_device.h>
26 #include <scsi/scsi_eh.h>
27 #include <scsi/scsi_transport_sas.h>
28 #include <asm/unaligned.h>
29 #include "smartpqi.h"
30 #include "smartpqi_sis.h"
31
32 #if !defined(BUILD_TIMESTAMP)
33 #define BUILD_TIMESTAMP
34 #endif
35
36 #define DRIVER_VERSION "1.2.6-015"
37 #define DRIVER_MAJOR 1
38 #define DRIVER_MINOR 2
39 #define DRIVER_RELEASE 6
40 #define DRIVER_REVISION 15
41
42 #define DRIVER_NAME "Microsemi PQI Driver (v" \
43 DRIVER_VERSION BUILD_TIMESTAMP ")"
44 #define DRIVER_NAME_SHORT "smartpqi"
45
46 #define PQI_EXTRA_SGL_MEMORY (12 * sizeof(struct pqi_sg_descriptor))
47
48 MODULE_AUTHOR("Microsemi");
49 MODULE_DESCRIPTION("Driver for Microsemi Smart Family Controller version "
50 DRIVER_VERSION);
51 MODULE_SUPPORTED_DEVICE("Microsemi Smart Family Controllers");
52 MODULE_VERSION(DRIVER_VERSION);
53 MODULE_LICENSE("GPL");
54
55 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info);
56 static void pqi_ctrl_offline_worker(struct work_struct *work);
57 static void pqi_retry_raid_bypass_requests(struct pqi_ctrl_info *ctrl_info);
58 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info);
59 static void pqi_scan_start(struct Scsi_Host *shost);
60 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info,
61 struct pqi_queue_group *queue_group, enum pqi_io_path path,
62 struct pqi_io_request *io_request);
63 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info,
64 struct pqi_iu_header *request, unsigned int flags,
65 struct pqi_raid_error_info *error_info, unsigned long timeout_msecs);
66 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info,
67 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb,
68 unsigned int cdb_length, struct pqi_queue_group *queue_group,
69 struct pqi_encryption_info *encryption_info, bool raid_bypass);
70 static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info);
71 static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info);
72 static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info);
73 static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info,
74 u32 bytes_requested);
75 static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info);
76 static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info);
77 static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info,
78 struct pqi_scsi_dev *device, unsigned long timeout_secs);
79
80 /* for flags argument to pqi_submit_raid_request_synchronous() */
81 #define PQI_SYNC_FLAGS_INTERRUPTABLE 0x1
82
83 static struct scsi_transport_template *pqi_sas_transport_template;
84
85 static atomic_t pqi_controller_count = ATOMIC_INIT(0);
86
87 enum pqi_lockup_action {
88 NONE,
89 REBOOT,
90 PANIC
91 };
92
93 static enum pqi_lockup_action pqi_lockup_action = NONE;
94
95 static struct {
96 enum pqi_lockup_action action;
97 char *name;
98 } pqi_lockup_actions[] = {
99 {
100 .action = NONE,
101 .name = "none",
102 },
103 {
104 .action = REBOOT,
105 .name = "reboot",
106 },
107 {
108 .action = PANIC,
109 .name = "panic",
110 },
111 };
112
113 static unsigned int pqi_supported_event_types[] = {
114 PQI_EVENT_TYPE_HOTPLUG,
115 PQI_EVENT_TYPE_HARDWARE,
116 PQI_EVENT_TYPE_PHYSICAL_DEVICE,
117 PQI_EVENT_TYPE_LOGICAL_DEVICE,
118 PQI_EVENT_TYPE_OFA,
119 PQI_EVENT_TYPE_AIO_STATE_CHANGE,
120 PQI_EVENT_TYPE_AIO_CONFIG_CHANGE,
121 };
122
123 static int pqi_disable_device_id_wildcards;
124 module_param_named(disable_device_id_wildcards,
125 pqi_disable_device_id_wildcards, int, 0644);
126 MODULE_PARM_DESC(disable_device_id_wildcards,
127 "Disable device ID wildcards.");
128
129 static int pqi_disable_heartbeat;
130 module_param_named(disable_heartbeat,
131 pqi_disable_heartbeat, int, 0644);
132 MODULE_PARM_DESC(disable_heartbeat,
133 "Disable heartbeat.");
134
135 static int pqi_disable_ctrl_shutdown;
136 module_param_named(disable_ctrl_shutdown,
137 pqi_disable_ctrl_shutdown, int, 0644);
138 MODULE_PARM_DESC(disable_ctrl_shutdown,
139 "Disable controller shutdown when controller locked up.");
140
141 static char *pqi_lockup_action_param;
142 module_param_named(lockup_action,
143 pqi_lockup_action_param, charp, 0644);
144 MODULE_PARM_DESC(lockup_action, "Action to take when controller locked up.\n"
145 "\t\tSupported: none, reboot, panic\n"
146 "\t\tDefault: none");
147
148 static char *raid_levels[] = {
149 "RAID-0",
150 "RAID-4",
151 "RAID-1(1+0)",
152 "RAID-5",
153 "RAID-5+1",
154 "RAID-ADG",
155 "RAID-1(ADM)",
156 };
157
158 static char *pqi_raid_level_to_string(u8 raid_level)
159 {
160 if (raid_level < ARRAY_SIZE(raid_levels))
161 return raid_levels[raid_level];
162
163 return "RAID UNKNOWN";
164 }
165
166 #define SA_RAID_0 0
167 #define SA_RAID_4 1
168 #define SA_RAID_1 2 /* also used for RAID 10 */
169 #define SA_RAID_5 3 /* also used for RAID 50 */
170 #define SA_RAID_51 4
171 #define SA_RAID_6 5 /* also used for RAID 60 */
172 #define SA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
173 #define SA_RAID_MAX SA_RAID_ADM
174 #define SA_RAID_UNKNOWN 0xff
175
176 static inline void pqi_scsi_done(struct scsi_cmnd *scmd)
177 {
178 pqi_prep_for_scsi_done(scmd);
179 scmd->scsi_done(scmd);
180 }
181
182 static inline void pqi_disable_write_same(struct scsi_device *sdev)
183 {
184 sdev->no_write_same = 1;
185 }
186
187 static inline bool pqi_scsi3addr_equal(u8 *scsi3addr1, u8 *scsi3addr2)
188 {
189 return memcmp(scsi3addr1, scsi3addr2, 8) == 0;
190 }
191
192 static inline bool pqi_is_logical_device(struct pqi_scsi_dev *device)
193 {
194 return !device->is_physical_device;
195 }
196
197 static inline bool pqi_is_external_raid_addr(u8 *scsi3addr)
198 {
199 return scsi3addr[2] != 0;
200 }
201
202 static inline void pqi_check_ctrl_health(struct pqi_ctrl_info *ctrl_info)
203 {
204 if (ctrl_info->controller_online)
205 if (!sis_is_firmware_running(ctrl_info))
206 pqi_take_ctrl_offline(ctrl_info);
207 }
208
209 static inline bool pqi_is_hba_lunid(u8 *scsi3addr)
210 {
211 return pqi_scsi3addr_equal(scsi3addr, RAID_CTLR_LUNID);
212 }
213
214 static inline enum pqi_ctrl_mode pqi_get_ctrl_mode(
215 struct pqi_ctrl_info *ctrl_info)
216 {
217 return sis_read_driver_scratch(ctrl_info);
218 }
219
220 static inline void pqi_save_ctrl_mode(struct pqi_ctrl_info *ctrl_info,
221 enum pqi_ctrl_mode mode)
222 {
223 sis_write_driver_scratch(ctrl_info, mode);
224 }
225
226 static inline void pqi_ctrl_block_requests(struct pqi_ctrl_info *ctrl_info)
227 {
228 ctrl_info->block_requests = true;
229 scsi_block_requests(ctrl_info->scsi_host);
230 }
231
232 static inline void pqi_ctrl_unblock_requests(struct pqi_ctrl_info *ctrl_info)
233 {
234 ctrl_info->block_requests = false;
235 wake_up_all(&ctrl_info->block_requests_wait);
236 pqi_retry_raid_bypass_requests(ctrl_info);
237 scsi_unblock_requests(ctrl_info->scsi_host);
238 }
239
240 static unsigned long pqi_wait_if_ctrl_blocked(struct pqi_ctrl_info *ctrl_info,
241 unsigned long timeout_msecs)
242 {
243 unsigned long remaining_msecs;
244
245 if (!pqi_ctrl_blocked(ctrl_info))
246 return timeout_msecs;
247
248 atomic_inc(&ctrl_info->num_blocked_threads);
249
250 if (timeout_msecs == NO_TIMEOUT) {
251 wait_event(ctrl_info->block_requests_wait,
252 !pqi_ctrl_blocked(ctrl_info));
253 remaining_msecs = timeout_msecs;
254 } else {
255 unsigned long remaining_jiffies;
256
257 remaining_jiffies =
258 wait_event_timeout(ctrl_info->block_requests_wait,
259 !pqi_ctrl_blocked(ctrl_info),
260 msecs_to_jiffies(timeout_msecs));
261 remaining_msecs = jiffies_to_msecs(remaining_jiffies);
262 }
263
264 atomic_dec(&ctrl_info->num_blocked_threads);
265
266 return remaining_msecs;
267 }
268
269 static inline void pqi_ctrl_wait_until_quiesced(struct pqi_ctrl_info *ctrl_info)
270 {
271 while (atomic_read(&ctrl_info->num_busy_threads) >
272 atomic_read(&ctrl_info->num_blocked_threads))
273 usleep_range(1000, 2000);
274 }
275
276 static inline bool pqi_device_offline(struct pqi_scsi_dev *device)
277 {
278 return device->device_offline;
279 }
280
281 static inline void pqi_device_reset_start(struct pqi_scsi_dev *device)
282 {
283 device->in_reset = true;
284 }
285
286 static inline void pqi_device_reset_done(struct pqi_scsi_dev *device)
287 {
288 device->in_reset = false;
289 }
290
291 static inline bool pqi_device_in_reset(struct pqi_scsi_dev *device)
292 {
293 return device->in_reset;
294 }
295
296 static inline void pqi_ctrl_ofa_start(struct pqi_ctrl_info *ctrl_info)
297 {
298 ctrl_info->in_ofa = true;
299 }
300
301 static inline void pqi_ctrl_ofa_done(struct pqi_ctrl_info *ctrl_info)
302 {
303 ctrl_info->in_ofa = false;
304 }
305
306 static inline bool pqi_ctrl_in_ofa(struct pqi_ctrl_info *ctrl_info)
307 {
308 return ctrl_info->in_ofa;
309 }
310
311 static inline void pqi_device_remove_start(struct pqi_scsi_dev *device)
312 {
313 device->in_remove = true;
314 }
315
316 static inline bool pqi_device_in_remove(struct pqi_ctrl_info *ctrl_info,
317 struct pqi_scsi_dev *device)
318 {
319 return device->in_remove && !ctrl_info->in_shutdown;
320 }
321
322 static inline void pqi_schedule_rescan_worker_with_delay(
323 struct pqi_ctrl_info *ctrl_info, unsigned long delay)
324 {
325 if (pqi_ctrl_offline(ctrl_info))
326 return;
327 if (pqi_ctrl_in_ofa(ctrl_info))
328 return;
329
330 schedule_delayed_work(&ctrl_info->rescan_work, delay);
331 }
332
333 static inline void pqi_schedule_rescan_worker(struct pqi_ctrl_info *ctrl_info)
334 {
335 pqi_schedule_rescan_worker_with_delay(ctrl_info, 0);
336 }
337
338 #define PQI_RESCAN_WORK_DELAY (10 * PQI_HZ)
339
340 static inline void pqi_schedule_rescan_worker_delayed(
341 struct pqi_ctrl_info *ctrl_info)
342 {
343 pqi_schedule_rescan_worker_with_delay(ctrl_info, PQI_RESCAN_WORK_DELAY);
344 }
345
346 static inline void pqi_cancel_rescan_worker(struct pqi_ctrl_info *ctrl_info)
347 {
348 cancel_delayed_work_sync(&ctrl_info->rescan_work);
349 }
350
351 static inline u32 pqi_read_heartbeat_counter(struct pqi_ctrl_info *ctrl_info)
352 {
353 if (!ctrl_info->heartbeat_counter)
354 return 0;
355
356 return readl(ctrl_info->heartbeat_counter);
357 }
358
359 static inline u8 pqi_read_soft_reset_status(struct pqi_ctrl_info *ctrl_info)
360 {
361 if (!ctrl_info->soft_reset_status)
362 return 0;
363
364 return readb(ctrl_info->soft_reset_status);
365 }
366
367 static inline void pqi_clear_soft_reset_status(struct pqi_ctrl_info *ctrl_info,
368 u8 clear)
369 {
370 u8 status;
371
372 if (!ctrl_info->soft_reset_status)
373 return;
374
375 status = pqi_read_soft_reset_status(ctrl_info);
376 status &= ~clear;
377 writeb(status, ctrl_info->soft_reset_status);
378 }
379
380 static int pqi_map_single(struct pci_dev *pci_dev,
381 struct pqi_sg_descriptor *sg_descriptor, void *buffer,
382 size_t buffer_length, enum dma_data_direction data_direction)
383 {
384 dma_addr_t bus_address;
385
386 if (!buffer || buffer_length == 0 || data_direction == DMA_NONE)
387 return 0;
388
389 bus_address = dma_map_single(&pci_dev->dev, buffer, buffer_length,
390 data_direction);
391 if (dma_mapping_error(&pci_dev->dev, bus_address))
392 return -ENOMEM;
393
394 put_unaligned_le64((u64)bus_address, &sg_descriptor->address);
395 put_unaligned_le32(buffer_length, &sg_descriptor->length);
396 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags);
397
398 return 0;
399 }
400
401 static void pqi_pci_unmap(struct pci_dev *pci_dev,
402 struct pqi_sg_descriptor *descriptors, int num_descriptors,
403 enum dma_data_direction data_direction)
404 {
405 int i;
406
407 if (data_direction == DMA_NONE)
408 return;
409
410 for (i = 0; i < num_descriptors; i++)
411 dma_unmap_single(&pci_dev->dev,
412 (dma_addr_t)get_unaligned_le64(&descriptors[i].address),
413 get_unaligned_le32(&descriptors[i].length),
414 data_direction);
415 }
416
417 static int pqi_build_raid_path_request(struct pqi_ctrl_info *ctrl_info,
418 struct pqi_raid_path_request *request, u8 cmd,
419 u8 *scsi3addr, void *buffer, size_t buffer_length,
420 u16 vpd_page, enum dma_data_direction *dir)
421 {
422 u8 *cdb;
423 size_t cdb_length = buffer_length;
424
425 memset(request, 0, sizeof(*request));
426
427 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
428 put_unaligned_le16(offsetof(struct pqi_raid_path_request,
429 sg_descriptors[1]) - PQI_REQUEST_HEADER_LENGTH,
430 &request->header.iu_length);
431 put_unaligned_le32(buffer_length, &request->buffer_length);
432 memcpy(request->lun_number, scsi3addr, sizeof(request->lun_number));
433 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
434 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0;
435
436 cdb = request->cdb;
437
438 switch (cmd) {
439 case INQUIRY:
440 request->data_direction = SOP_READ_FLAG;
441 cdb[0] = INQUIRY;
442 if (vpd_page & VPD_PAGE) {
443 cdb[1] = 0x1;
444 cdb[2] = (u8)vpd_page;
445 }
446 cdb[4] = (u8)cdb_length;
447 break;
448 case CISS_REPORT_LOG:
449 case CISS_REPORT_PHYS:
450 request->data_direction = SOP_READ_FLAG;
451 cdb[0] = cmd;
452 if (cmd == CISS_REPORT_PHYS)
453 cdb[1] = CISS_REPORT_PHYS_EXTENDED;
454 else
455 cdb[1] = CISS_REPORT_LOG_EXTENDED;
456 put_unaligned_be32(cdb_length, &cdb[6]);
457 break;
458 case CISS_GET_RAID_MAP:
459 request->data_direction = SOP_READ_FLAG;
460 cdb[0] = CISS_READ;
461 cdb[1] = CISS_GET_RAID_MAP;
462 put_unaligned_be32(cdb_length, &cdb[6]);
463 break;
464 case SA_FLUSH_CACHE:
465 request->data_direction = SOP_WRITE_FLAG;
466 cdb[0] = BMIC_WRITE;
467 cdb[6] = BMIC_FLUSH_CACHE;
468 put_unaligned_be16(cdb_length, &cdb[7]);
469 break;
470 case BMIC_SENSE_DIAG_OPTIONS:
471 cdb_length = 0;
472 /* fall through */
473 case BMIC_IDENTIFY_CONTROLLER:
474 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
475 request->data_direction = SOP_READ_FLAG;
476 cdb[0] = BMIC_READ;
477 cdb[6] = cmd;
478 put_unaligned_be16(cdb_length, &cdb[7]);
479 break;
480 case BMIC_SET_DIAG_OPTIONS:
481 cdb_length = 0;
482 /* fall through */
483 case BMIC_WRITE_HOST_WELLNESS:
484 request->data_direction = SOP_WRITE_FLAG;
485 cdb[0] = BMIC_WRITE;
486 cdb[6] = cmd;
487 put_unaligned_be16(cdb_length, &cdb[7]);
488 break;
489 case BMIC_CSMI_PASSTHRU:
490 request->data_direction = SOP_BIDIRECTIONAL;
491 cdb[0] = BMIC_WRITE;
492 cdb[5] = CSMI_CC_SAS_SMP_PASSTHRU;
493 cdb[6] = cmd;
494 put_unaligned_be16(cdb_length, &cdb[7]);
495 break;
496 default:
497 dev_err(&ctrl_info->pci_dev->dev, "unknown command 0x%c\n",
498 cmd);
499 break;
500 }
501
502 switch (request->data_direction) {
503 case SOP_READ_FLAG:
504 *dir = DMA_FROM_DEVICE;
505 break;
506 case SOP_WRITE_FLAG:
507 *dir = DMA_TO_DEVICE;
508 break;
509 case SOP_NO_DIRECTION_FLAG:
510 *dir = DMA_NONE;
511 break;
512 default:
513 *dir = DMA_BIDIRECTIONAL;
514 break;
515 }
516
517 return pqi_map_single(ctrl_info->pci_dev, &request->sg_descriptors[0],
518 buffer, buffer_length, *dir);
519 }
520
521 static inline void pqi_reinit_io_request(struct pqi_io_request *io_request)
522 {
523 io_request->scmd = NULL;
524 io_request->status = 0;
525 io_request->error_info = NULL;
526 io_request->raid_bypass = false;
527 }
528
529 static struct pqi_io_request *pqi_alloc_io_request(
530 struct pqi_ctrl_info *ctrl_info)
531 {
532 struct pqi_io_request *io_request;
533 u16 i = ctrl_info->next_io_request_slot; /* benignly racy */
534
535 while (1) {
536 io_request = &ctrl_info->io_request_pool[i];
537 if (atomic_inc_return(&io_request->refcount) == 1)
538 break;
539 atomic_dec(&io_request->refcount);
540 i = (i + 1) % ctrl_info->max_io_slots;
541 }
542
543 /* benignly racy */
544 ctrl_info->next_io_request_slot = (i + 1) % ctrl_info->max_io_slots;
545
546 pqi_reinit_io_request(io_request);
547
548 return io_request;
549 }
550
551 static void pqi_free_io_request(struct pqi_io_request *io_request)
552 {
553 atomic_dec(&io_request->refcount);
554 }
555
556 static int pqi_send_scsi_raid_request(struct pqi_ctrl_info *ctrl_info, u8 cmd,
557 u8 *scsi3addr, void *buffer, size_t buffer_length, u16 vpd_page,
558 struct pqi_raid_error_info *error_info,
559 unsigned long timeout_msecs)
560 {
561 int rc;
562 enum dma_data_direction dir;
563 struct pqi_raid_path_request request;
564
565 rc = pqi_build_raid_path_request(ctrl_info, &request,
566 cmd, scsi3addr, buffer,
567 buffer_length, vpd_page, &dir);
568 if (rc)
569 return rc;
570
571 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
572 0, error_info, timeout_msecs);
573
574 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir);
575 return rc;
576 }
577
578 /* Helper functions for pqi_send_scsi_raid_request */
579
580 static inline int pqi_send_ctrl_raid_request(struct pqi_ctrl_info *ctrl_info,
581 u8 cmd, void *buffer, size_t buffer_length)
582 {
583 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID,
584 buffer, buffer_length, 0, NULL, NO_TIMEOUT);
585 }
586
587 static inline int pqi_send_ctrl_raid_with_error(struct pqi_ctrl_info *ctrl_info,
588 u8 cmd, void *buffer, size_t buffer_length,
589 struct pqi_raid_error_info *error_info)
590 {
591 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID,
592 buffer, buffer_length, 0, error_info, NO_TIMEOUT);
593 }
594
595
596 static inline int pqi_identify_controller(struct pqi_ctrl_info *ctrl_info,
597 struct bmic_identify_controller *buffer)
598 {
599 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_IDENTIFY_CONTROLLER,
600 buffer, sizeof(*buffer));
601 }
602
603 static inline int pqi_scsi_inquiry(struct pqi_ctrl_info *ctrl_info,
604 u8 *scsi3addr, u16 vpd_page, void *buffer, size_t buffer_length)
605 {
606 return pqi_send_scsi_raid_request(ctrl_info, INQUIRY, scsi3addr,
607 buffer, buffer_length, vpd_page, NULL, NO_TIMEOUT);
608 }
609
610 static bool pqi_vpd_page_supported(struct pqi_ctrl_info *ctrl_info,
611 u8 *scsi3addr, u16 vpd_page)
612 {
613 int rc;
614 int i;
615 int pages;
616 unsigned char *buf, bufsize;
617
618 buf = kzalloc(256, GFP_KERNEL);
619 if (!buf)
620 return false;
621
622 /* Get the size of the page list first */
623 rc = pqi_scsi_inquiry(ctrl_info, scsi3addr,
624 VPD_PAGE | SCSI_VPD_SUPPORTED_PAGES,
625 buf, SCSI_VPD_HEADER_SZ);
626 if (rc != 0)
627 goto exit_unsupported;
628
629 pages = buf[3];
630 if ((pages + SCSI_VPD_HEADER_SZ) <= 255)
631 bufsize = pages + SCSI_VPD_HEADER_SZ;
632 else
633 bufsize = 255;
634
635 /* Get the whole VPD page list */
636 rc = pqi_scsi_inquiry(ctrl_info, scsi3addr,
637 VPD_PAGE | SCSI_VPD_SUPPORTED_PAGES,
638 buf, bufsize);
639 if (rc != 0)
640 goto exit_unsupported;
641
642 pages = buf[3];
643 for (i = 1; i <= pages; i++)
644 if (buf[3 + i] == vpd_page)
645 goto exit_supported;
646
647 exit_unsupported:
648 kfree(buf);
649 return false;
650
651 exit_supported:
652 kfree(buf);
653 return true;
654 }
655
656 static int pqi_get_device_id(struct pqi_ctrl_info *ctrl_info,
657 u8 *scsi3addr, u8 *device_id, int buflen)
658 {
659 int rc;
660 unsigned char *buf;
661
662 if (!pqi_vpd_page_supported(ctrl_info, scsi3addr, SCSI_VPD_DEVICE_ID))
663 return 1; /* function not supported */
664
665 buf = kzalloc(64, GFP_KERNEL);
666 if (!buf)
667 return -ENOMEM;
668
669 rc = pqi_scsi_inquiry(ctrl_info, scsi3addr,
670 VPD_PAGE | SCSI_VPD_DEVICE_ID,
671 buf, 64);
672 if (rc == 0) {
673 if (buflen > 16)
674 buflen = 16;
675 memcpy(device_id, &buf[SCSI_VPD_DEVICE_ID_IDX], buflen);
676 }
677
678 kfree(buf);
679
680 return rc;
681 }
682
683 static int pqi_identify_physical_device(struct pqi_ctrl_info *ctrl_info,
684 struct pqi_scsi_dev *device,
685 struct bmic_identify_physical_device *buffer,
686 size_t buffer_length)
687 {
688 int rc;
689 enum dma_data_direction dir;
690 u16 bmic_device_index;
691 struct pqi_raid_path_request request;
692
693 rc = pqi_build_raid_path_request(ctrl_info, &request,
694 BMIC_IDENTIFY_PHYSICAL_DEVICE, RAID_CTLR_LUNID, buffer,
695 buffer_length, 0, &dir);
696 if (rc)
697 return rc;
698
699 bmic_device_index = CISS_GET_DRIVE_NUMBER(device->scsi3addr);
700 request.cdb[2] = (u8)bmic_device_index;
701 request.cdb[9] = (u8)(bmic_device_index >> 8);
702
703 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
704 0, NULL, NO_TIMEOUT);
705
706 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir);
707 return rc;
708 }
709
710 static int pqi_flush_cache(struct pqi_ctrl_info *ctrl_info,
711 enum bmic_flush_cache_shutdown_event shutdown_event)
712 {
713 int rc;
714 struct bmic_flush_cache *flush_cache;
715
716 /*
717 * Don't bother trying to flush the cache if the controller is
718 * locked up.
719 */
720 if (pqi_ctrl_offline(ctrl_info))
721 return -ENXIO;
722
723 flush_cache = kzalloc(sizeof(*flush_cache), GFP_KERNEL);
724 if (!flush_cache)
725 return -ENOMEM;
726
727 flush_cache->shutdown_event = shutdown_event;
728
729 rc = pqi_send_ctrl_raid_request(ctrl_info, SA_FLUSH_CACHE, flush_cache,
730 sizeof(*flush_cache));
731
732 kfree(flush_cache);
733
734 return rc;
735 }
736
737 int pqi_csmi_smp_passthru(struct pqi_ctrl_info *ctrl_info,
738 struct bmic_csmi_smp_passthru_buffer *buffer, size_t buffer_length,
739 struct pqi_raid_error_info *error_info)
740 {
741 return pqi_send_ctrl_raid_with_error(ctrl_info, BMIC_CSMI_PASSTHRU,
742 buffer, buffer_length, error_info);
743 }
744
745 #define PQI_FETCH_PTRAID_DATA (1UL<<31)
746
747 static int pqi_set_diag_rescan(struct pqi_ctrl_info *ctrl_info)
748 {
749 int rc;
750 struct bmic_diag_options *diag;
751
752 diag = kzalloc(sizeof(*diag), GFP_KERNEL);
753 if (!diag)
754 return -ENOMEM;
755
756 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SENSE_DIAG_OPTIONS,
757 diag, sizeof(*diag));
758 if (rc)
759 goto out;
760
761 diag->options |= cpu_to_le32(PQI_FETCH_PTRAID_DATA);
762
763 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SET_DIAG_OPTIONS,
764 diag, sizeof(*diag));
765 out:
766 kfree(diag);
767
768 return rc;
769 }
770
771 static inline int pqi_write_host_wellness(struct pqi_ctrl_info *ctrl_info,
772 void *buffer, size_t buffer_length)
773 {
774 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_WRITE_HOST_WELLNESS,
775 buffer, buffer_length);
776 }
777
778 #pragma pack(1)
779
780 struct bmic_host_wellness_driver_version {
781 u8 start_tag[4];
782 u8 driver_version_tag[2];
783 __le16 driver_version_length;
784 char driver_version[32];
785 u8 dont_write_tag[2];
786 u8 end_tag[2];
787 };
788
789 #pragma pack()
790
791 static int pqi_write_driver_version_to_host_wellness(
792 struct pqi_ctrl_info *ctrl_info)
793 {
794 int rc;
795 struct bmic_host_wellness_driver_version *buffer;
796 size_t buffer_length;
797
798 buffer_length = sizeof(*buffer);
799
800 buffer = kmalloc(buffer_length, GFP_KERNEL);
801 if (!buffer)
802 return -ENOMEM;
803
804 buffer->start_tag[0] = '<';
805 buffer->start_tag[1] = 'H';
806 buffer->start_tag[2] = 'W';
807 buffer->start_tag[3] = '>';
808 buffer->driver_version_tag[0] = 'D';
809 buffer->driver_version_tag[1] = 'V';
810 put_unaligned_le16(sizeof(buffer->driver_version),
811 &buffer->driver_version_length);
812 strncpy(buffer->driver_version, "Linux " DRIVER_VERSION,
813 sizeof(buffer->driver_version) - 1);
814 buffer->driver_version[sizeof(buffer->driver_version) - 1] = '\0';
815 buffer->dont_write_tag[0] = 'D';
816 buffer->dont_write_tag[1] = 'W';
817 buffer->end_tag[0] = 'Z';
818 buffer->end_tag[1] = 'Z';
819
820 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length);
821
822 kfree(buffer);
823
824 return rc;
825 }
826
827 #pragma pack(1)
828
829 struct bmic_host_wellness_time {
830 u8 start_tag[4];
831 u8 time_tag[2];
832 __le16 time_length;
833 u8 time[8];
834 u8 dont_write_tag[2];
835 u8 end_tag[2];
836 };
837
838 #pragma pack()
839
840 static int pqi_write_current_time_to_host_wellness(
841 struct pqi_ctrl_info *ctrl_info)
842 {
843 int rc;
844 struct bmic_host_wellness_time *buffer;
845 size_t buffer_length;
846 time64_t local_time;
847 unsigned int year;
848 struct tm tm;
849
850 buffer_length = sizeof(*buffer);
851
852 buffer = kmalloc(buffer_length, GFP_KERNEL);
853 if (!buffer)
854 return -ENOMEM;
855
856 buffer->start_tag[0] = '<';
857 buffer->start_tag[1] = 'H';
858 buffer->start_tag[2] = 'W';
859 buffer->start_tag[3] = '>';
860 buffer->time_tag[0] = 'T';
861 buffer->time_tag[1] = 'D';
862 put_unaligned_le16(sizeof(buffer->time),
863 &buffer->time_length);
864
865 local_time = ktime_get_real_seconds();
866 time64_to_tm(local_time, -sys_tz.tz_minuteswest * 60, &tm);
867 year = tm.tm_year + 1900;
868
869 buffer->time[0] = bin2bcd(tm.tm_hour);
870 buffer->time[1] = bin2bcd(tm.tm_min);
871 buffer->time[2] = bin2bcd(tm.tm_sec);
872 buffer->time[3] = 0;
873 buffer->time[4] = bin2bcd(tm.tm_mon + 1);
874 buffer->time[5] = bin2bcd(tm.tm_mday);
875 buffer->time[6] = bin2bcd(year / 100);
876 buffer->time[7] = bin2bcd(year % 100);
877
878 buffer->dont_write_tag[0] = 'D';
879 buffer->dont_write_tag[1] = 'W';
880 buffer->end_tag[0] = 'Z';
881 buffer->end_tag[1] = 'Z';
882
883 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length);
884
885 kfree(buffer);
886
887 return rc;
888 }
889
890 #define PQI_UPDATE_TIME_WORK_INTERVAL (24UL * 60 * 60 * PQI_HZ)
891
892 static void pqi_update_time_worker(struct work_struct *work)
893 {
894 int rc;
895 struct pqi_ctrl_info *ctrl_info;
896
897 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info,
898 update_time_work);
899
900 if (pqi_ctrl_offline(ctrl_info))
901 return;
902
903 rc = pqi_write_current_time_to_host_wellness(ctrl_info);
904 if (rc)
905 dev_warn(&ctrl_info->pci_dev->dev,
906 "error updating time on controller\n");
907
908 schedule_delayed_work(&ctrl_info->update_time_work,
909 PQI_UPDATE_TIME_WORK_INTERVAL);
910 }
911
912 static inline void pqi_schedule_update_time_worker(
913 struct pqi_ctrl_info *ctrl_info)
914 {
915 schedule_delayed_work(&ctrl_info->update_time_work, 0);
916 }
917
918 static inline void pqi_cancel_update_time_worker(
919 struct pqi_ctrl_info *ctrl_info)
920 {
921 cancel_delayed_work_sync(&ctrl_info->update_time_work);
922 }
923
924 static inline int pqi_report_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd,
925 void *buffer, size_t buffer_length)
926 {
927 return pqi_send_ctrl_raid_request(ctrl_info, cmd, buffer,
928 buffer_length);
929 }
930
931 static int pqi_report_phys_logical_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd,
932 void **buffer)
933 {
934 int rc;
935 size_t lun_list_length;
936 size_t lun_data_length;
937 size_t new_lun_list_length;
938 void *lun_data = NULL;
939 struct report_lun_header *report_lun_header;
940
941 report_lun_header = kmalloc(sizeof(*report_lun_header), GFP_KERNEL);
942 if (!report_lun_header) {
943 rc = -ENOMEM;
944 goto out;
945 }
946
947 rc = pqi_report_luns(ctrl_info, cmd, report_lun_header,
948 sizeof(*report_lun_header));
949 if (rc)
950 goto out;
951
952 lun_list_length = get_unaligned_be32(&report_lun_header->list_length);
953
954 again:
955 lun_data_length = sizeof(struct report_lun_header) + lun_list_length;
956
957 lun_data = kmalloc(lun_data_length, GFP_KERNEL);
958 if (!lun_data) {
959 rc = -ENOMEM;
960 goto out;
961 }
962
963 if (lun_list_length == 0) {
964 memcpy(lun_data, report_lun_header, sizeof(*report_lun_header));
965 goto out;
966 }
967
968 rc = pqi_report_luns(ctrl_info, cmd, lun_data, lun_data_length);
969 if (rc)
970 goto out;
971
972 new_lun_list_length = get_unaligned_be32(
973 &((struct report_lun_header *)lun_data)->list_length);
974
975 if (new_lun_list_length > lun_list_length) {
976 lun_list_length = new_lun_list_length;
977 kfree(lun_data);
978 goto again;
979 }
980
981 out:
982 kfree(report_lun_header);
983
984 if (rc) {
985 kfree(lun_data);
986 lun_data = NULL;
987 }
988
989 *buffer = lun_data;
990
991 return rc;
992 }
993
994 static inline int pqi_report_phys_luns(struct pqi_ctrl_info *ctrl_info,
995 void **buffer)
996 {
997 return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_PHYS,
998 buffer);
999 }
1000
1001 static inline int pqi_report_logical_luns(struct pqi_ctrl_info *ctrl_info,
1002 void **buffer)
1003 {
1004 return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_LOG, buffer);
1005 }
1006
1007 static int pqi_get_device_lists(struct pqi_ctrl_info *ctrl_info,
1008 struct report_phys_lun_extended **physdev_list,
1009 struct report_log_lun_extended **logdev_list)
1010 {
1011 int rc;
1012 size_t logdev_list_length;
1013 size_t logdev_data_length;
1014 struct report_log_lun_extended *internal_logdev_list;
1015 struct report_log_lun_extended *logdev_data;
1016 struct report_lun_header report_lun_header;
1017
1018 rc = pqi_report_phys_luns(ctrl_info, (void **)physdev_list);
1019 if (rc)
1020 dev_err(&ctrl_info->pci_dev->dev,
1021 "report physical LUNs failed\n");
1022
1023 rc = pqi_report_logical_luns(ctrl_info, (void **)logdev_list);
1024 if (rc)
1025 dev_err(&ctrl_info->pci_dev->dev,
1026 "report logical LUNs failed\n");
1027
1028 /*
1029 * Tack the controller itself onto the end of the logical device list.
1030 */
1031
1032 logdev_data = *logdev_list;
1033
1034 if (logdev_data) {
1035 logdev_list_length =
1036 get_unaligned_be32(&logdev_data->header.list_length);
1037 } else {
1038 memset(&report_lun_header, 0, sizeof(report_lun_header));
1039 logdev_data =
1040 (struct report_log_lun_extended *)&report_lun_header;
1041 logdev_list_length = 0;
1042 }
1043
1044 logdev_data_length = sizeof(struct report_lun_header) +
1045 logdev_list_length;
1046
1047 internal_logdev_list = kmalloc(logdev_data_length +
1048 sizeof(struct report_log_lun_extended), GFP_KERNEL);
1049 if (!internal_logdev_list) {
1050 kfree(*logdev_list);
1051 *logdev_list = NULL;
1052 return -ENOMEM;
1053 }
1054
1055 memcpy(internal_logdev_list, logdev_data, logdev_data_length);
1056 memset((u8 *)internal_logdev_list + logdev_data_length, 0,
1057 sizeof(struct report_log_lun_extended_entry));
1058 put_unaligned_be32(logdev_list_length +
1059 sizeof(struct report_log_lun_extended_entry),
1060 &internal_logdev_list->header.list_length);
1061
1062 kfree(*logdev_list);
1063 *logdev_list = internal_logdev_list;
1064
1065 return 0;
1066 }
1067
1068 static inline void pqi_set_bus_target_lun(struct pqi_scsi_dev *device,
1069 int bus, int target, int lun)
1070 {
1071 device->bus = bus;
1072 device->target = target;
1073 device->lun = lun;
1074 }
1075
1076 static void pqi_assign_bus_target_lun(struct pqi_scsi_dev *device)
1077 {
1078 u8 *scsi3addr;
1079 u32 lunid;
1080 int bus;
1081 int target;
1082 int lun;
1083
1084 scsi3addr = device->scsi3addr;
1085 lunid = get_unaligned_le32(scsi3addr);
1086
1087 if (pqi_is_hba_lunid(scsi3addr)) {
1088 /* The specified device is the controller. */
1089 pqi_set_bus_target_lun(device, PQI_HBA_BUS, 0, lunid & 0x3fff);
1090 device->target_lun_valid = true;
1091 return;
1092 }
1093
1094 if (pqi_is_logical_device(device)) {
1095 if (device->is_external_raid_device) {
1096 bus = PQI_EXTERNAL_RAID_VOLUME_BUS;
1097 target = (lunid >> 16) & 0x3fff;
1098 lun = lunid & 0xff;
1099 } else {
1100 bus = PQI_RAID_VOLUME_BUS;
1101 target = 0;
1102 lun = lunid & 0x3fff;
1103 }
1104 pqi_set_bus_target_lun(device, bus, target, lun);
1105 device->target_lun_valid = true;
1106 return;
1107 }
1108
1109 /*
1110 * Defer target and LUN assignment for non-controller physical devices
1111 * because the SAS transport layer will make these assignments later.
1112 */
1113 pqi_set_bus_target_lun(device, PQI_PHYSICAL_DEVICE_BUS, 0, 0);
1114 }
1115
1116 static void pqi_get_raid_level(struct pqi_ctrl_info *ctrl_info,
1117 struct pqi_scsi_dev *device)
1118 {
1119 int rc;
1120 u8 raid_level;
1121 u8 *buffer;
1122
1123 raid_level = SA_RAID_UNKNOWN;
1124
1125 buffer = kmalloc(64, GFP_KERNEL);
1126 if (buffer) {
1127 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1128 VPD_PAGE | CISS_VPD_LV_DEVICE_GEOMETRY, buffer, 64);
1129 if (rc == 0) {
1130 raid_level = buffer[8];
1131 if (raid_level > SA_RAID_MAX)
1132 raid_level = SA_RAID_UNKNOWN;
1133 }
1134 kfree(buffer);
1135 }
1136
1137 device->raid_level = raid_level;
1138 }
1139
1140 static int pqi_validate_raid_map(struct pqi_ctrl_info *ctrl_info,
1141 struct pqi_scsi_dev *device, struct raid_map *raid_map)
1142 {
1143 char *err_msg;
1144 u32 raid_map_size;
1145 u32 r5or6_blocks_per_row;
1146
1147 raid_map_size = get_unaligned_le32(&raid_map->structure_size);
1148
1149 if (raid_map_size < offsetof(struct raid_map, disk_data)) {
1150 err_msg = "RAID map too small";
1151 goto bad_raid_map;
1152 }
1153
1154 if (device->raid_level == SA_RAID_1) {
1155 if (get_unaligned_le16(&raid_map->layout_map_count) != 2) {
1156 err_msg = "invalid RAID-1 map";
1157 goto bad_raid_map;
1158 }
1159 } else if (device->raid_level == SA_RAID_ADM) {
1160 if (get_unaligned_le16(&raid_map->layout_map_count) != 3) {
1161 err_msg = "invalid RAID-1(ADM) map";
1162 goto bad_raid_map;
1163 }
1164 } else if ((device->raid_level == SA_RAID_5 ||
1165 device->raid_level == SA_RAID_6) &&
1166 get_unaligned_le16(&raid_map->layout_map_count) > 1) {
1167 /* RAID 50/60 */
1168 r5or6_blocks_per_row =
1169 get_unaligned_le16(&raid_map->strip_size) *
1170 get_unaligned_le16(&raid_map->data_disks_per_row);
1171 if (r5or6_blocks_per_row == 0) {
1172 err_msg = "invalid RAID-5 or RAID-6 map";
1173 goto bad_raid_map;
1174 }
1175 }
1176
1177 return 0;
1178
1179 bad_raid_map:
1180 dev_warn(&ctrl_info->pci_dev->dev,
1181 "logical device %08x%08x %s\n",
1182 *((u32 *)&device->scsi3addr),
1183 *((u32 *)&device->scsi3addr[4]), err_msg);
1184
1185 return -EINVAL;
1186 }
1187
1188 static int pqi_get_raid_map(struct pqi_ctrl_info *ctrl_info,
1189 struct pqi_scsi_dev *device)
1190 {
1191 int rc;
1192 u32 raid_map_size;
1193 struct raid_map *raid_map;
1194
1195 raid_map = kmalloc(sizeof(*raid_map), GFP_KERNEL);
1196 if (!raid_map)
1197 return -ENOMEM;
1198
1199 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP,
1200 device->scsi3addr, raid_map, sizeof(*raid_map),
1201 0, NULL, NO_TIMEOUT);
1202
1203 if (rc)
1204 goto error;
1205
1206 raid_map_size = get_unaligned_le32(&raid_map->structure_size);
1207
1208 if (raid_map_size > sizeof(*raid_map)) {
1209
1210 kfree(raid_map);
1211
1212 raid_map = kmalloc(raid_map_size, GFP_KERNEL);
1213 if (!raid_map)
1214 return -ENOMEM;
1215
1216 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP,
1217 device->scsi3addr, raid_map, raid_map_size,
1218 0, NULL, NO_TIMEOUT);
1219 if (rc)
1220 goto error;
1221
1222 if (get_unaligned_le32(&raid_map->structure_size)
1223 != raid_map_size) {
1224 dev_warn(&ctrl_info->pci_dev->dev,
1225 "Requested %d bytes, received %d bytes",
1226 raid_map_size,
1227 get_unaligned_le32(&raid_map->structure_size));
1228 goto error;
1229 }
1230 }
1231
1232 rc = pqi_validate_raid_map(ctrl_info, device, raid_map);
1233 if (rc)
1234 goto error;
1235
1236 device->raid_map = raid_map;
1237
1238 return 0;
1239
1240 error:
1241 kfree(raid_map);
1242
1243 return rc;
1244 }
1245
1246 static void pqi_get_raid_bypass_status(struct pqi_ctrl_info *ctrl_info,
1247 struct pqi_scsi_dev *device)
1248 {
1249 int rc;
1250 u8 *buffer;
1251 u8 bypass_status;
1252
1253 buffer = kmalloc(64, GFP_KERNEL);
1254 if (!buffer)
1255 return;
1256
1257 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1258 VPD_PAGE | CISS_VPD_LV_BYPASS_STATUS, buffer, 64);
1259 if (rc)
1260 goto out;
1261
1262 #define RAID_BYPASS_STATUS 4
1263 #define RAID_BYPASS_CONFIGURED 0x1
1264 #define RAID_BYPASS_ENABLED 0x2
1265
1266 bypass_status = buffer[RAID_BYPASS_STATUS];
1267 device->raid_bypass_configured =
1268 (bypass_status & RAID_BYPASS_CONFIGURED) != 0;
1269 if (device->raid_bypass_configured &&
1270 (bypass_status & RAID_BYPASS_ENABLED) &&
1271 pqi_get_raid_map(ctrl_info, device) == 0)
1272 device->raid_bypass_enabled = true;
1273
1274 out:
1275 kfree(buffer);
1276 }
1277
1278 /*
1279 * Use vendor-specific VPD to determine online/offline status of a volume.
1280 */
1281
1282 static void pqi_get_volume_status(struct pqi_ctrl_info *ctrl_info,
1283 struct pqi_scsi_dev *device)
1284 {
1285 int rc;
1286 size_t page_length;
1287 u8 volume_status = CISS_LV_STATUS_UNAVAILABLE;
1288 bool volume_offline = true;
1289 u32 volume_flags;
1290 struct ciss_vpd_logical_volume_status *vpd;
1291
1292 vpd = kmalloc(sizeof(*vpd), GFP_KERNEL);
1293 if (!vpd)
1294 goto no_buffer;
1295
1296 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1297 VPD_PAGE | CISS_VPD_LV_STATUS, vpd, sizeof(*vpd));
1298 if (rc)
1299 goto out;
1300
1301 if (vpd->page_code != CISS_VPD_LV_STATUS)
1302 goto out;
1303
1304 page_length = offsetof(struct ciss_vpd_logical_volume_status,
1305 volume_status) + vpd->page_length;
1306 if (page_length < sizeof(*vpd))
1307 goto out;
1308
1309 volume_status = vpd->volume_status;
1310 volume_flags = get_unaligned_be32(&vpd->flags);
1311 volume_offline = (volume_flags & CISS_LV_FLAGS_NO_HOST_IO) != 0;
1312
1313 out:
1314 kfree(vpd);
1315 no_buffer:
1316 device->volume_status = volume_status;
1317 device->volume_offline = volume_offline;
1318 }
1319
1320 #define PQI_INQUIRY_PAGE0_RETRIES 3
1321
1322 static int pqi_get_device_info(struct pqi_ctrl_info *ctrl_info,
1323 struct pqi_scsi_dev *device)
1324 {
1325 int rc;
1326 u8 *buffer;
1327 unsigned int retries;
1328
1329 if (device->is_expander_smp_device)
1330 return 0;
1331
1332 buffer = kmalloc(64, GFP_KERNEL);
1333 if (!buffer)
1334 return -ENOMEM;
1335
1336 /* Send an inquiry to the device to see what it is. */
1337 for (retries = 0;;) {
1338 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 0,
1339 buffer, 64);
1340 if (rc == 0)
1341 break;
1342 if (pqi_is_logical_device(device) ||
1343 rc != PQI_CMD_STATUS_ABORTED ||
1344 ++retries > PQI_INQUIRY_PAGE0_RETRIES)
1345 goto out;
1346 }
1347
1348 scsi_sanitize_inquiry_string(&buffer[8], 8);
1349 scsi_sanitize_inquiry_string(&buffer[16], 16);
1350
1351 device->devtype = buffer[0] & 0x1f;
1352 memcpy(device->vendor, &buffer[8], sizeof(device->vendor));
1353 memcpy(device->model, &buffer[16], sizeof(device->model));
1354
1355 if (pqi_is_logical_device(device) && device->devtype == TYPE_DISK) {
1356 if (device->is_external_raid_device) {
1357 device->raid_level = SA_RAID_UNKNOWN;
1358 device->volume_status = CISS_LV_OK;
1359 device->volume_offline = false;
1360 } else {
1361 pqi_get_raid_level(ctrl_info, device);
1362 pqi_get_raid_bypass_status(ctrl_info, device);
1363 pqi_get_volume_status(ctrl_info, device);
1364 }
1365 }
1366
1367 if (pqi_get_device_id(ctrl_info, device->scsi3addr,
1368 device->unique_id, sizeof(device->unique_id)) < 0)
1369 dev_warn(&ctrl_info->pci_dev->dev,
1370 "Can't get device id for scsi %d:%d:%d:%d\n",
1371 ctrl_info->scsi_host->host_no,
1372 device->bus, device->target,
1373 device->lun);
1374
1375 out:
1376 kfree(buffer);
1377
1378 return rc;
1379 }
1380
1381 static void pqi_get_physical_disk_info(struct pqi_ctrl_info *ctrl_info,
1382 struct pqi_scsi_dev *device,
1383 struct bmic_identify_physical_device *id_phys)
1384 {
1385 int rc;
1386
1387 memset(id_phys, 0, sizeof(*id_phys));
1388
1389 rc = pqi_identify_physical_device(ctrl_info, device,
1390 id_phys, sizeof(*id_phys));
1391 if (rc) {
1392 device->queue_depth = PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH;
1393 return;
1394 }
1395
1396 device->queue_depth =
1397 get_unaligned_le16(&id_phys->current_queue_depth_limit);
1398 device->device_type = id_phys->device_type;
1399 device->active_path_index = id_phys->active_path_number;
1400 device->path_map = id_phys->redundant_path_present_map;
1401 memcpy(&device->box,
1402 &id_phys->alternate_paths_phys_box_on_port,
1403 sizeof(device->box));
1404 memcpy(&device->phys_connector,
1405 &id_phys->alternate_paths_phys_connector,
1406 sizeof(device->phys_connector));
1407 device->bay = id_phys->phys_bay_in_box;
1408 }
1409
1410 static void pqi_show_volume_status(struct pqi_ctrl_info *ctrl_info,
1411 struct pqi_scsi_dev *device)
1412 {
1413 char *status;
1414 static const char unknown_state_str[] =
1415 "Volume is in an unknown state (%u)";
1416 char unknown_state_buffer[sizeof(unknown_state_str) + 10];
1417
1418 switch (device->volume_status) {
1419 case CISS_LV_OK:
1420 status = "Volume online";
1421 break;
1422 case CISS_LV_FAILED:
1423 status = "Volume failed";
1424 break;
1425 case CISS_LV_NOT_CONFIGURED:
1426 status = "Volume not configured";
1427 break;
1428 case CISS_LV_DEGRADED:
1429 status = "Volume degraded";
1430 break;
1431 case CISS_LV_READY_FOR_RECOVERY:
1432 status = "Volume ready for recovery operation";
1433 break;
1434 case CISS_LV_UNDERGOING_RECOVERY:
1435 status = "Volume undergoing recovery";
1436 break;
1437 case CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED:
1438 status = "Wrong physical drive was replaced";
1439 break;
1440 case CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM:
1441 status = "A physical drive not properly connected";
1442 break;
1443 case CISS_LV_HARDWARE_OVERHEATING:
1444 status = "Hardware is overheating";
1445 break;
1446 case CISS_LV_HARDWARE_HAS_OVERHEATED:
1447 status = "Hardware has overheated";
1448 break;
1449 case CISS_LV_UNDERGOING_EXPANSION:
1450 status = "Volume undergoing expansion";
1451 break;
1452 case CISS_LV_NOT_AVAILABLE:
1453 status = "Volume waiting for transforming volume";
1454 break;
1455 case CISS_LV_QUEUED_FOR_EXPANSION:
1456 status = "Volume queued for expansion";
1457 break;
1458 case CISS_LV_DISABLED_SCSI_ID_CONFLICT:
1459 status = "Volume disabled due to SCSI ID conflict";
1460 break;
1461 case CISS_LV_EJECTED:
1462 status = "Volume has been ejected";
1463 break;
1464 case CISS_LV_UNDERGOING_ERASE:
1465 status = "Volume undergoing background erase";
1466 break;
1467 case CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD:
1468 status = "Volume ready for predictive spare rebuild";
1469 break;
1470 case CISS_LV_UNDERGOING_RPI:
1471 status = "Volume undergoing rapid parity initialization";
1472 break;
1473 case CISS_LV_PENDING_RPI:
1474 status = "Volume queued for rapid parity initialization";
1475 break;
1476 case CISS_LV_ENCRYPTED_NO_KEY:
1477 status = "Encrypted volume inaccessible - key not present";
1478 break;
1479 case CISS_LV_UNDERGOING_ENCRYPTION:
1480 status = "Volume undergoing encryption process";
1481 break;
1482 case CISS_LV_UNDERGOING_ENCRYPTION_REKEYING:
1483 status = "Volume undergoing encryption re-keying process";
1484 break;
1485 case CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1486 status = "Volume encrypted but encryption is disabled";
1487 break;
1488 case CISS_LV_PENDING_ENCRYPTION:
1489 status = "Volume pending migration to encrypted state";
1490 break;
1491 case CISS_LV_PENDING_ENCRYPTION_REKEYING:
1492 status = "Volume pending encryption rekeying";
1493 break;
1494 case CISS_LV_NOT_SUPPORTED:
1495 status = "Volume not supported on this controller";
1496 break;
1497 case CISS_LV_STATUS_UNAVAILABLE:
1498 status = "Volume status not available";
1499 break;
1500 default:
1501 snprintf(unknown_state_buffer, sizeof(unknown_state_buffer),
1502 unknown_state_str, device->volume_status);
1503 status = unknown_state_buffer;
1504 break;
1505 }
1506
1507 dev_info(&ctrl_info->pci_dev->dev,
1508 "scsi %d:%d:%d:%d %s\n",
1509 ctrl_info->scsi_host->host_no,
1510 device->bus, device->target, device->lun, status);
1511 }
1512
1513 static void pqi_rescan_worker(struct work_struct *work)
1514 {
1515 struct pqi_ctrl_info *ctrl_info;
1516
1517 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info,
1518 rescan_work);
1519
1520 pqi_scan_scsi_devices(ctrl_info);
1521 }
1522
1523 static int pqi_add_device(struct pqi_ctrl_info *ctrl_info,
1524 struct pqi_scsi_dev *device)
1525 {
1526 int rc;
1527
1528 if (pqi_is_logical_device(device))
1529 rc = scsi_add_device(ctrl_info->scsi_host, device->bus,
1530 device->target, device->lun);
1531 else
1532 rc = pqi_add_sas_device(ctrl_info->sas_host, device);
1533
1534 return rc;
1535 }
1536
1537 #define PQI_PENDING_IO_TIMEOUT_SECS 20
1538
1539 static inline void pqi_remove_device(struct pqi_ctrl_info *ctrl_info,
1540 struct pqi_scsi_dev *device)
1541 {
1542 int rc;
1543
1544 pqi_device_remove_start(device);
1545
1546 rc = pqi_device_wait_for_pending_io(ctrl_info, device,
1547 PQI_PENDING_IO_TIMEOUT_SECS);
1548 if (rc)
1549 dev_err(&ctrl_info->pci_dev->dev,
1550 "scsi %d:%d:%d:%d removing device with %d outstanding commands\n",
1551 ctrl_info->scsi_host->host_no, device->bus,
1552 device->target, device->lun,
1553 atomic_read(&device->scsi_cmds_outstanding));
1554
1555 if (pqi_is_logical_device(device))
1556 scsi_remove_device(device->sdev);
1557 else
1558 pqi_remove_sas_device(device);
1559 }
1560
1561 /* Assumes the SCSI device list lock is held. */
1562
1563 static struct pqi_scsi_dev *pqi_find_scsi_dev(struct pqi_ctrl_info *ctrl_info,
1564 int bus, int target, int lun)
1565 {
1566 struct pqi_scsi_dev *device;
1567
1568 list_for_each_entry(device, &ctrl_info->scsi_device_list,
1569 scsi_device_list_entry)
1570 if (device->bus == bus && device->target == target &&
1571 device->lun == lun)
1572 return device;
1573
1574 return NULL;
1575 }
1576
1577 static inline bool pqi_device_equal(struct pqi_scsi_dev *dev1,
1578 struct pqi_scsi_dev *dev2)
1579 {
1580 if (dev1->is_physical_device != dev2->is_physical_device)
1581 return false;
1582
1583 if (dev1->is_physical_device)
1584 return dev1->wwid == dev2->wwid;
1585
1586 return memcmp(dev1->volume_id, dev2->volume_id,
1587 sizeof(dev1->volume_id)) == 0;
1588 }
1589
1590 enum pqi_find_result {
1591 DEVICE_NOT_FOUND,
1592 DEVICE_CHANGED,
1593 DEVICE_SAME,
1594 };
1595
1596 static enum pqi_find_result pqi_scsi_find_entry(struct pqi_ctrl_info *ctrl_info,
1597 struct pqi_scsi_dev *device_to_find,
1598 struct pqi_scsi_dev **matching_device)
1599 {
1600 struct pqi_scsi_dev *device;
1601
1602 list_for_each_entry(device, &ctrl_info->scsi_device_list,
1603 scsi_device_list_entry) {
1604 if (pqi_scsi3addr_equal(device_to_find->scsi3addr,
1605 device->scsi3addr)) {
1606 *matching_device = device;
1607 if (pqi_device_equal(device_to_find, device)) {
1608 if (device_to_find->volume_offline)
1609 return DEVICE_CHANGED;
1610 return DEVICE_SAME;
1611 }
1612 return DEVICE_CHANGED;
1613 }
1614 }
1615
1616 return DEVICE_NOT_FOUND;
1617 }
1618
1619 static inline const char *pqi_device_type(struct pqi_scsi_dev *device)
1620 {
1621 if (device->is_expander_smp_device)
1622 return "Enclosure SMP ";
1623
1624 return scsi_device_type(device->devtype);
1625 }
1626
1627 #define PQI_DEV_INFO_BUFFER_LENGTH 128
1628
1629 static void pqi_dev_info(struct pqi_ctrl_info *ctrl_info,
1630 char *action, struct pqi_scsi_dev *device)
1631 {
1632 ssize_t count;
1633 char buffer[PQI_DEV_INFO_BUFFER_LENGTH];
1634
1635 count = snprintf(buffer, PQI_DEV_INFO_BUFFER_LENGTH,
1636 "%d:%d:", ctrl_info->scsi_host->host_no, device->bus);
1637
1638 if (device->target_lun_valid)
1639 count += snprintf(buffer + count,
1640 PQI_DEV_INFO_BUFFER_LENGTH - count,
1641 "%d:%d",
1642 device->target,
1643 device->lun);
1644 else
1645 count += snprintf(buffer + count,
1646 PQI_DEV_INFO_BUFFER_LENGTH - count,
1647 "-:-");
1648
1649 if (pqi_is_logical_device(device))
1650 count += snprintf(buffer + count,
1651 PQI_DEV_INFO_BUFFER_LENGTH - count,
1652 " %08x%08x",
1653 *((u32 *)&device->scsi3addr),
1654 *((u32 *)&device->scsi3addr[4]));
1655 else
1656 count += snprintf(buffer + count,
1657 PQI_DEV_INFO_BUFFER_LENGTH - count,
1658 " %016llx", device->sas_address);
1659
1660 count += snprintf(buffer + count, PQI_DEV_INFO_BUFFER_LENGTH - count,
1661 " %s %.8s %.16s ",
1662 pqi_device_type(device),
1663 device->vendor,
1664 device->model);
1665
1666 if (pqi_is_logical_device(device)) {
1667 if (device->devtype == TYPE_DISK)
1668 count += snprintf(buffer + count,
1669 PQI_DEV_INFO_BUFFER_LENGTH - count,
1670 "SSDSmartPathCap%c En%c %-12s",
1671 device->raid_bypass_configured ? '+' : '-',
1672 device->raid_bypass_enabled ? '+' : '-',
1673 pqi_raid_level_to_string(device->raid_level));
1674 } else {
1675 count += snprintf(buffer + count,
1676 PQI_DEV_INFO_BUFFER_LENGTH - count,
1677 "AIO%c", device->aio_enabled ? '+' : '-');
1678 if (device->devtype == TYPE_DISK ||
1679 device->devtype == TYPE_ZBC)
1680 count += snprintf(buffer + count,
1681 PQI_DEV_INFO_BUFFER_LENGTH - count,
1682 " qd=%-6d", device->queue_depth);
1683 }
1684
1685 dev_info(&ctrl_info->pci_dev->dev, "%s %s\n", action, buffer);
1686 }
1687
1688 /* Assumes the SCSI device list lock is held. */
1689
1690 static void pqi_scsi_update_device(struct pqi_scsi_dev *existing_device,
1691 struct pqi_scsi_dev *new_device)
1692 {
1693 existing_device->devtype = new_device->devtype;
1694 existing_device->device_type = new_device->device_type;
1695 existing_device->bus = new_device->bus;
1696 if (new_device->target_lun_valid) {
1697 existing_device->target = new_device->target;
1698 existing_device->lun = new_device->lun;
1699 existing_device->target_lun_valid = true;
1700 }
1701
1702 /* By definition, the scsi3addr and wwid fields are already the same. */
1703
1704 existing_device->is_physical_device = new_device->is_physical_device;
1705 existing_device->is_external_raid_device =
1706 new_device->is_external_raid_device;
1707 existing_device->is_expander_smp_device =
1708 new_device->is_expander_smp_device;
1709 existing_device->aio_enabled = new_device->aio_enabled;
1710 memcpy(existing_device->vendor, new_device->vendor,
1711 sizeof(existing_device->vendor));
1712 memcpy(existing_device->model, new_device->model,
1713 sizeof(existing_device->model));
1714 existing_device->sas_address = new_device->sas_address;
1715 existing_device->raid_level = new_device->raid_level;
1716 existing_device->queue_depth = new_device->queue_depth;
1717 existing_device->aio_handle = new_device->aio_handle;
1718 existing_device->volume_status = new_device->volume_status;
1719 existing_device->active_path_index = new_device->active_path_index;
1720 existing_device->path_map = new_device->path_map;
1721 existing_device->bay = new_device->bay;
1722 memcpy(existing_device->box, new_device->box,
1723 sizeof(existing_device->box));
1724 memcpy(existing_device->phys_connector, new_device->phys_connector,
1725 sizeof(existing_device->phys_connector));
1726 existing_device->offload_to_mirror = 0;
1727 kfree(existing_device->raid_map);
1728 existing_device->raid_map = new_device->raid_map;
1729 existing_device->raid_bypass_configured =
1730 new_device->raid_bypass_configured;
1731 existing_device->raid_bypass_enabled =
1732 new_device->raid_bypass_enabled;
1733 existing_device->device_offline = false;
1734
1735 /* To prevent this from being freed later. */
1736 new_device->raid_map = NULL;
1737 }
1738
1739 static inline void pqi_free_device(struct pqi_scsi_dev *device)
1740 {
1741 if (device) {
1742 kfree(device->raid_map);
1743 kfree(device);
1744 }
1745 }
1746
1747 /*
1748 * Called when exposing a new device to the OS fails in order to re-adjust
1749 * our internal SCSI device list to match the SCSI ML's view.
1750 */
1751
1752 static inline void pqi_fixup_botched_add(struct pqi_ctrl_info *ctrl_info,
1753 struct pqi_scsi_dev *device)
1754 {
1755 unsigned long flags;
1756
1757 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
1758 list_del(&device->scsi_device_list_entry);
1759 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
1760
1761 /* Allow the device structure to be freed later. */
1762 device->keep_device = false;
1763 }
1764
1765 static inline bool pqi_is_device_added(struct pqi_scsi_dev *device)
1766 {
1767 if (device->is_expander_smp_device)
1768 return device->sas_port != NULL;
1769
1770 return device->sdev != NULL;
1771 }
1772
1773 static void pqi_update_device_list(struct pqi_ctrl_info *ctrl_info,
1774 struct pqi_scsi_dev *new_device_list[], unsigned int num_new_devices)
1775 {
1776 int rc;
1777 unsigned int i;
1778 unsigned long flags;
1779 enum pqi_find_result find_result;
1780 struct pqi_scsi_dev *device;
1781 struct pqi_scsi_dev *next;
1782 struct pqi_scsi_dev *matching_device;
1783 LIST_HEAD(add_list);
1784 LIST_HEAD(delete_list);
1785
1786 /*
1787 * The idea here is to do as little work as possible while holding the
1788 * spinlock. That's why we go to great pains to defer anything other
1789 * than updating the internal device list until after we release the
1790 * spinlock.
1791 */
1792
1793 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
1794
1795 /* Assume that all devices in the existing list have gone away. */
1796 list_for_each_entry(device, &ctrl_info->scsi_device_list,
1797 scsi_device_list_entry)
1798 device->device_gone = true;
1799
1800 for (i = 0; i < num_new_devices; i++) {
1801 device = new_device_list[i];
1802
1803 find_result = pqi_scsi_find_entry(ctrl_info, device,
1804 &matching_device);
1805
1806 switch (find_result) {
1807 case DEVICE_SAME:
1808 /*
1809 * The newly found device is already in the existing
1810 * device list.
1811 */
1812 device->new_device = false;
1813 matching_device->device_gone = false;
1814 pqi_scsi_update_device(matching_device, device);
1815 break;
1816 case DEVICE_NOT_FOUND:
1817 /*
1818 * The newly found device is NOT in the existing device
1819 * list.
1820 */
1821 device->new_device = true;
1822 break;
1823 case DEVICE_CHANGED:
1824 /*
1825 * The original device has gone away and we need to add
1826 * the new device.
1827 */
1828 device->new_device = true;
1829 break;
1830 }
1831 }
1832
1833 /* Process all devices that have gone away. */
1834 list_for_each_entry_safe(device, next, &ctrl_info->scsi_device_list,
1835 scsi_device_list_entry) {
1836 if (device->device_gone) {
1837 list_del(&device->scsi_device_list_entry);
1838 list_add_tail(&device->delete_list_entry, &delete_list);
1839 }
1840 }
1841
1842 /* Process all new devices. */
1843 for (i = 0; i < num_new_devices; i++) {
1844 device = new_device_list[i];
1845 if (!device->new_device)
1846 continue;
1847 if (device->volume_offline)
1848 continue;
1849 list_add_tail(&device->scsi_device_list_entry,
1850 &ctrl_info->scsi_device_list);
1851 list_add_tail(&device->add_list_entry, &add_list);
1852 /* To prevent this device structure from being freed later. */
1853 device->keep_device = true;
1854 }
1855
1856 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
1857
1858 if (pqi_ctrl_in_ofa(ctrl_info))
1859 pqi_ctrl_ofa_done(ctrl_info);
1860
1861 /* Remove all devices that have gone away. */
1862 list_for_each_entry_safe(device, next, &delete_list,
1863 delete_list_entry) {
1864 if (device->volume_offline) {
1865 pqi_dev_info(ctrl_info, "offline", device);
1866 pqi_show_volume_status(ctrl_info, device);
1867 } else {
1868 pqi_dev_info(ctrl_info, "removed", device);
1869 }
1870 if (pqi_is_device_added(device))
1871 pqi_remove_device(ctrl_info, device);
1872 list_del(&device->delete_list_entry);
1873 pqi_free_device(device);
1874 }
1875
1876 /*
1877 * Notify the SCSI ML if the queue depth of any existing device has
1878 * changed.
1879 */
1880 list_for_each_entry(device, &ctrl_info->scsi_device_list,
1881 scsi_device_list_entry) {
1882 if (device->sdev && device->queue_depth !=
1883 device->advertised_queue_depth) {
1884 device->advertised_queue_depth = device->queue_depth;
1885 scsi_change_queue_depth(device->sdev,
1886 device->advertised_queue_depth);
1887 }
1888 }
1889
1890 /* Expose any new devices. */
1891 list_for_each_entry_safe(device, next, &add_list, add_list_entry) {
1892 if (!pqi_is_device_added(device)) {
1893 pqi_dev_info(ctrl_info, "added", device);
1894 rc = pqi_add_device(ctrl_info, device);
1895 if (rc) {
1896 dev_warn(&ctrl_info->pci_dev->dev,
1897 "scsi %d:%d:%d:%d addition failed, device not added\n",
1898 ctrl_info->scsi_host->host_no,
1899 device->bus, device->target,
1900 device->lun);
1901 pqi_fixup_botched_add(ctrl_info, device);
1902 }
1903 }
1904 }
1905 }
1906
1907 static bool pqi_is_supported_device(struct pqi_scsi_dev *device)
1908 {
1909 bool is_supported;
1910
1911 if (device->is_expander_smp_device)
1912 return true;
1913
1914 is_supported = false;
1915
1916 switch (device->devtype) {
1917 case TYPE_DISK:
1918 case TYPE_ZBC:
1919 case TYPE_TAPE:
1920 case TYPE_MEDIUM_CHANGER:
1921 case TYPE_ENCLOSURE:
1922 is_supported = true;
1923 break;
1924 case TYPE_RAID:
1925 /*
1926 * Only support the HBA controller itself as a RAID
1927 * controller. If it's a RAID controller other than
1928 * the HBA itself (an external RAID controller, for
1929 * example), we don't support it.
1930 */
1931 if (pqi_is_hba_lunid(device->scsi3addr))
1932 is_supported = true;
1933 break;
1934 }
1935
1936 return is_supported;
1937 }
1938
1939 static inline bool pqi_skip_device(u8 *scsi3addr)
1940 {
1941 /* Ignore all masked devices. */
1942 if (MASKED_DEVICE(scsi3addr))
1943 return true;
1944
1945 return false;
1946 }
1947
1948 static inline bool pqi_is_device_with_sas_address(struct pqi_scsi_dev *device)
1949 {
1950 if (!device->is_physical_device)
1951 return false;
1952
1953 if (device->is_expander_smp_device)
1954 return true;
1955
1956 switch (device->devtype) {
1957 case TYPE_DISK:
1958 case TYPE_ZBC:
1959 case TYPE_ENCLOSURE:
1960 return true;
1961 }
1962
1963 return false;
1964 }
1965
1966 static inline bool pqi_expose_device(struct pqi_scsi_dev *device)
1967 {
1968 return !device->is_physical_device ||
1969 !pqi_skip_device(device->scsi3addr);
1970 }
1971
1972 static int pqi_update_scsi_devices(struct pqi_ctrl_info *ctrl_info)
1973 {
1974 int i;
1975 int rc;
1976 LIST_HEAD(new_device_list_head);
1977 struct report_phys_lun_extended *physdev_list = NULL;
1978 struct report_log_lun_extended *logdev_list = NULL;
1979 struct report_phys_lun_extended_entry *phys_lun_ext_entry;
1980 struct report_log_lun_extended_entry *log_lun_ext_entry;
1981 struct bmic_identify_physical_device *id_phys = NULL;
1982 u32 num_physicals;
1983 u32 num_logicals;
1984 struct pqi_scsi_dev **new_device_list = NULL;
1985 struct pqi_scsi_dev *device;
1986 struct pqi_scsi_dev *next;
1987 unsigned int num_new_devices;
1988 unsigned int num_valid_devices;
1989 bool is_physical_device;
1990 u8 *scsi3addr;
1991 static char *out_of_memory_msg =
1992 "failed to allocate memory, device discovery stopped";
1993
1994 rc = pqi_get_device_lists(ctrl_info, &physdev_list, &logdev_list);
1995 if (rc)
1996 goto out;
1997
1998 if (physdev_list)
1999 num_physicals =
2000 get_unaligned_be32(&physdev_list->header.list_length)
2001 / sizeof(physdev_list->lun_entries[0]);
2002 else
2003 num_physicals = 0;
2004
2005 if (logdev_list)
2006 num_logicals =
2007 get_unaligned_be32(&logdev_list->header.list_length)
2008 / sizeof(logdev_list->lun_entries[0]);
2009 else
2010 num_logicals = 0;
2011
2012 if (num_physicals) {
2013 /*
2014 * We need this buffer for calls to pqi_get_physical_disk_info()
2015 * below. We allocate it here instead of inside
2016 * pqi_get_physical_disk_info() because it's a fairly large
2017 * buffer.
2018 */
2019 id_phys = kmalloc(sizeof(*id_phys), GFP_KERNEL);
2020 if (!id_phys) {
2021 dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
2022 out_of_memory_msg);
2023 rc = -ENOMEM;
2024 goto out;
2025 }
2026 }
2027
2028 num_new_devices = num_physicals + num_logicals;
2029
2030 new_device_list = kmalloc_array(num_new_devices,
2031 sizeof(*new_device_list),
2032 GFP_KERNEL);
2033 if (!new_device_list) {
2034 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", out_of_memory_msg);
2035 rc = -ENOMEM;
2036 goto out;
2037 }
2038
2039 for (i = 0; i < num_new_devices; i++) {
2040 device = kzalloc(sizeof(*device), GFP_KERNEL);
2041 if (!device) {
2042 dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
2043 out_of_memory_msg);
2044 rc = -ENOMEM;
2045 goto out;
2046 }
2047 list_add_tail(&device->new_device_list_entry,
2048 &new_device_list_head);
2049 }
2050
2051 device = NULL;
2052 num_valid_devices = 0;
2053
2054 for (i = 0; i < num_new_devices; i++) {
2055
2056 if (i < num_physicals) {
2057 is_physical_device = true;
2058 phys_lun_ext_entry = &physdev_list->lun_entries[i];
2059 log_lun_ext_entry = NULL;
2060 scsi3addr = phys_lun_ext_entry->lunid;
2061 } else {
2062 is_physical_device = false;
2063 phys_lun_ext_entry = NULL;
2064 log_lun_ext_entry =
2065 &logdev_list->lun_entries[i - num_physicals];
2066 scsi3addr = log_lun_ext_entry->lunid;
2067 }
2068
2069 if (is_physical_device && pqi_skip_device(scsi3addr))
2070 continue;
2071
2072 if (device)
2073 device = list_next_entry(device, new_device_list_entry);
2074 else
2075 device = list_first_entry(&new_device_list_head,
2076 struct pqi_scsi_dev, new_device_list_entry);
2077
2078 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
2079 device->is_physical_device = is_physical_device;
2080 if (is_physical_device) {
2081 if (phys_lun_ext_entry->device_type ==
2082 SA_EXPANDER_SMP_DEVICE)
2083 device->is_expander_smp_device = true;
2084 } else {
2085 device->is_external_raid_device =
2086 pqi_is_external_raid_addr(scsi3addr);
2087 }
2088
2089 /* Gather information about the device. */
2090 rc = pqi_get_device_info(ctrl_info, device);
2091 if (rc == -ENOMEM) {
2092 dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
2093 out_of_memory_msg);
2094 goto out;
2095 }
2096 if (rc) {
2097 if (device->is_physical_device)
2098 dev_warn(&ctrl_info->pci_dev->dev,
2099 "obtaining device info failed, skipping physical device %016llx\n",
2100 get_unaligned_be64(
2101 &phys_lun_ext_entry->wwid));
2102 else
2103 dev_warn(&ctrl_info->pci_dev->dev,
2104 "obtaining device info failed, skipping logical device %08x%08x\n",
2105 *((u32 *)&device->scsi3addr),
2106 *((u32 *)&device->scsi3addr[4]));
2107 rc = 0;
2108 continue;
2109 }
2110
2111 if (!pqi_is_supported_device(device))
2112 continue;
2113
2114 pqi_assign_bus_target_lun(device);
2115
2116 if (device->is_physical_device) {
2117 device->wwid = phys_lun_ext_entry->wwid;
2118 if ((phys_lun_ext_entry->device_flags &
2119 REPORT_PHYS_LUN_DEV_FLAG_AIO_ENABLED) &&
2120 phys_lun_ext_entry->aio_handle) {
2121 device->aio_enabled = true;
2122 device->aio_handle =
2123 phys_lun_ext_entry->aio_handle;
2124 }
2125 if (device->devtype == TYPE_DISK ||
2126 device->devtype == TYPE_ZBC) {
2127 pqi_get_physical_disk_info(ctrl_info,
2128 device, id_phys);
2129 }
2130 } else {
2131 memcpy(device->volume_id, log_lun_ext_entry->volume_id,
2132 sizeof(device->volume_id));
2133 }
2134
2135 if (pqi_is_device_with_sas_address(device))
2136 device->sas_address = get_unaligned_be64(&device->wwid);
2137
2138 new_device_list[num_valid_devices++] = device;
2139 }
2140
2141 pqi_update_device_list(ctrl_info, new_device_list, num_valid_devices);
2142
2143 out:
2144 list_for_each_entry_safe(device, next, &new_device_list_head,
2145 new_device_list_entry) {
2146 if (device->keep_device)
2147 continue;
2148 list_del(&device->new_device_list_entry);
2149 pqi_free_device(device);
2150 }
2151
2152 kfree(new_device_list);
2153 kfree(physdev_list);
2154 kfree(logdev_list);
2155 kfree(id_phys);
2156
2157 return rc;
2158 }
2159
2160 static void pqi_remove_all_scsi_devices(struct pqi_ctrl_info *ctrl_info)
2161 {
2162 unsigned long flags;
2163 struct pqi_scsi_dev *device;
2164
2165 while (1) {
2166 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
2167
2168 device = list_first_entry_or_null(&ctrl_info->scsi_device_list,
2169 struct pqi_scsi_dev, scsi_device_list_entry);
2170 if (device)
2171 list_del(&device->scsi_device_list_entry);
2172
2173 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
2174 flags);
2175
2176 if (!device)
2177 break;
2178
2179 if (pqi_is_device_added(device))
2180 pqi_remove_device(ctrl_info, device);
2181 pqi_free_device(device);
2182 }
2183 }
2184
2185 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info)
2186 {
2187 int rc;
2188
2189 if (pqi_ctrl_offline(ctrl_info))
2190 return -ENXIO;
2191
2192 mutex_lock(&ctrl_info->scan_mutex);
2193
2194 rc = pqi_update_scsi_devices(ctrl_info);
2195 if (rc)
2196 pqi_schedule_rescan_worker_delayed(ctrl_info);
2197
2198 mutex_unlock(&ctrl_info->scan_mutex);
2199
2200 return rc;
2201 }
2202
2203 static void pqi_scan_start(struct Scsi_Host *shost)
2204 {
2205 struct pqi_ctrl_info *ctrl_info;
2206
2207 ctrl_info = shost_to_hba(shost);
2208 if (pqi_ctrl_in_ofa(ctrl_info))
2209 return;
2210
2211 pqi_scan_scsi_devices(ctrl_info);
2212 }
2213
2214 /* Returns TRUE if scan is finished. */
2215
2216 static int pqi_scan_finished(struct Scsi_Host *shost,
2217 unsigned long elapsed_time)
2218 {
2219 struct pqi_ctrl_info *ctrl_info;
2220
2221 ctrl_info = shost_priv(shost);
2222
2223 return !mutex_is_locked(&ctrl_info->scan_mutex);
2224 }
2225
2226 static void pqi_wait_until_scan_finished(struct pqi_ctrl_info *ctrl_info)
2227 {
2228 mutex_lock(&ctrl_info->scan_mutex);
2229 mutex_unlock(&ctrl_info->scan_mutex);
2230 }
2231
2232 static void pqi_wait_until_lun_reset_finished(struct pqi_ctrl_info *ctrl_info)
2233 {
2234 mutex_lock(&ctrl_info->lun_reset_mutex);
2235 mutex_unlock(&ctrl_info->lun_reset_mutex);
2236 }
2237
2238 static void pqi_wait_until_ofa_finished(struct pqi_ctrl_info *ctrl_info)
2239 {
2240 mutex_lock(&ctrl_info->ofa_mutex);
2241 mutex_unlock(&ctrl_info->ofa_mutex);
2242 }
2243
2244 static inline void pqi_set_encryption_info(
2245 struct pqi_encryption_info *encryption_info, struct raid_map *raid_map,
2246 u64 first_block)
2247 {
2248 u32 volume_blk_size;
2249
2250 /*
2251 * Set the encryption tweak values based on logical block address.
2252 * If the block size is 512, the tweak value is equal to the LBA.
2253 * For other block sizes, tweak value is (LBA * block size) / 512.
2254 */
2255 volume_blk_size = get_unaligned_le32(&raid_map->volume_blk_size);
2256 if (volume_blk_size != 512)
2257 first_block = (first_block * volume_blk_size) / 512;
2258
2259 encryption_info->data_encryption_key_index =
2260 get_unaligned_le16(&raid_map->data_encryption_key_index);
2261 encryption_info->encrypt_tweak_lower = lower_32_bits(first_block);
2262 encryption_info->encrypt_tweak_upper = upper_32_bits(first_block);
2263 }
2264
2265 /*
2266 * Attempt to perform RAID bypass mapping for a logical volume I/O.
2267 */
2268
2269 #define PQI_RAID_BYPASS_INELIGIBLE 1
2270
2271 static int pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
2272 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
2273 struct pqi_queue_group *queue_group)
2274 {
2275 struct raid_map *raid_map;
2276 bool is_write = false;
2277 u32 map_index;
2278 u64 first_block;
2279 u64 last_block;
2280 u32 block_cnt;
2281 u32 blocks_per_row;
2282 u64 first_row;
2283 u64 last_row;
2284 u32 first_row_offset;
2285 u32 last_row_offset;
2286 u32 first_column;
2287 u32 last_column;
2288 u64 r0_first_row;
2289 u64 r0_last_row;
2290 u32 r5or6_blocks_per_row;
2291 u64 r5or6_first_row;
2292 u64 r5or6_last_row;
2293 u32 r5or6_first_row_offset;
2294 u32 r5or6_last_row_offset;
2295 u32 r5or6_first_column;
2296 u32 r5or6_last_column;
2297 u16 data_disks_per_row;
2298 u32 total_disks_per_row;
2299 u16 layout_map_count;
2300 u32 stripesize;
2301 u16 strip_size;
2302 u32 first_group;
2303 u32 last_group;
2304 u32 current_group;
2305 u32 map_row;
2306 u32 aio_handle;
2307 u64 disk_block;
2308 u32 disk_block_cnt;
2309 u8 cdb[16];
2310 u8 cdb_length;
2311 int offload_to_mirror;
2312 struct pqi_encryption_info *encryption_info_ptr;
2313 struct pqi_encryption_info encryption_info;
2314 #if BITS_PER_LONG == 32
2315 u64 tmpdiv;
2316 #endif
2317
2318 /* Check for valid opcode, get LBA and block count. */
2319 switch (scmd->cmnd[0]) {
2320 case WRITE_6:
2321 is_write = true;
2322 /* fall through */
2323 case READ_6:
2324 first_block = (u64)(((scmd->cmnd[1] & 0x1f) << 16) |
2325 (scmd->cmnd[2] << 8) | scmd->cmnd[3]);
2326 block_cnt = (u32)scmd->cmnd[4];
2327 if (block_cnt == 0)
2328 block_cnt = 256;
2329 break;
2330 case WRITE_10:
2331 is_write = true;
2332 /* fall through */
2333 case READ_10:
2334 first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]);
2335 block_cnt = (u32)get_unaligned_be16(&scmd->cmnd[7]);
2336 break;
2337 case WRITE_12:
2338 is_write = true;
2339 /* fall through */
2340 case READ_12:
2341 first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]);
2342 block_cnt = get_unaligned_be32(&scmd->cmnd[6]);
2343 break;
2344 case WRITE_16:
2345 is_write = true;
2346 /* fall through */
2347 case READ_16:
2348 first_block = get_unaligned_be64(&scmd->cmnd[2]);
2349 block_cnt = get_unaligned_be32(&scmd->cmnd[10]);
2350 break;
2351 default:
2352 /* Process via normal I/O path. */
2353 return PQI_RAID_BYPASS_INELIGIBLE;
2354 }
2355
2356 /* Check for write to non-RAID-0. */
2357 if (is_write && device->raid_level != SA_RAID_0)
2358 return PQI_RAID_BYPASS_INELIGIBLE;
2359
2360 if (unlikely(block_cnt == 0))
2361 return PQI_RAID_BYPASS_INELIGIBLE;
2362
2363 last_block = first_block + block_cnt - 1;
2364 raid_map = device->raid_map;
2365
2366 /* Check for invalid block or wraparound. */
2367 if (last_block >= get_unaligned_le64(&raid_map->volume_blk_cnt) ||
2368 last_block < first_block)
2369 return PQI_RAID_BYPASS_INELIGIBLE;
2370
2371 data_disks_per_row = get_unaligned_le16(&raid_map->data_disks_per_row);
2372 strip_size = get_unaligned_le16(&raid_map->strip_size);
2373 layout_map_count = get_unaligned_le16(&raid_map->layout_map_count);
2374
2375 /* Calculate stripe information for the request. */
2376 blocks_per_row = data_disks_per_row * strip_size;
2377 #if BITS_PER_LONG == 32
2378 tmpdiv = first_block;
2379 do_div(tmpdiv, blocks_per_row);
2380 first_row = tmpdiv;
2381 tmpdiv = last_block;
2382 do_div(tmpdiv, blocks_per_row);
2383 last_row = tmpdiv;
2384 first_row_offset = (u32)(first_block - (first_row * blocks_per_row));
2385 last_row_offset = (u32)(last_block - (last_row * blocks_per_row));
2386 tmpdiv = first_row_offset;
2387 do_div(tmpdiv, strip_size);
2388 first_column = tmpdiv;
2389 tmpdiv = last_row_offset;
2390 do_div(tmpdiv, strip_size);
2391 last_column = tmpdiv;
2392 #else
2393 first_row = first_block / blocks_per_row;
2394 last_row = last_block / blocks_per_row;
2395 first_row_offset = (u32)(first_block - (first_row * blocks_per_row));
2396 last_row_offset = (u32)(last_block - (last_row * blocks_per_row));
2397 first_column = first_row_offset / strip_size;
2398 last_column = last_row_offset / strip_size;
2399 #endif
2400
2401 /* If this isn't a single row/column then give to the controller. */
2402 if (first_row != last_row || first_column != last_column)
2403 return PQI_RAID_BYPASS_INELIGIBLE;
2404
2405 /* Proceeding with driver mapping. */
2406 total_disks_per_row = data_disks_per_row +
2407 get_unaligned_le16(&raid_map->metadata_disks_per_row);
2408 map_row = ((u32)(first_row >> raid_map->parity_rotation_shift)) %
2409 get_unaligned_le16(&raid_map->row_cnt);
2410 map_index = (map_row * total_disks_per_row) + first_column;
2411
2412 /* RAID 1 */
2413 if (device->raid_level == SA_RAID_1) {
2414 if (device->offload_to_mirror)
2415 map_index += data_disks_per_row;
2416 device->offload_to_mirror = !device->offload_to_mirror;
2417 } else if (device->raid_level == SA_RAID_ADM) {
2418 /* RAID ADM */
2419 /*
2420 * Handles N-way mirrors (R1-ADM) and R10 with # of drives
2421 * divisible by 3.
2422 */
2423 offload_to_mirror = device->offload_to_mirror;
2424 if (offload_to_mirror == 0) {
2425 /* use physical disk in the first mirrored group. */
2426 map_index %= data_disks_per_row;
2427 } else {
2428 do {
2429 /*
2430 * Determine mirror group that map_index
2431 * indicates.
2432 */
2433 current_group = map_index / data_disks_per_row;
2434
2435 if (offload_to_mirror != current_group) {
2436 if (current_group <
2437 layout_map_count - 1) {
2438 /*
2439 * Select raid index from
2440 * next group.
2441 */
2442 map_index += data_disks_per_row;
2443 current_group++;
2444 } else {
2445 /*
2446 * Select raid index from first
2447 * group.
2448 */
2449 map_index %= data_disks_per_row;
2450 current_group = 0;
2451 }
2452 }
2453 } while (offload_to_mirror != current_group);
2454 }
2455
2456 /* Set mirror group to use next time. */
2457 offload_to_mirror =
2458 (offload_to_mirror >= layout_map_count - 1) ?
2459 0 : offload_to_mirror + 1;
2460 WARN_ON(offload_to_mirror >= layout_map_count);
2461 device->offload_to_mirror = offload_to_mirror;
2462 /*
2463 * Avoid direct use of device->offload_to_mirror within this
2464 * function since multiple threads might simultaneously
2465 * increment it beyond the range of device->layout_map_count -1.
2466 */
2467 } else if ((device->raid_level == SA_RAID_5 ||
2468 device->raid_level == SA_RAID_6) && layout_map_count > 1) {
2469 /* RAID 50/60 */
2470 /* Verify first and last block are in same RAID group */
2471 r5or6_blocks_per_row = strip_size * data_disks_per_row;
2472 stripesize = r5or6_blocks_per_row * layout_map_count;
2473 #if BITS_PER_LONG == 32
2474 tmpdiv = first_block;
2475 first_group = do_div(tmpdiv, stripesize);
2476 tmpdiv = first_group;
2477 do_div(tmpdiv, r5or6_blocks_per_row);
2478 first_group = tmpdiv;
2479 tmpdiv = last_block;
2480 last_group = do_div(tmpdiv, stripesize);
2481 tmpdiv = last_group;
2482 do_div(tmpdiv, r5or6_blocks_per_row);
2483 last_group = tmpdiv;
2484 #else
2485 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
2486 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
2487 #endif
2488 if (first_group != last_group)
2489 return PQI_RAID_BYPASS_INELIGIBLE;
2490
2491 /* Verify request is in a single row of RAID 5/6 */
2492 #if BITS_PER_LONG == 32
2493 tmpdiv = first_block;
2494 do_div(tmpdiv, stripesize);
2495 first_row = r5or6_first_row = r0_first_row = tmpdiv;
2496 tmpdiv = last_block;
2497 do_div(tmpdiv, stripesize);
2498 r5or6_last_row = r0_last_row = tmpdiv;
2499 #else
2500 first_row = r5or6_first_row = r0_first_row =
2501 first_block / stripesize;
2502 r5or6_last_row = r0_last_row = last_block / stripesize;
2503 #endif
2504 if (r5or6_first_row != r5or6_last_row)
2505 return PQI_RAID_BYPASS_INELIGIBLE;
2506
2507 /* Verify request is in a single column */
2508 #if BITS_PER_LONG == 32
2509 tmpdiv = first_block;
2510 first_row_offset = do_div(tmpdiv, stripesize);
2511 tmpdiv = first_row_offset;
2512 first_row_offset = (u32)do_div(tmpdiv, r5or6_blocks_per_row);
2513 r5or6_first_row_offset = first_row_offset;
2514 tmpdiv = last_block;
2515 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
2516 tmpdiv = r5or6_last_row_offset;
2517 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
2518 tmpdiv = r5or6_first_row_offset;
2519 do_div(tmpdiv, strip_size);
2520 first_column = r5or6_first_column = tmpdiv;
2521 tmpdiv = r5or6_last_row_offset;
2522 do_div(tmpdiv, strip_size);
2523 r5or6_last_column = tmpdiv;
2524 #else
2525 first_row_offset = r5or6_first_row_offset =
2526 (u32)((first_block % stripesize) %
2527 r5or6_blocks_per_row);
2528
2529 r5or6_last_row_offset =
2530 (u32)((last_block % stripesize) %
2531 r5or6_blocks_per_row);
2532
2533 first_column = r5or6_first_row_offset / strip_size;
2534 r5or6_first_column = first_column;
2535 r5or6_last_column = r5or6_last_row_offset / strip_size;
2536 #endif
2537 if (r5or6_first_column != r5or6_last_column)
2538 return PQI_RAID_BYPASS_INELIGIBLE;
2539
2540 /* Request is eligible */
2541 map_row =
2542 ((u32)(first_row >> raid_map->parity_rotation_shift)) %
2543 get_unaligned_le16(&raid_map->row_cnt);
2544
2545 map_index = (first_group *
2546 (get_unaligned_le16(&raid_map->row_cnt) *
2547 total_disks_per_row)) +
2548 (map_row * total_disks_per_row) + first_column;
2549 }
2550
2551 aio_handle = raid_map->disk_data[map_index].aio_handle;
2552 disk_block = get_unaligned_le64(&raid_map->disk_starting_blk) +
2553 first_row * strip_size +
2554 (first_row_offset - first_column * strip_size);
2555 disk_block_cnt = block_cnt;
2556
2557 /* Handle differing logical/physical block sizes. */
2558 if (raid_map->phys_blk_shift) {
2559 disk_block <<= raid_map->phys_blk_shift;
2560 disk_block_cnt <<= raid_map->phys_blk_shift;
2561 }
2562
2563 if (unlikely(disk_block_cnt > 0xffff))
2564 return PQI_RAID_BYPASS_INELIGIBLE;
2565
2566 /* Build the new CDB for the physical disk I/O. */
2567 if (disk_block > 0xffffffff) {
2568 cdb[0] = is_write ? WRITE_16 : READ_16;
2569 cdb[1] = 0;
2570 put_unaligned_be64(disk_block, &cdb[2]);
2571 put_unaligned_be32(disk_block_cnt, &cdb[10]);
2572 cdb[14] = 0;
2573 cdb[15] = 0;
2574 cdb_length = 16;
2575 } else {
2576 cdb[0] = is_write ? WRITE_10 : READ_10;
2577 cdb[1] = 0;
2578 put_unaligned_be32((u32)disk_block, &cdb[2]);
2579 cdb[6] = 0;
2580 put_unaligned_be16((u16)disk_block_cnt, &cdb[7]);
2581 cdb[9] = 0;
2582 cdb_length = 10;
2583 }
2584
2585 if (get_unaligned_le16(&raid_map->flags) &
2586 RAID_MAP_ENCRYPTION_ENABLED) {
2587 pqi_set_encryption_info(&encryption_info, raid_map,
2588 first_block);
2589 encryption_info_ptr = &encryption_info;
2590 } else {
2591 encryption_info_ptr = NULL;
2592 }
2593
2594 return pqi_aio_submit_io(ctrl_info, scmd, aio_handle,
2595 cdb, cdb_length, queue_group, encryption_info_ptr, true);
2596 }
2597
2598 #define PQI_STATUS_IDLE 0x0
2599
2600 #define PQI_CREATE_ADMIN_QUEUE_PAIR 1
2601 #define PQI_DELETE_ADMIN_QUEUE_PAIR 2
2602
2603 #define PQI_DEVICE_STATE_POWER_ON_AND_RESET 0x0
2604 #define PQI_DEVICE_STATE_STATUS_AVAILABLE 0x1
2605 #define PQI_DEVICE_STATE_ALL_REGISTERS_READY 0x2
2606 #define PQI_DEVICE_STATE_ADMIN_QUEUE_PAIR_READY 0x3
2607 #define PQI_DEVICE_STATE_ERROR 0x4
2608
2609 #define PQI_MODE_READY_TIMEOUT_SECS 30
2610 #define PQI_MODE_READY_POLL_INTERVAL_MSECS 1
2611
2612 static int pqi_wait_for_pqi_mode_ready(struct pqi_ctrl_info *ctrl_info)
2613 {
2614 struct pqi_device_registers __iomem *pqi_registers;
2615 unsigned long timeout;
2616 u64 signature;
2617 u8 status;
2618
2619 pqi_registers = ctrl_info->pqi_registers;
2620 timeout = (PQI_MODE_READY_TIMEOUT_SECS * PQI_HZ) + jiffies;
2621
2622 while (1) {
2623 signature = readq(&pqi_registers->signature);
2624 if (memcmp(&signature, PQI_DEVICE_SIGNATURE,
2625 sizeof(signature)) == 0)
2626 break;
2627 if (time_after(jiffies, timeout)) {
2628 dev_err(&ctrl_info->pci_dev->dev,
2629 "timed out waiting for PQI signature\n");
2630 return -ETIMEDOUT;
2631 }
2632 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
2633 }
2634
2635 while (1) {
2636 status = readb(&pqi_registers->function_and_status_code);
2637 if (status == PQI_STATUS_IDLE)
2638 break;
2639 if (time_after(jiffies, timeout)) {
2640 dev_err(&ctrl_info->pci_dev->dev,
2641 "timed out waiting for PQI IDLE\n");
2642 return -ETIMEDOUT;
2643 }
2644 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
2645 }
2646
2647 while (1) {
2648 if (readl(&pqi_registers->device_status) ==
2649 PQI_DEVICE_STATE_ALL_REGISTERS_READY)
2650 break;
2651 if (time_after(jiffies, timeout)) {
2652 dev_err(&ctrl_info->pci_dev->dev,
2653 "timed out waiting for PQI all registers ready\n");
2654 return -ETIMEDOUT;
2655 }
2656 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
2657 }
2658
2659 return 0;
2660 }
2661
2662 static inline void pqi_aio_path_disabled(struct pqi_io_request *io_request)
2663 {
2664 struct pqi_scsi_dev *device;
2665
2666 device = io_request->scmd->device->hostdata;
2667 device->raid_bypass_enabled = false;
2668 device->aio_enabled = false;
2669 }
2670
2671 static inline void pqi_take_device_offline(struct scsi_device *sdev, char *path)
2672 {
2673 struct pqi_ctrl_info *ctrl_info;
2674 struct pqi_scsi_dev *device;
2675
2676 device = sdev->hostdata;
2677 if (device->device_offline)
2678 return;
2679
2680 device->device_offline = true;
2681 ctrl_info = shost_to_hba(sdev->host);
2682 pqi_schedule_rescan_worker(ctrl_info);
2683 dev_err(&ctrl_info->pci_dev->dev, "re-scanning %s scsi %d:%d:%d:%d\n",
2684 path, ctrl_info->scsi_host->host_no, device->bus,
2685 device->target, device->lun);
2686 }
2687
2688 static void pqi_process_raid_io_error(struct pqi_io_request *io_request)
2689 {
2690 u8 scsi_status;
2691 u8 host_byte;
2692 struct scsi_cmnd *scmd;
2693 struct pqi_raid_error_info *error_info;
2694 size_t sense_data_length;
2695 int residual_count;
2696 int xfer_count;
2697 struct scsi_sense_hdr sshdr;
2698
2699 scmd = io_request->scmd;
2700 if (!scmd)
2701 return;
2702
2703 error_info = io_request->error_info;
2704 scsi_status = error_info->status;
2705 host_byte = DID_OK;
2706
2707 switch (error_info->data_out_result) {
2708 case PQI_DATA_IN_OUT_GOOD:
2709 break;
2710 case PQI_DATA_IN_OUT_UNDERFLOW:
2711 xfer_count =
2712 get_unaligned_le32(&error_info->data_out_transferred);
2713 residual_count = scsi_bufflen(scmd) - xfer_count;
2714 scsi_set_resid(scmd, residual_count);
2715 if (xfer_count < scmd->underflow)
2716 host_byte = DID_SOFT_ERROR;
2717 break;
2718 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT:
2719 case PQI_DATA_IN_OUT_ABORTED:
2720 host_byte = DID_ABORT;
2721 break;
2722 case PQI_DATA_IN_OUT_TIMEOUT:
2723 host_byte = DID_TIME_OUT;
2724 break;
2725 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW:
2726 case PQI_DATA_IN_OUT_PROTOCOL_ERROR:
2727 case PQI_DATA_IN_OUT_BUFFER_ERROR:
2728 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA:
2729 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE:
2730 case PQI_DATA_IN_OUT_ERROR:
2731 case PQI_DATA_IN_OUT_HARDWARE_ERROR:
2732 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR:
2733 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT:
2734 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED:
2735 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED:
2736 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED:
2737 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST:
2738 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION:
2739 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED:
2740 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ:
2741 default:
2742 host_byte = DID_ERROR;
2743 break;
2744 }
2745
2746 sense_data_length = get_unaligned_le16(&error_info->sense_data_length);
2747 if (sense_data_length == 0)
2748 sense_data_length =
2749 get_unaligned_le16(&error_info->response_data_length);
2750 if (sense_data_length) {
2751 if (sense_data_length > sizeof(error_info->data))
2752 sense_data_length = sizeof(error_info->data);
2753
2754 if (scsi_status == SAM_STAT_CHECK_CONDITION &&
2755 scsi_normalize_sense(error_info->data,
2756 sense_data_length, &sshdr) &&
2757 sshdr.sense_key == HARDWARE_ERROR &&
2758 sshdr.asc == 0x3e) {
2759 struct pqi_ctrl_info *ctrl_info = shost_to_hba(scmd->device->host);
2760 struct pqi_scsi_dev *device = scmd->device->hostdata;
2761
2762 switch (sshdr.ascq) {
2763 case 0x1: /* LOGICAL UNIT FAILURE */
2764 if (printk_ratelimit())
2765 scmd_printk(KERN_ERR, scmd, "received 'logical unit failure' from controller for scsi %d:%d:%d:%d\n",
2766 ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun);
2767 pqi_take_device_offline(scmd->device, "RAID");
2768 host_byte = DID_NO_CONNECT;
2769 break;
2770
2771 default: /* See http://www.t10.org/lists/asc-num.htm#ASC_3E */
2772 if (printk_ratelimit())
2773 scmd_printk(KERN_ERR, scmd, "received unhandled error %d from controller for scsi %d:%d:%d:%d\n",
2774 sshdr.ascq, ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun);
2775 break;
2776 }
2777 }
2778
2779 if (sense_data_length > SCSI_SENSE_BUFFERSIZE)
2780 sense_data_length = SCSI_SENSE_BUFFERSIZE;
2781 memcpy(scmd->sense_buffer, error_info->data,
2782 sense_data_length);
2783 }
2784
2785 scmd->result = scsi_status;
2786 set_host_byte(scmd, host_byte);
2787 }
2788
2789 static void pqi_process_aio_io_error(struct pqi_io_request *io_request)
2790 {
2791 u8 scsi_status;
2792 u8 host_byte;
2793 struct scsi_cmnd *scmd;
2794 struct pqi_aio_error_info *error_info;
2795 size_t sense_data_length;
2796 int residual_count;
2797 int xfer_count;
2798 bool device_offline;
2799
2800 scmd = io_request->scmd;
2801 error_info = io_request->error_info;
2802 host_byte = DID_OK;
2803 sense_data_length = 0;
2804 device_offline = false;
2805
2806 switch (error_info->service_response) {
2807 case PQI_AIO_SERV_RESPONSE_COMPLETE:
2808 scsi_status = error_info->status;
2809 break;
2810 case PQI_AIO_SERV_RESPONSE_FAILURE:
2811 switch (error_info->status) {
2812 case PQI_AIO_STATUS_IO_ABORTED:
2813 scsi_status = SAM_STAT_TASK_ABORTED;
2814 break;
2815 case PQI_AIO_STATUS_UNDERRUN:
2816 scsi_status = SAM_STAT_GOOD;
2817 residual_count = get_unaligned_le32(
2818 &error_info->residual_count);
2819 scsi_set_resid(scmd, residual_count);
2820 xfer_count = scsi_bufflen(scmd) - residual_count;
2821 if (xfer_count < scmd->underflow)
2822 host_byte = DID_SOFT_ERROR;
2823 break;
2824 case PQI_AIO_STATUS_OVERRUN:
2825 scsi_status = SAM_STAT_GOOD;
2826 break;
2827 case PQI_AIO_STATUS_AIO_PATH_DISABLED:
2828 pqi_aio_path_disabled(io_request);
2829 scsi_status = SAM_STAT_GOOD;
2830 io_request->status = -EAGAIN;
2831 break;
2832 case PQI_AIO_STATUS_NO_PATH_TO_DEVICE:
2833 case PQI_AIO_STATUS_INVALID_DEVICE:
2834 if (!io_request->raid_bypass) {
2835 device_offline = true;
2836 pqi_take_device_offline(scmd->device, "AIO");
2837 host_byte = DID_NO_CONNECT;
2838 }
2839 scsi_status = SAM_STAT_CHECK_CONDITION;
2840 break;
2841 case PQI_AIO_STATUS_IO_ERROR:
2842 default:
2843 scsi_status = SAM_STAT_CHECK_CONDITION;
2844 break;
2845 }
2846 break;
2847 case PQI_AIO_SERV_RESPONSE_TMF_COMPLETE:
2848 case PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED:
2849 scsi_status = SAM_STAT_GOOD;
2850 break;
2851 case PQI_AIO_SERV_RESPONSE_TMF_REJECTED:
2852 case PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN:
2853 default:
2854 scsi_status = SAM_STAT_CHECK_CONDITION;
2855 break;
2856 }
2857
2858 if (error_info->data_present) {
2859 sense_data_length =
2860 get_unaligned_le16(&error_info->data_length);
2861 if (sense_data_length) {
2862 if (sense_data_length > sizeof(error_info->data))
2863 sense_data_length = sizeof(error_info->data);
2864 if (sense_data_length > SCSI_SENSE_BUFFERSIZE)
2865 sense_data_length = SCSI_SENSE_BUFFERSIZE;
2866 memcpy(scmd->sense_buffer, error_info->data,
2867 sense_data_length);
2868 }
2869 }
2870
2871 if (device_offline && sense_data_length == 0)
2872 scsi_build_sense_buffer(0, scmd->sense_buffer, HARDWARE_ERROR,
2873 0x3e, 0x1);
2874
2875 scmd->result = scsi_status;
2876 set_host_byte(scmd, host_byte);
2877 }
2878
2879 static void pqi_process_io_error(unsigned int iu_type,
2880 struct pqi_io_request *io_request)
2881 {
2882 switch (iu_type) {
2883 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR:
2884 pqi_process_raid_io_error(io_request);
2885 break;
2886 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR:
2887 pqi_process_aio_io_error(io_request);
2888 break;
2889 }
2890 }
2891
2892 static int pqi_interpret_task_management_response(
2893 struct pqi_task_management_response *response)
2894 {
2895 int rc;
2896
2897 switch (response->response_code) {
2898 case SOP_TMF_COMPLETE:
2899 case SOP_TMF_FUNCTION_SUCCEEDED:
2900 rc = 0;
2901 break;
2902 case SOP_TMF_REJECTED:
2903 rc = -EAGAIN;
2904 break;
2905 default:
2906 rc = -EIO;
2907 break;
2908 }
2909
2910 return rc;
2911 }
2912
2913 static unsigned int pqi_process_io_intr(struct pqi_ctrl_info *ctrl_info,
2914 struct pqi_queue_group *queue_group)
2915 {
2916 unsigned int num_responses;
2917 pqi_index_t oq_pi;
2918 pqi_index_t oq_ci;
2919 struct pqi_io_request *io_request;
2920 struct pqi_io_response *response;
2921 u16 request_id;
2922
2923 num_responses = 0;
2924 oq_ci = queue_group->oq_ci_copy;
2925
2926 while (1) {
2927 oq_pi = readl(queue_group->oq_pi);
2928 if (oq_pi == oq_ci)
2929 break;
2930
2931 num_responses++;
2932 response = queue_group->oq_element_array +
2933 (oq_ci * PQI_OPERATIONAL_OQ_ELEMENT_LENGTH);
2934
2935 request_id = get_unaligned_le16(&response->request_id);
2936 WARN_ON(request_id >= ctrl_info->max_io_slots);
2937
2938 io_request = &ctrl_info->io_request_pool[request_id];
2939 WARN_ON(atomic_read(&io_request->refcount) == 0);
2940
2941 switch (response->header.iu_type) {
2942 case PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS:
2943 case PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS:
2944 if (io_request->scmd)
2945 io_request->scmd->result = 0;
2946 /* fall through */
2947 case PQI_RESPONSE_IU_GENERAL_MANAGEMENT:
2948 break;
2949 case PQI_RESPONSE_IU_VENDOR_GENERAL:
2950 io_request->status =
2951 get_unaligned_le16(
2952 &((struct pqi_vendor_general_response *)
2953 response)->status);
2954 break;
2955 case PQI_RESPONSE_IU_TASK_MANAGEMENT:
2956 io_request->status =
2957 pqi_interpret_task_management_response(
2958 (void *)response);
2959 break;
2960 case PQI_RESPONSE_IU_AIO_PATH_DISABLED:
2961 pqi_aio_path_disabled(io_request);
2962 io_request->status = -EAGAIN;
2963 break;
2964 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR:
2965 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR:
2966 io_request->error_info = ctrl_info->error_buffer +
2967 (get_unaligned_le16(&response->error_index) *
2968 PQI_ERROR_BUFFER_ELEMENT_LENGTH);
2969 pqi_process_io_error(response->header.iu_type,
2970 io_request);
2971 break;
2972 default:
2973 dev_err(&ctrl_info->pci_dev->dev,
2974 "unexpected IU type: 0x%x\n",
2975 response->header.iu_type);
2976 break;
2977 }
2978
2979 io_request->io_complete_callback(io_request,
2980 io_request->context);
2981
2982 /*
2983 * Note that the I/O request structure CANNOT BE TOUCHED after
2984 * returning from the I/O completion callback!
2985 */
2986
2987 oq_ci = (oq_ci + 1) % ctrl_info->num_elements_per_oq;
2988 }
2989
2990 if (num_responses) {
2991 queue_group->oq_ci_copy = oq_ci;
2992 writel(oq_ci, queue_group->oq_ci);
2993 }
2994
2995 return num_responses;
2996 }
2997
2998 static inline unsigned int pqi_num_elements_free(unsigned int pi,
2999 unsigned int ci, unsigned int elements_in_queue)
3000 {
3001 unsigned int num_elements_used;
3002
3003 if (pi >= ci)
3004 num_elements_used = pi - ci;
3005 else
3006 num_elements_used = elements_in_queue - ci + pi;
3007
3008 return elements_in_queue - num_elements_used - 1;
3009 }
3010
3011 static void pqi_send_event_ack(struct pqi_ctrl_info *ctrl_info,
3012 struct pqi_event_acknowledge_request *iu, size_t iu_length)
3013 {
3014 pqi_index_t iq_pi;
3015 pqi_index_t iq_ci;
3016 unsigned long flags;
3017 void *next_element;
3018 struct pqi_queue_group *queue_group;
3019
3020 queue_group = &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP];
3021 put_unaligned_le16(queue_group->oq_id, &iu->header.response_queue_id);
3022
3023 while (1) {
3024 spin_lock_irqsave(&queue_group->submit_lock[RAID_PATH], flags);
3025
3026 iq_pi = queue_group->iq_pi_copy[RAID_PATH];
3027 iq_ci = readl(queue_group->iq_ci[RAID_PATH]);
3028
3029 if (pqi_num_elements_free(iq_pi, iq_ci,
3030 ctrl_info->num_elements_per_iq))
3031 break;
3032
3033 spin_unlock_irqrestore(
3034 &queue_group->submit_lock[RAID_PATH], flags);
3035
3036 if (pqi_ctrl_offline(ctrl_info))
3037 return;
3038 }
3039
3040 next_element = queue_group->iq_element_array[RAID_PATH] +
3041 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
3042
3043 memcpy(next_element, iu, iu_length);
3044
3045 iq_pi = (iq_pi + 1) % ctrl_info->num_elements_per_iq;
3046 queue_group->iq_pi_copy[RAID_PATH] = iq_pi;
3047
3048 /*
3049 * This write notifies the controller that an IU is available to be
3050 * processed.
3051 */
3052 writel(iq_pi, queue_group->iq_pi[RAID_PATH]);
3053
3054 spin_unlock_irqrestore(&queue_group->submit_lock[RAID_PATH], flags);
3055 }
3056
3057 static void pqi_acknowledge_event(struct pqi_ctrl_info *ctrl_info,
3058 struct pqi_event *event)
3059 {
3060 struct pqi_event_acknowledge_request request;
3061
3062 memset(&request, 0, sizeof(request));
3063
3064 request.header.iu_type = PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT;
3065 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
3066 &request.header.iu_length);
3067 request.event_type = event->event_type;
3068 request.event_id = event->event_id;
3069 request.additional_event_id = event->additional_event_id;
3070
3071 pqi_send_event_ack(ctrl_info, &request, sizeof(request));
3072 }
3073
3074 #define PQI_SOFT_RESET_STATUS_TIMEOUT_SECS 30
3075 #define PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS 1
3076
3077 static enum pqi_soft_reset_status pqi_poll_for_soft_reset_status(
3078 struct pqi_ctrl_info *ctrl_info)
3079 {
3080 unsigned long timeout;
3081 u8 status;
3082
3083 timeout = (PQI_SOFT_RESET_STATUS_TIMEOUT_SECS * PQI_HZ) + jiffies;
3084
3085 while (1) {
3086 status = pqi_read_soft_reset_status(ctrl_info);
3087 if (status & PQI_SOFT_RESET_INITIATE)
3088 return RESET_INITIATE_DRIVER;
3089
3090 if (status & PQI_SOFT_RESET_ABORT)
3091 return RESET_ABORT;
3092
3093 if (time_after(jiffies, timeout)) {
3094 dev_err(&ctrl_info->pci_dev->dev,
3095 "timed out waiting for soft reset status\n");
3096 return RESET_TIMEDOUT;
3097 }
3098
3099 if (!sis_is_firmware_running(ctrl_info))
3100 return RESET_NORESPONSE;
3101
3102 ssleep(PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS);
3103 }
3104 }
3105
3106 static void pqi_process_soft_reset(struct pqi_ctrl_info *ctrl_info,
3107 enum pqi_soft_reset_status reset_status)
3108 {
3109 int rc;
3110
3111 switch (reset_status) {
3112 case RESET_INITIATE_DRIVER:
3113 /* fall through */
3114 case RESET_TIMEDOUT:
3115 dev_info(&ctrl_info->pci_dev->dev,
3116 "resetting controller %u\n", ctrl_info->ctrl_id);
3117 sis_soft_reset(ctrl_info);
3118 /* fall through */
3119 case RESET_INITIATE_FIRMWARE:
3120 rc = pqi_ofa_ctrl_restart(ctrl_info);
3121 pqi_ofa_free_host_buffer(ctrl_info);
3122 dev_info(&ctrl_info->pci_dev->dev,
3123 "Online Firmware Activation for controller %u: %s\n",
3124 ctrl_info->ctrl_id, rc == 0 ? "SUCCESS" : "FAILED");
3125 break;
3126 case RESET_ABORT:
3127 pqi_ofa_ctrl_unquiesce(ctrl_info);
3128 dev_info(&ctrl_info->pci_dev->dev,
3129 "Online Firmware Activation for controller %u: %s\n",
3130 ctrl_info->ctrl_id, "ABORTED");
3131 break;
3132 case RESET_NORESPONSE:
3133 pqi_ofa_free_host_buffer(ctrl_info);
3134 pqi_take_ctrl_offline(ctrl_info);
3135 break;
3136 }
3137 }
3138
3139 static void pqi_ofa_process_event(struct pqi_ctrl_info *ctrl_info,
3140 struct pqi_event *event)
3141 {
3142 u16 event_id;
3143 enum pqi_soft_reset_status status;
3144
3145 event_id = get_unaligned_le16(&event->event_id);
3146
3147 mutex_lock(&ctrl_info->ofa_mutex);
3148
3149 if (event_id == PQI_EVENT_OFA_QUIESCE) {
3150 dev_info(&ctrl_info->pci_dev->dev,
3151 "Received Online Firmware Activation quiesce event for controller %u\n",
3152 ctrl_info->ctrl_id);
3153 pqi_ofa_ctrl_quiesce(ctrl_info);
3154 pqi_acknowledge_event(ctrl_info, event);
3155 if (ctrl_info->soft_reset_handshake_supported) {
3156 status = pqi_poll_for_soft_reset_status(ctrl_info);
3157 pqi_process_soft_reset(ctrl_info, status);
3158 } else {
3159 pqi_process_soft_reset(ctrl_info,
3160 RESET_INITIATE_FIRMWARE);
3161 }
3162
3163 } else if (event_id == PQI_EVENT_OFA_MEMORY_ALLOCATION) {
3164 pqi_acknowledge_event(ctrl_info, event);
3165 pqi_ofa_setup_host_buffer(ctrl_info,
3166 le32_to_cpu(event->ofa_bytes_requested));
3167 pqi_ofa_host_memory_update(ctrl_info);
3168 } else if (event_id == PQI_EVENT_OFA_CANCELLED) {
3169 pqi_ofa_free_host_buffer(ctrl_info);
3170 pqi_acknowledge_event(ctrl_info, event);
3171 dev_info(&ctrl_info->pci_dev->dev,
3172 "Online Firmware Activation(%u) cancel reason : %u\n",
3173 ctrl_info->ctrl_id, event->ofa_cancel_reason);
3174 }
3175
3176 mutex_unlock(&ctrl_info->ofa_mutex);
3177 }
3178
3179 static void pqi_event_worker(struct work_struct *work)
3180 {
3181 unsigned int i;
3182 struct pqi_ctrl_info *ctrl_info;
3183 struct pqi_event *event;
3184
3185 ctrl_info = container_of(work, struct pqi_ctrl_info, event_work);
3186
3187 pqi_ctrl_busy(ctrl_info);
3188 pqi_wait_if_ctrl_blocked(ctrl_info, NO_TIMEOUT);
3189 if (pqi_ctrl_offline(ctrl_info))
3190 goto out;
3191
3192 pqi_schedule_rescan_worker_delayed(ctrl_info);
3193
3194 event = ctrl_info->events;
3195 for (i = 0; i < PQI_NUM_SUPPORTED_EVENTS; i++) {
3196 if (event->pending) {
3197 event->pending = false;
3198 if (event->event_type == PQI_EVENT_TYPE_OFA) {
3199 pqi_ctrl_unbusy(ctrl_info);
3200 pqi_ofa_process_event(ctrl_info, event);
3201 return;
3202 }
3203 pqi_acknowledge_event(ctrl_info, event);
3204 }
3205 event++;
3206 }
3207
3208 out:
3209 pqi_ctrl_unbusy(ctrl_info);
3210 }
3211
3212 #define PQI_HEARTBEAT_TIMER_INTERVAL (10 * PQI_HZ)
3213
3214 static void pqi_heartbeat_timer_handler(struct timer_list *t)
3215 {
3216 int num_interrupts;
3217 u32 heartbeat_count;
3218 struct pqi_ctrl_info *ctrl_info = from_timer(ctrl_info, t,
3219 heartbeat_timer);
3220
3221 pqi_check_ctrl_health(ctrl_info);
3222 if (pqi_ctrl_offline(ctrl_info))
3223 return;
3224
3225 num_interrupts = atomic_read(&ctrl_info->num_interrupts);
3226 heartbeat_count = pqi_read_heartbeat_counter(ctrl_info);
3227
3228 if (num_interrupts == ctrl_info->previous_num_interrupts) {
3229 if (heartbeat_count == ctrl_info->previous_heartbeat_count) {
3230 dev_err(&ctrl_info->pci_dev->dev,
3231 "no heartbeat detected - last heartbeat count: %u\n",
3232 heartbeat_count);
3233 pqi_take_ctrl_offline(ctrl_info);
3234 return;
3235 }
3236 } else {
3237 ctrl_info->previous_num_interrupts = num_interrupts;
3238 }
3239
3240 ctrl_info->previous_heartbeat_count = heartbeat_count;
3241 mod_timer(&ctrl_info->heartbeat_timer,
3242 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL);
3243 }
3244
3245 static void pqi_start_heartbeat_timer(struct pqi_ctrl_info *ctrl_info)
3246 {
3247 if (!ctrl_info->heartbeat_counter)
3248 return;
3249
3250 ctrl_info->previous_num_interrupts =
3251 atomic_read(&ctrl_info->num_interrupts);
3252 ctrl_info->previous_heartbeat_count =
3253 pqi_read_heartbeat_counter(ctrl_info);
3254
3255 ctrl_info->heartbeat_timer.expires =
3256 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL;
3257 add_timer(&ctrl_info->heartbeat_timer);
3258 }
3259
3260 static inline void pqi_stop_heartbeat_timer(struct pqi_ctrl_info *ctrl_info)
3261 {
3262 del_timer_sync(&ctrl_info->heartbeat_timer);
3263 }
3264
3265 static inline int pqi_event_type_to_event_index(unsigned int event_type)
3266 {
3267 int index;
3268
3269 for (index = 0; index < ARRAY_SIZE(pqi_supported_event_types); index++)
3270 if (event_type == pqi_supported_event_types[index])
3271 return index;
3272
3273 return -1;
3274 }
3275
3276 static inline bool pqi_is_supported_event(unsigned int event_type)
3277 {
3278 return pqi_event_type_to_event_index(event_type) != -1;
3279 }
3280
3281 static void pqi_ofa_capture_event_payload(struct pqi_event *event,
3282 struct pqi_event_response *response)
3283 {
3284 u16 event_id;
3285
3286 event_id = get_unaligned_le16(&event->event_id);
3287
3288 if (event->event_type == PQI_EVENT_TYPE_OFA) {
3289 if (event_id == PQI_EVENT_OFA_MEMORY_ALLOCATION) {
3290 event->ofa_bytes_requested =
3291 response->data.ofa_memory_allocation.bytes_requested;
3292 } else if (event_id == PQI_EVENT_OFA_CANCELLED) {
3293 event->ofa_cancel_reason =
3294 response->data.ofa_cancelled.reason;
3295 }
3296 }
3297 }
3298
3299 static unsigned int pqi_process_event_intr(struct pqi_ctrl_info *ctrl_info)
3300 {
3301 unsigned int num_events;
3302 pqi_index_t oq_pi;
3303 pqi_index_t oq_ci;
3304 struct pqi_event_queue *event_queue;
3305 struct pqi_event_response *response;
3306 struct pqi_event *event;
3307 int event_index;
3308
3309 event_queue = &ctrl_info->event_queue;
3310 num_events = 0;
3311 oq_ci = event_queue->oq_ci_copy;
3312
3313 while (1) {
3314 oq_pi = readl(event_queue->oq_pi);
3315 if (oq_pi == oq_ci)
3316 break;
3317
3318 num_events++;
3319 response = event_queue->oq_element_array +
3320 (oq_ci * PQI_EVENT_OQ_ELEMENT_LENGTH);
3321
3322 event_index =
3323 pqi_event_type_to_event_index(response->event_type);
3324
3325 if (event_index >= 0) {
3326 if (response->request_acknowlege) {
3327 event = &ctrl_info->events[event_index];
3328 event->pending = true;
3329 event->event_type = response->event_type;
3330 event->event_id = response->event_id;
3331 event->additional_event_id =
3332 response->additional_event_id;
3333 pqi_ofa_capture_event_payload(event, response);
3334 }
3335 }
3336
3337 oq_ci = (oq_ci + 1) % PQI_NUM_EVENT_QUEUE_ELEMENTS;
3338 }
3339
3340 if (num_events) {
3341 event_queue->oq_ci_copy = oq_ci;
3342 writel(oq_ci, event_queue->oq_ci);
3343 schedule_work(&ctrl_info->event_work);
3344 }
3345
3346 return num_events;
3347 }
3348
3349 #define PQI_LEGACY_INTX_MASK 0x1
3350
3351 static inline void pqi_configure_legacy_intx(struct pqi_ctrl_info *ctrl_info,
3352 bool enable_intx)
3353 {
3354 u32 intx_mask;
3355 struct pqi_device_registers __iomem *pqi_registers;
3356 volatile void __iomem *register_addr;
3357
3358 pqi_registers = ctrl_info->pqi_registers;
3359
3360 if (enable_intx)
3361 register_addr = &pqi_registers->legacy_intx_mask_clear;
3362 else
3363 register_addr = &pqi_registers->legacy_intx_mask_set;
3364
3365 intx_mask = readl(register_addr);
3366 intx_mask |= PQI_LEGACY_INTX_MASK;
3367 writel(intx_mask, register_addr);
3368 }
3369
3370 static void pqi_change_irq_mode(struct pqi_ctrl_info *ctrl_info,
3371 enum pqi_irq_mode new_mode)
3372 {
3373 switch (ctrl_info->irq_mode) {
3374 case IRQ_MODE_MSIX:
3375 switch (new_mode) {
3376 case IRQ_MODE_MSIX:
3377 break;
3378 case IRQ_MODE_INTX:
3379 pqi_configure_legacy_intx(ctrl_info, true);
3380 sis_enable_intx(ctrl_info);
3381 break;
3382 case IRQ_MODE_NONE:
3383 break;
3384 }
3385 break;
3386 case IRQ_MODE_INTX:
3387 switch (new_mode) {
3388 case IRQ_MODE_MSIX:
3389 pqi_configure_legacy_intx(ctrl_info, false);
3390 sis_enable_msix(ctrl_info);
3391 break;
3392 case IRQ_MODE_INTX:
3393 break;
3394 case IRQ_MODE_NONE:
3395 pqi_configure_legacy_intx(ctrl_info, false);
3396 break;
3397 }
3398 break;
3399 case IRQ_MODE_NONE:
3400 switch (new_mode) {
3401 case IRQ_MODE_MSIX:
3402 sis_enable_msix(ctrl_info);
3403 break;
3404 case IRQ_MODE_INTX:
3405 pqi_configure_legacy_intx(ctrl_info, true);
3406 sis_enable_intx(ctrl_info);
3407 break;
3408 case IRQ_MODE_NONE:
3409 break;
3410 }
3411 break;
3412 }
3413
3414 ctrl_info->irq_mode = new_mode;
3415 }
3416
3417 #define PQI_LEGACY_INTX_PENDING 0x1
3418
3419 static inline bool pqi_is_valid_irq(struct pqi_ctrl_info *ctrl_info)
3420 {
3421 bool valid_irq;
3422 u32 intx_status;
3423
3424 switch (ctrl_info->irq_mode) {
3425 case IRQ_MODE_MSIX:
3426 valid_irq = true;
3427 break;
3428 case IRQ_MODE_INTX:
3429 intx_status =
3430 readl(&ctrl_info->pqi_registers->legacy_intx_status);
3431 if (intx_status & PQI_LEGACY_INTX_PENDING)
3432 valid_irq = true;
3433 else
3434 valid_irq = false;
3435 break;
3436 case IRQ_MODE_NONE:
3437 default:
3438 valid_irq = false;
3439 break;
3440 }
3441
3442 return valid_irq;
3443 }
3444
3445 static irqreturn_t pqi_irq_handler(int irq, void *data)
3446 {
3447 struct pqi_ctrl_info *ctrl_info;
3448 struct pqi_queue_group *queue_group;
3449 unsigned int num_responses_handled;
3450
3451 queue_group = data;
3452 ctrl_info = queue_group->ctrl_info;
3453
3454 if (!pqi_is_valid_irq(ctrl_info))
3455 return IRQ_NONE;
3456
3457 num_responses_handled = pqi_process_io_intr(ctrl_info, queue_group);
3458
3459 if (irq == ctrl_info->event_irq)
3460 num_responses_handled += pqi_process_event_intr(ctrl_info);
3461
3462 if (num_responses_handled)
3463 atomic_inc(&ctrl_info->num_interrupts);
3464
3465 pqi_start_io(ctrl_info, queue_group, RAID_PATH, NULL);
3466 pqi_start_io(ctrl_info, queue_group, AIO_PATH, NULL);
3467
3468 return IRQ_HANDLED;
3469 }
3470
3471 static int pqi_request_irqs(struct pqi_ctrl_info *ctrl_info)
3472 {
3473 struct pci_dev *pci_dev = ctrl_info->pci_dev;
3474 int i;
3475 int rc;
3476
3477 ctrl_info->event_irq = pci_irq_vector(pci_dev, 0);
3478
3479 for (i = 0; i < ctrl_info->num_msix_vectors_enabled; i++) {
3480 rc = request_irq(pci_irq_vector(pci_dev, i), pqi_irq_handler, 0,
3481 DRIVER_NAME_SHORT, &ctrl_info->queue_groups[i]);
3482 if (rc) {
3483 dev_err(&pci_dev->dev,
3484 "irq %u init failed with error %d\n",
3485 pci_irq_vector(pci_dev, i), rc);
3486 return rc;
3487 }
3488 ctrl_info->num_msix_vectors_initialized++;
3489 }
3490
3491 return 0;
3492 }
3493
3494 static void pqi_free_irqs(struct pqi_ctrl_info *ctrl_info)
3495 {
3496 int i;
3497
3498 for (i = 0; i < ctrl_info->num_msix_vectors_initialized; i++)
3499 free_irq(pci_irq_vector(ctrl_info->pci_dev, i),
3500 &ctrl_info->queue_groups[i]);
3501
3502 ctrl_info->num_msix_vectors_initialized = 0;
3503 }
3504
3505 static int pqi_enable_msix_interrupts(struct pqi_ctrl_info *ctrl_info)
3506 {
3507 int num_vectors_enabled;
3508
3509 num_vectors_enabled = pci_alloc_irq_vectors(ctrl_info->pci_dev,
3510 PQI_MIN_MSIX_VECTORS, ctrl_info->num_queue_groups,
3511 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
3512 if (num_vectors_enabled < 0) {
3513 dev_err(&ctrl_info->pci_dev->dev,
3514 "MSI-X init failed with error %d\n",
3515 num_vectors_enabled);
3516 return num_vectors_enabled;
3517 }
3518
3519 ctrl_info->num_msix_vectors_enabled = num_vectors_enabled;
3520 ctrl_info->irq_mode = IRQ_MODE_MSIX;
3521 return 0;
3522 }
3523
3524 static void pqi_disable_msix_interrupts(struct pqi_ctrl_info *ctrl_info)
3525 {
3526 if (ctrl_info->num_msix_vectors_enabled) {
3527 pci_free_irq_vectors(ctrl_info->pci_dev);
3528 ctrl_info->num_msix_vectors_enabled = 0;
3529 }
3530 }
3531
3532 static int pqi_alloc_operational_queues(struct pqi_ctrl_info *ctrl_info)
3533 {
3534 unsigned int i;
3535 size_t alloc_length;
3536 size_t element_array_length_per_iq;
3537 size_t element_array_length_per_oq;
3538 void *element_array;
3539 void __iomem *next_queue_index;
3540 void *aligned_pointer;
3541 unsigned int num_inbound_queues;
3542 unsigned int num_outbound_queues;
3543 unsigned int num_queue_indexes;
3544 struct pqi_queue_group *queue_group;
3545
3546 element_array_length_per_iq =
3547 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH *
3548 ctrl_info->num_elements_per_iq;
3549 element_array_length_per_oq =
3550 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH *
3551 ctrl_info->num_elements_per_oq;
3552 num_inbound_queues = ctrl_info->num_queue_groups * 2;
3553 num_outbound_queues = ctrl_info->num_queue_groups;
3554 num_queue_indexes = (ctrl_info->num_queue_groups * 3) + 1;
3555
3556 aligned_pointer = NULL;
3557
3558 for (i = 0; i < num_inbound_queues; i++) {
3559 aligned_pointer = PTR_ALIGN(aligned_pointer,
3560 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3561 aligned_pointer += element_array_length_per_iq;
3562 }
3563
3564 for (i = 0; i < num_outbound_queues; i++) {
3565 aligned_pointer = PTR_ALIGN(aligned_pointer,
3566 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3567 aligned_pointer += element_array_length_per_oq;
3568 }
3569
3570 aligned_pointer = PTR_ALIGN(aligned_pointer,
3571 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3572 aligned_pointer += PQI_NUM_EVENT_QUEUE_ELEMENTS *
3573 PQI_EVENT_OQ_ELEMENT_LENGTH;
3574
3575 for (i = 0; i < num_queue_indexes; i++) {
3576 aligned_pointer = PTR_ALIGN(aligned_pointer,
3577 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3578 aligned_pointer += sizeof(pqi_index_t);
3579 }
3580
3581 alloc_length = (size_t)aligned_pointer +
3582 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT;
3583
3584 alloc_length += PQI_EXTRA_SGL_MEMORY;
3585
3586 ctrl_info->queue_memory_base =
3587 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length,
3588 &ctrl_info->queue_memory_base_dma_handle,
3589 GFP_KERNEL);
3590
3591 if (!ctrl_info->queue_memory_base)
3592 return -ENOMEM;
3593
3594 ctrl_info->queue_memory_length = alloc_length;
3595
3596 element_array = PTR_ALIGN(ctrl_info->queue_memory_base,
3597 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3598
3599 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3600 queue_group = &ctrl_info->queue_groups[i];
3601 queue_group->iq_element_array[RAID_PATH] = element_array;
3602 queue_group->iq_element_array_bus_addr[RAID_PATH] =
3603 ctrl_info->queue_memory_base_dma_handle +
3604 (element_array - ctrl_info->queue_memory_base);
3605 element_array += element_array_length_per_iq;
3606 element_array = PTR_ALIGN(element_array,
3607 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3608 queue_group->iq_element_array[AIO_PATH] = element_array;
3609 queue_group->iq_element_array_bus_addr[AIO_PATH] =
3610 ctrl_info->queue_memory_base_dma_handle +
3611 (element_array - ctrl_info->queue_memory_base);
3612 element_array += element_array_length_per_iq;
3613 element_array = PTR_ALIGN(element_array,
3614 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3615 }
3616
3617 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3618 queue_group = &ctrl_info->queue_groups[i];
3619 queue_group->oq_element_array = element_array;
3620 queue_group->oq_element_array_bus_addr =
3621 ctrl_info->queue_memory_base_dma_handle +
3622 (element_array - ctrl_info->queue_memory_base);
3623 element_array += element_array_length_per_oq;
3624 element_array = PTR_ALIGN(element_array,
3625 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3626 }
3627
3628 ctrl_info->event_queue.oq_element_array = element_array;
3629 ctrl_info->event_queue.oq_element_array_bus_addr =
3630 ctrl_info->queue_memory_base_dma_handle +
3631 (element_array - ctrl_info->queue_memory_base);
3632 element_array += PQI_NUM_EVENT_QUEUE_ELEMENTS *
3633 PQI_EVENT_OQ_ELEMENT_LENGTH;
3634
3635 next_queue_index = (void __iomem *)PTR_ALIGN(element_array,
3636 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3637
3638 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3639 queue_group = &ctrl_info->queue_groups[i];
3640 queue_group->iq_ci[RAID_PATH] = next_queue_index;
3641 queue_group->iq_ci_bus_addr[RAID_PATH] =
3642 ctrl_info->queue_memory_base_dma_handle +
3643 (next_queue_index -
3644 (void __iomem *)ctrl_info->queue_memory_base);
3645 next_queue_index += sizeof(pqi_index_t);
3646 next_queue_index = PTR_ALIGN(next_queue_index,
3647 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3648 queue_group->iq_ci[AIO_PATH] = next_queue_index;
3649 queue_group->iq_ci_bus_addr[AIO_PATH] =
3650 ctrl_info->queue_memory_base_dma_handle +
3651 (next_queue_index -
3652 (void __iomem *)ctrl_info->queue_memory_base);
3653 next_queue_index += sizeof(pqi_index_t);
3654 next_queue_index = PTR_ALIGN(next_queue_index,
3655 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3656 queue_group->oq_pi = next_queue_index;
3657 queue_group->oq_pi_bus_addr =
3658 ctrl_info->queue_memory_base_dma_handle +
3659 (next_queue_index -
3660 (void __iomem *)ctrl_info->queue_memory_base);
3661 next_queue_index += sizeof(pqi_index_t);
3662 next_queue_index = PTR_ALIGN(next_queue_index,
3663 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3664 }
3665
3666 ctrl_info->event_queue.oq_pi = next_queue_index;
3667 ctrl_info->event_queue.oq_pi_bus_addr =
3668 ctrl_info->queue_memory_base_dma_handle +
3669 (next_queue_index -
3670 (void __iomem *)ctrl_info->queue_memory_base);
3671
3672 return 0;
3673 }
3674
3675 static void pqi_init_operational_queues(struct pqi_ctrl_info *ctrl_info)
3676 {
3677 unsigned int i;
3678 u16 next_iq_id = PQI_MIN_OPERATIONAL_QUEUE_ID;
3679 u16 next_oq_id = PQI_MIN_OPERATIONAL_QUEUE_ID;
3680
3681 /*
3682 * Initialize the backpointers to the controller structure in
3683 * each operational queue group structure.
3684 */
3685 for (i = 0; i < ctrl_info->num_queue_groups; i++)
3686 ctrl_info->queue_groups[i].ctrl_info = ctrl_info;
3687
3688 /*
3689 * Assign IDs to all operational queues. Note that the IDs
3690 * assigned to operational IQs are independent of the IDs
3691 * assigned to operational OQs.
3692 */
3693 ctrl_info->event_queue.oq_id = next_oq_id++;
3694 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3695 ctrl_info->queue_groups[i].iq_id[RAID_PATH] = next_iq_id++;
3696 ctrl_info->queue_groups[i].iq_id[AIO_PATH] = next_iq_id++;
3697 ctrl_info->queue_groups[i].oq_id = next_oq_id++;
3698 }
3699
3700 /*
3701 * Assign MSI-X table entry indexes to all queues. Note that the
3702 * interrupt for the event queue is shared with the first queue group.
3703 */
3704 ctrl_info->event_queue.int_msg_num = 0;
3705 for (i = 0; i < ctrl_info->num_queue_groups; i++)
3706 ctrl_info->queue_groups[i].int_msg_num = i;
3707
3708 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3709 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[0]);
3710 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[1]);
3711 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[0]);
3712 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[1]);
3713 }
3714 }
3715
3716 static int pqi_alloc_admin_queues(struct pqi_ctrl_info *ctrl_info)
3717 {
3718 size_t alloc_length;
3719 struct pqi_admin_queues_aligned *admin_queues_aligned;
3720 struct pqi_admin_queues *admin_queues;
3721
3722 alloc_length = sizeof(struct pqi_admin_queues_aligned) +
3723 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT;
3724
3725 ctrl_info->admin_queue_memory_base =
3726 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length,
3727 &ctrl_info->admin_queue_memory_base_dma_handle,
3728 GFP_KERNEL);
3729
3730 if (!ctrl_info->admin_queue_memory_base)
3731 return -ENOMEM;
3732
3733 ctrl_info->admin_queue_memory_length = alloc_length;
3734
3735 admin_queues = &ctrl_info->admin_queues;
3736 admin_queues_aligned = PTR_ALIGN(ctrl_info->admin_queue_memory_base,
3737 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3738 admin_queues->iq_element_array =
3739 &admin_queues_aligned->iq_element_array;
3740 admin_queues->oq_element_array =
3741 &admin_queues_aligned->oq_element_array;
3742 admin_queues->iq_ci = &admin_queues_aligned->iq_ci;
3743 admin_queues->oq_pi =
3744 (pqi_index_t __iomem *)&admin_queues_aligned->oq_pi;
3745
3746 admin_queues->iq_element_array_bus_addr =
3747 ctrl_info->admin_queue_memory_base_dma_handle +
3748 (admin_queues->iq_element_array -
3749 ctrl_info->admin_queue_memory_base);
3750 admin_queues->oq_element_array_bus_addr =
3751 ctrl_info->admin_queue_memory_base_dma_handle +
3752 (admin_queues->oq_element_array -
3753 ctrl_info->admin_queue_memory_base);
3754 admin_queues->iq_ci_bus_addr =
3755 ctrl_info->admin_queue_memory_base_dma_handle +
3756 ((void *)admin_queues->iq_ci -
3757 ctrl_info->admin_queue_memory_base);
3758 admin_queues->oq_pi_bus_addr =
3759 ctrl_info->admin_queue_memory_base_dma_handle +
3760 ((void __iomem *)admin_queues->oq_pi -
3761 (void __iomem *)ctrl_info->admin_queue_memory_base);
3762
3763 return 0;
3764 }
3765
3766 #define PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES PQI_HZ
3767 #define PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS 1
3768
3769 static int pqi_create_admin_queues(struct pqi_ctrl_info *ctrl_info)
3770 {
3771 struct pqi_device_registers __iomem *pqi_registers;
3772 struct pqi_admin_queues *admin_queues;
3773 unsigned long timeout;
3774 u8 status;
3775 u32 reg;
3776
3777 pqi_registers = ctrl_info->pqi_registers;
3778 admin_queues = &ctrl_info->admin_queues;
3779
3780 writeq((u64)admin_queues->iq_element_array_bus_addr,
3781 &pqi_registers->admin_iq_element_array_addr);
3782 writeq((u64)admin_queues->oq_element_array_bus_addr,
3783 &pqi_registers->admin_oq_element_array_addr);
3784 writeq((u64)admin_queues->iq_ci_bus_addr,
3785 &pqi_registers->admin_iq_ci_addr);
3786 writeq((u64)admin_queues->oq_pi_bus_addr,
3787 &pqi_registers->admin_oq_pi_addr);
3788
3789 reg = PQI_ADMIN_IQ_NUM_ELEMENTS |
3790 (PQI_ADMIN_OQ_NUM_ELEMENTS) << 8 |
3791 (admin_queues->int_msg_num << 16);
3792 writel(reg, &pqi_registers->admin_iq_num_elements);
3793 writel(PQI_CREATE_ADMIN_QUEUE_PAIR,
3794 &pqi_registers->function_and_status_code);
3795
3796 timeout = PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES + jiffies;
3797 while (1) {
3798 status = readb(&pqi_registers->function_and_status_code);
3799 if (status == PQI_STATUS_IDLE)
3800 break;
3801 if (time_after(jiffies, timeout))
3802 return -ETIMEDOUT;
3803 msleep(PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS);
3804 }
3805
3806 /*
3807 * The offset registers are not initialized to the correct
3808 * offsets until *after* the create admin queue pair command
3809 * completes successfully.
3810 */
3811 admin_queues->iq_pi = ctrl_info->iomem_base +
3812 PQI_DEVICE_REGISTERS_OFFSET +
3813 readq(&pqi_registers->admin_iq_pi_offset);
3814 admin_queues->oq_ci = ctrl_info->iomem_base +
3815 PQI_DEVICE_REGISTERS_OFFSET +
3816 readq(&pqi_registers->admin_oq_ci_offset);
3817
3818 return 0;
3819 }
3820
3821 static void pqi_submit_admin_request(struct pqi_ctrl_info *ctrl_info,
3822 struct pqi_general_admin_request *request)
3823 {
3824 struct pqi_admin_queues *admin_queues;
3825 void *next_element;
3826 pqi_index_t iq_pi;
3827
3828 admin_queues = &ctrl_info->admin_queues;
3829 iq_pi = admin_queues->iq_pi_copy;
3830
3831 next_element = admin_queues->iq_element_array +
3832 (iq_pi * PQI_ADMIN_IQ_ELEMENT_LENGTH);
3833
3834 memcpy(next_element, request, sizeof(*request));
3835
3836 iq_pi = (iq_pi + 1) % PQI_ADMIN_IQ_NUM_ELEMENTS;
3837 admin_queues->iq_pi_copy = iq_pi;
3838
3839 /*
3840 * This write notifies the controller that an IU is available to be
3841 * processed.
3842 */
3843 writel(iq_pi, admin_queues->iq_pi);
3844 }
3845
3846 #define PQI_ADMIN_REQUEST_TIMEOUT_SECS 60
3847
3848 static int pqi_poll_for_admin_response(struct pqi_ctrl_info *ctrl_info,
3849 struct pqi_general_admin_response *response)
3850 {
3851 struct pqi_admin_queues *admin_queues;
3852 pqi_index_t oq_pi;
3853 pqi_index_t oq_ci;
3854 unsigned long timeout;
3855
3856 admin_queues = &ctrl_info->admin_queues;
3857 oq_ci = admin_queues->oq_ci_copy;
3858
3859 timeout = (PQI_ADMIN_REQUEST_TIMEOUT_SECS * PQI_HZ) + jiffies;
3860
3861 while (1) {
3862 oq_pi = readl(admin_queues->oq_pi);
3863 if (oq_pi != oq_ci)
3864 break;
3865 if (time_after(jiffies, timeout)) {
3866 dev_err(&ctrl_info->pci_dev->dev,
3867 "timed out waiting for admin response\n");
3868 return -ETIMEDOUT;
3869 }
3870 if (!sis_is_firmware_running(ctrl_info))
3871 return -ENXIO;
3872 usleep_range(1000, 2000);
3873 }
3874
3875 memcpy(response, admin_queues->oq_element_array +
3876 (oq_ci * PQI_ADMIN_OQ_ELEMENT_LENGTH), sizeof(*response));
3877
3878 oq_ci = (oq_ci + 1) % PQI_ADMIN_OQ_NUM_ELEMENTS;
3879 admin_queues->oq_ci_copy = oq_ci;
3880 writel(oq_ci, admin_queues->oq_ci);
3881
3882 return 0;
3883 }
3884
3885 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info,
3886 struct pqi_queue_group *queue_group, enum pqi_io_path path,
3887 struct pqi_io_request *io_request)
3888 {
3889 struct pqi_io_request *next;
3890 void *next_element;
3891 pqi_index_t iq_pi;
3892 pqi_index_t iq_ci;
3893 size_t iu_length;
3894 unsigned long flags;
3895 unsigned int num_elements_needed;
3896 unsigned int num_elements_to_end_of_queue;
3897 size_t copy_count;
3898 struct pqi_iu_header *request;
3899
3900 spin_lock_irqsave(&queue_group->submit_lock[path], flags);
3901
3902 if (io_request) {
3903 io_request->queue_group = queue_group;
3904 list_add_tail(&io_request->request_list_entry,
3905 &queue_group->request_list[path]);
3906 }
3907
3908 iq_pi = queue_group->iq_pi_copy[path];
3909
3910 list_for_each_entry_safe(io_request, next,
3911 &queue_group->request_list[path], request_list_entry) {
3912
3913 request = io_request->iu;
3914
3915 iu_length = get_unaligned_le16(&request->iu_length) +
3916 PQI_REQUEST_HEADER_LENGTH;
3917 num_elements_needed =
3918 DIV_ROUND_UP(iu_length,
3919 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
3920
3921 iq_ci = readl(queue_group->iq_ci[path]);
3922
3923 if (num_elements_needed > pqi_num_elements_free(iq_pi, iq_ci,
3924 ctrl_info->num_elements_per_iq))
3925 break;
3926
3927 put_unaligned_le16(queue_group->oq_id,
3928 &request->response_queue_id);
3929
3930 next_element = queue_group->iq_element_array[path] +
3931 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
3932
3933 num_elements_to_end_of_queue =
3934 ctrl_info->num_elements_per_iq - iq_pi;
3935
3936 if (num_elements_needed <= num_elements_to_end_of_queue) {
3937 memcpy(next_element, request, iu_length);
3938 } else {
3939 copy_count = num_elements_to_end_of_queue *
3940 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH;
3941 memcpy(next_element, request, copy_count);
3942 memcpy(queue_group->iq_element_array[path],
3943 (u8 *)request + copy_count,
3944 iu_length - copy_count);
3945 }
3946
3947 iq_pi = (iq_pi + num_elements_needed) %
3948 ctrl_info->num_elements_per_iq;
3949
3950 list_del(&io_request->request_list_entry);
3951 }
3952
3953 if (iq_pi != queue_group->iq_pi_copy[path]) {
3954 queue_group->iq_pi_copy[path] = iq_pi;
3955 /*
3956 * This write notifies the controller that one or more IUs are
3957 * available to be processed.
3958 */
3959 writel(iq_pi, queue_group->iq_pi[path]);
3960 }
3961
3962 spin_unlock_irqrestore(&queue_group->submit_lock[path], flags);
3963 }
3964
3965 #define PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS 10
3966
3967 static int pqi_wait_for_completion_io(struct pqi_ctrl_info *ctrl_info,
3968 struct completion *wait)
3969 {
3970 int rc;
3971
3972 while (1) {
3973 if (wait_for_completion_io_timeout(wait,
3974 PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS * PQI_HZ)) {
3975 rc = 0;
3976 break;
3977 }
3978
3979 pqi_check_ctrl_health(ctrl_info);
3980 if (pqi_ctrl_offline(ctrl_info)) {
3981 rc = -ENXIO;
3982 break;
3983 }
3984 }
3985
3986 return rc;
3987 }
3988
3989 static void pqi_raid_synchronous_complete(struct pqi_io_request *io_request,
3990 void *context)
3991 {
3992 struct completion *waiting = context;
3993
3994 complete(waiting);
3995 }
3996
3997 static int pqi_process_raid_io_error_synchronous(struct pqi_raid_error_info
3998 *error_info)
3999 {
4000 int rc = -EIO;
4001
4002 switch (error_info->data_out_result) {
4003 case PQI_DATA_IN_OUT_GOOD:
4004 if (error_info->status == SAM_STAT_GOOD)
4005 rc = 0;
4006 break;
4007 case PQI_DATA_IN_OUT_UNDERFLOW:
4008 if (error_info->status == SAM_STAT_GOOD ||
4009 error_info->status == SAM_STAT_CHECK_CONDITION)
4010 rc = 0;
4011 break;
4012 case PQI_DATA_IN_OUT_ABORTED:
4013 rc = PQI_CMD_STATUS_ABORTED;
4014 break;
4015 }
4016
4017 return rc;
4018 }
4019
4020 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info,
4021 struct pqi_iu_header *request, unsigned int flags,
4022 struct pqi_raid_error_info *error_info, unsigned long timeout_msecs)
4023 {
4024 int rc = 0;
4025 struct pqi_io_request *io_request;
4026 unsigned long start_jiffies;
4027 unsigned long msecs_blocked;
4028 size_t iu_length;
4029 DECLARE_COMPLETION_ONSTACK(wait);
4030
4031 /*
4032 * Note that specifying PQI_SYNC_FLAGS_INTERRUPTABLE and a timeout value
4033 * are mutually exclusive.
4034 */
4035
4036 if (flags & PQI_SYNC_FLAGS_INTERRUPTABLE) {
4037 if (down_interruptible(&ctrl_info->sync_request_sem))
4038 return -ERESTARTSYS;
4039 } else {
4040 if (timeout_msecs == NO_TIMEOUT) {
4041 down(&ctrl_info->sync_request_sem);
4042 } else {
4043 start_jiffies = jiffies;
4044 if (down_timeout(&ctrl_info->sync_request_sem,
4045 msecs_to_jiffies(timeout_msecs)))
4046 return -ETIMEDOUT;
4047 msecs_blocked =
4048 jiffies_to_msecs(jiffies - start_jiffies);
4049 if (msecs_blocked >= timeout_msecs) {
4050 rc = -ETIMEDOUT;
4051 goto out;
4052 }
4053 timeout_msecs -= msecs_blocked;
4054 }
4055 }
4056
4057 pqi_ctrl_busy(ctrl_info);
4058 timeout_msecs = pqi_wait_if_ctrl_blocked(ctrl_info, timeout_msecs);
4059 if (timeout_msecs == 0) {
4060 pqi_ctrl_unbusy(ctrl_info);
4061 rc = -ETIMEDOUT;
4062 goto out;
4063 }
4064
4065 if (pqi_ctrl_offline(ctrl_info)) {
4066 pqi_ctrl_unbusy(ctrl_info);
4067 rc = -ENXIO;
4068 goto out;
4069 }
4070
4071 io_request = pqi_alloc_io_request(ctrl_info);
4072
4073 put_unaligned_le16(io_request->index,
4074 &(((struct pqi_raid_path_request *)request)->request_id));
4075
4076 if (request->iu_type == PQI_REQUEST_IU_RAID_PATH_IO)
4077 ((struct pqi_raid_path_request *)request)->error_index =
4078 ((struct pqi_raid_path_request *)request)->request_id;
4079
4080 iu_length = get_unaligned_le16(&request->iu_length) +
4081 PQI_REQUEST_HEADER_LENGTH;
4082 memcpy(io_request->iu, request, iu_length);
4083
4084 io_request->io_complete_callback = pqi_raid_synchronous_complete;
4085 io_request->context = &wait;
4086
4087 pqi_start_io(ctrl_info,
4088 &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH,
4089 io_request);
4090
4091 pqi_ctrl_unbusy(ctrl_info);
4092
4093 if (timeout_msecs == NO_TIMEOUT) {
4094 pqi_wait_for_completion_io(ctrl_info, &wait);
4095 } else {
4096 if (!wait_for_completion_io_timeout(&wait,
4097 msecs_to_jiffies(timeout_msecs))) {
4098 dev_warn(&ctrl_info->pci_dev->dev,
4099 "command timed out\n");
4100 rc = -ETIMEDOUT;
4101 }
4102 }
4103
4104 if (error_info) {
4105 if (io_request->error_info)
4106 memcpy(error_info, io_request->error_info,
4107 sizeof(*error_info));
4108 else
4109 memset(error_info, 0, sizeof(*error_info));
4110 } else if (rc == 0 && io_request->error_info) {
4111 rc = pqi_process_raid_io_error_synchronous(
4112 io_request->error_info);
4113 }
4114
4115 pqi_free_io_request(io_request);
4116
4117 out:
4118 up(&ctrl_info->sync_request_sem);
4119
4120 return rc;
4121 }
4122
4123 static int pqi_validate_admin_response(
4124 struct pqi_general_admin_response *response, u8 expected_function_code)
4125 {
4126 if (response->header.iu_type != PQI_RESPONSE_IU_GENERAL_ADMIN)
4127 return -EINVAL;
4128
4129 if (get_unaligned_le16(&response->header.iu_length) !=
4130 PQI_GENERAL_ADMIN_IU_LENGTH)
4131 return -EINVAL;
4132
4133 if (response->function_code != expected_function_code)
4134 return -EINVAL;
4135
4136 if (response->status != PQI_GENERAL_ADMIN_STATUS_SUCCESS)
4137 return -EINVAL;
4138
4139 return 0;
4140 }
4141
4142 static int pqi_submit_admin_request_synchronous(
4143 struct pqi_ctrl_info *ctrl_info,
4144 struct pqi_general_admin_request *request,
4145 struct pqi_general_admin_response *response)
4146 {
4147 int rc;
4148
4149 pqi_submit_admin_request(ctrl_info, request);
4150
4151 rc = pqi_poll_for_admin_response(ctrl_info, response);
4152
4153 if (rc == 0)
4154 rc = pqi_validate_admin_response(response,
4155 request->function_code);
4156
4157 return rc;
4158 }
4159
4160 static int pqi_report_device_capability(struct pqi_ctrl_info *ctrl_info)
4161 {
4162 int rc;
4163 struct pqi_general_admin_request request;
4164 struct pqi_general_admin_response response;
4165 struct pqi_device_capability *capability;
4166 struct pqi_iu_layer_descriptor *sop_iu_layer_descriptor;
4167
4168 capability = kmalloc(sizeof(*capability), GFP_KERNEL);
4169 if (!capability)
4170 return -ENOMEM;
4171
4172 memset(&request, 0, sizeof(request));
4173
4174 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4175 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4176 &request.header.iu_length);
4177 request.function_code =
4178 PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY;
4179 put_unaligned_le32(sizeof(*capability),
4180 &request.data.report_device_capability.buffer_length);
4181
4182 rc = pqi_map_single(ctrl_info->pci_dev,
4183 &request.data.report_device_capability.sg_descriptor,
4184 capability, sizeof(*capability),
4185 DMA_FROM_DEVICE);
4186 if (rc)
4187 goto out;
4188
4189 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4190 &response);
4191
4192 pqi_pci_unmap(ctrl_info->pci_dev,
4193 &request.data.report_device_capability.sg_descriptor, 1,
4194 DMA_FROM_DEVICE);
4195
4196 if (rc)
4197 goto out;
4198
4199 if (response.status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) {
4200 rc = -EIO;
4201 goto out;
4202 }
4203
4204 ctrl_info->max_inbound_queues =
4205 get_unaligned_le16(&capability->max_inbound_queues);
4206 ctrl_info->max_elements_per_iq =
4207 get_unaligned_le16(&capability->max_elements_per_iq);
4208 ctrl_info->max_iq_element_length =
4209 get_unaligned_le16(&capability->max_iq_element_length)
4210 * 16;
4211 ctrl_info->max_outbound_queues =
4212 get_unaligned_le16(&capability->max_outbound_queues);
4213 ctrl_info->max_elements_per_oq =
4214 get_unaligned_le16(&capability->max_elements_per_oq);
4215 ctrl_info->max_oq_element_length =
4216 get_unaligned_le16(&capability->max_oq_element_length)
4217 * 16;
4218
4219 sop_iu_layer_descriptor =
4220 &capability->iu_layer_descriptors[PQI_PROTOCOL_SOP];
4221
4222 ctrl_info->max_inbound_iu_length_per_firmware =
4223 get_unaligned_le16(
4224 &sop_iu_layer_descriptor->max_inbound_iu_length);
4225 ctrl_info->inbound_spanning_supported =
4226 sop_iu_layer_descriptor->inbound_spanning_supported;
4227 ctrl_info->outbound_spanning_supported =
4228 sop_iu_layer_descriptor->outbound_spanning_supported;
4229
4230 out:
4231 kfree(capability);
4232
4233 return rc;
4234 }
4235
4236 static int pqi_validate_device_capability(struct pqi_ctrl_info *ctrl_info)
4237 {
4238 if (ctrl_info->max_iq_element_length <
4239 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) {
4240 dev_err(&ctrl_info->pci_dev->dev,
4241 "max. inbound queue element length of %d is less than the required length of %d\n",
4242 ctrl_info->max_iq_element_length,
4243 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4244 return -EINVAL;
4245 }
4246
4247 if (ctrl_info->max_oq_element_length <
4248 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH) {
4249 dev_err(&ctrl_info->pci_dev->dev,
4250 "max. outbound queue element length of %d is less than the required length of %d\n",
4251 ctrl_info->max_oq_element_length,
4252 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH);
4253 return -EINVAL;
4254 }
4255
4256 if (ctrl_info->max_inbound_iu_length_per_firmware <
4257 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) {
4258 dev_err(&ctrl_info->pci_dev->dev,
4259 "max. inbound IU length of %u is less than the min. required length of %d\n",
4260 ctrl_info->max_inbound_iu_length_per_firmware,
4261 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4262 return -EINVAL;
4263 }
4264
4265 if (!ctrl_info->inbound_spanning_supported) {
4266 dev_err(&ctrl_info->pci_dev->dev,
4267 "the controller does not support inbound spanning\n");
4268 return -EINVAL;
4269 }
4270
4271 if (ctrl_info->outbound_spanning_supported) {
4272 dev_err(&ctrl_info->pci_dev->dev,
4273 "the controller supports outbound spanning but this driver does not\n");
4274 return -EINVAL;
4275 }
4276
4277 return 0;
4278 }
4279
4280 static int pqi_create_event_queue(struct pqi_ctrl_info *ctrl_info)
4281 {
4282 int rc;
4283 struct pqi_event_queue *event_queue;
4284 struct pqi_general_admin_request request;
4285 struct pqi_general_admin_response response;
4286
4287 event_queue = &ctrl_info->event_queue;
4288
4289 /*
4290 * Create OQ (Outbound Queue - device to host queue) to dedicate
4291 * to events.
4292 */
4293 memset(&request, 0, sizeof(request));
4294 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4295 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4296 &request.header.iu_length);
4297 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ;
4298 put_unaligned_le16(event_queue->oq_id,
4299 &request.data.create_operational_oq.queue_id);
4300 put_unaligned_le64((u64)event_queue->oq_element_array_bus_addr,
4301 &request.data.create_operational_oq.element_array_addr);
4302 put_unaligned_le64((u64)event_queue->oq_pi_bus_addr,
4303 &request.data.create_operational_oq.pi_addr);
4304 put_unaligned_le16(PQI_NUM_EVENT_QUEUE_ELEMENTS,
4305 &request.data.create_operational_oq.num_elements);
4306 put_unaligned_le16(PQI_EVENT_OQ_ELEMENT_LENGTH / 16,
4307 &request.data.create_operational_oq.element_length);
4308 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP;
4309 put_unaligned_le16(event_queue->int_msg_num,
4310 &request.data.create_operational_oq.int_msg_num);
4311
4312 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4313 &response);
4314 if (rc)
4315 return rc;
4316
4317 event_queue->oq_ci = ctrl_info->iomem_base +
4318 PQI_DEVICE_REGISTERS_OFFSET +
4319 get_unaligned_le64(
4320 &response.data.create_operational_oq.oq_ci_offset);
4321
4322 return 0;
4323 }
4324
4325 static int pqi_create_queue_group(struct pqi_ctrl_info *ctrl_info,
4326 unsigned int group_number)
4327 {
4328 int rc;
4329 struct pqi_queue_group *queue_group;
4330 struct pqi_general_admin_request request;
4331 struct pqi_general_admin_response response;
4332
4333 queue_group = &ctrl_info->queue_groups[group_number];
4334
4335 /*
4336 * Create IQ (Inbound Queue - host to device queue) for
4337 * RAID path.
4338 */
4339 memset(&request, 0, sizeof(request));
4340 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4341 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4342 &request.header.iu_length);
4343 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ;
4344 put_unaligned_le16(queue_group->iq_id[RAID_PATH],
4345 &request.data.create_operational_iq.queue_id);
4346 put_unaligned_le64(
4347 (u64)queue_group->iq_element_array_bus_addr[RAID_PATH],
4348 &request.data.create_operational_iq.element_array_addr);
4349 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[RAID_PATH],
4350 &request.data.create_operational_iq.ci_addr);
4351 put_unaligned_le16(ctrl_info->num_elements_per_iq,
4352 &request.data.create_operational_iq.num_elements);
4353 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16,
4354 &request.data.create_operational_iq.element_length);
4355 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP;
4356
4357 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4358 &response);
4359 if (rc) {
4360 dev_err(&ctrl_info->pci_dev->dev,
4361 "error creating inbound RAID queue\n");
4362 return rc;
4363 }
4364
4365 queue_group->iq_pi[RAID_PATH] = ctrl_info->iomem_base +
4366 PQI_DEVICE_REGISTERS_OFFSET +
4367 get_unaligned_le64(
4368 &response.data.create_operational_iq.iq_pi_offset);
4369
4370 /*
4371 * Create IQ (Inbound Queue - host to device queue) for
4372 * Advanced I/O (AIO) path.
4373 */
4374 memset(&request, 0, sizeof(request));
4375 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4376 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4377 &request.header.iu_length);
4378 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ;
4379 put_unaligned_le16(queue_group->iq_id[AIO_PATH],
4380 &request.data.create_operational_iq.queue_id);
4381 put_unaligned_le64((u64)queue_group->
4382 iq_element_array_bus_addr[AIO_PATH],
4383 &request.data.create_operational_iq.element_array_addr);
4384 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[AIO_PATH],
4385 &request.data.create_operational_iq.ci_addr);
4386 put_unaligned_le16(ctrl_info->num_elements_per_iq,
4387 &request.data.create_operational_iq.num_elements);
4388 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16,
4389 &request.data.create_operational_iq.element_length);
4390 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP;
4391
4392 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4393 &response);
4394 if (rc) {
4395 dev_err(&ctrl_info->pci_dev->dev,
4396 "error creating inbound AIO queue\n");
4397 return rc;
4398 }
4399
4400 queue_group->iq_pi[AIO_PATH] = ctrl_info->iomem_base +
4401 PQI_DEVICE_REGISTERS_OFFSET +
4402 get_unaligned_le64(
4403 &response.data.create_operational_iq.iq_pi_offset);
4404
4405 /*
4406 * Designate the 2nd IQ as the AIO path. By default, all IQs are
4407 * assumed to be for RAID path I/O unless we change the queue's
4408 * property.
4409 */
4410 memset(&request, 0, sizeof(request));
4411 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4412 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4413 &request.header.iu_length);
4414 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY;
4415 put_unaligned_le16(queue_group->iq_id[AIO_PATH],
4416 &request.data.change_operational_iq_properties.queue_id);
4417 put_unaligned_le32(PQI_IQ_PROPERTY_IS_AIO_QUEUE,
4418 &request.data.change_operational_iq_properties.vendor_specific);
4419
4420 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4421 &response);
4422 if (rc) {
4423 dev_err(&ctrl_info->pci_dev->dev,
4424 "error changing queue property\n");
4425 return rc;
4426 }
4427
4428 /*
4429 * Create OQ (Outbound Queue - device to host queue).
4430 */
4431 memset(&request, 0, sizeof(request));
4432 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4433 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4434 &request.header.iu_length);
4435 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ;
4436 put_unaligned_le16(queue_group->oq_id,
4437 &request.data.create_operational_oq.queue_id);
4438 put_unaligned_le64((u64)queue_group->oq_element_array_bus_addr,
4439 &request.data.create_operational_oq.element_array_addr);
4440 put_unaligned_le64((u64)queue_group->oq_pi_bus_addr,
4441 &request.data.create_operational_oq.pi_addr);
4442 put_unaligned_le16(ctrl_info->num_elements_per_oq,
4443 &request.data.create_operational_oq.num_elements);
4444 put_unaligned_le16(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH / 16,
4445 &request.data.create_operational_oq.element_length);
4446 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP;
4447 put_unaligned_le16(queue_group->int_msg_num,
4448 &request.data.create_operational_oq.int_msg_num);
4449
4450 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4451 &response);
4452 if (rc) {
4453 dev_err(&ctrl_info->pci_dev->dev,
4454 "error creating outbound queue\n");
4455 return rc;
4456 }
4457
4458 queue_group->oq_ci = ctrl_info->iomem_base +
4459 PQI_DEVICE_REGISTERS_OFFSET +
4460 get_unaligned_le64(
4461 &response.data.create_operational_oq.oq_ci_offset);
4462
4463 return 0;
4464 }
4465
4466 static int pqi_create_queues(struct pqi_ctrl_info *ctrl_info)
4467 {
4468 int rc;
4469 unsigned int i;
4470
4471 rc = pqi_create_event_queue(ctrl_info);
4472 if (rc) {
4473 dev_err(&ctrl_info->pci_dev->dev,
4474 "error creating event queue\n");
4475 return rc;
4476 }
4477
4478 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
4479 rc = pqi_create_queue_group(ctrl_info, i);
4480 if (rc) {
4481 dev_err(&ctrl_info->pci_dev->dev,
4482 "error creating queue group number %u/%u\n",
4483 i, ctrl_info->num_queue_groups);
4484 return rc;
4485 }
4486 }
4487
4488 return 0;
4489 }
4490
4491 #define PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH \
4492 (offsetof(struct pqi_event_config, descriptors) + \
4493 (PQI_MAX_EVENT_DESCRIPTORS * sizeof(struct pqi_event_descriptor)))
4494
4495 static int pqi_configure_events(struct pqi_ctrl_info *ctrl_info,
4496 bool enable_events)
4497 {
4498 int rc;
4499 unsigned int i;
4500 struct pqi_event_config *event_config;
4501 struct pqi_event_descriptor *event_descriptor;
4502 struct pqi_general_management_request request;
4503
4504 event_config = kmalloc(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4505 GFP_KERNEL);
4506 if (!event_config)
4507 return -ENOMEM;
4508
4509 memset(&request, 0, sizeof(request));
4510
4511 request.header.iu_type = PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG;
4512 put_unaligned_le16(offsetof(struct pqi_general_management_request,
4513 data.report_event_configuration.sg_descriptors[1]) -
4514 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length);
4515 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4516 &request.data.report_event_configuration.buffer_length);
4517
4518 rc = pqi_map_single(ctrl_info->pci_dev,
4519 request.data.report_event_configuration.sg_descriptors,
4520 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4521 DMA_FROM_DEVICE);
4522 if (rc)
4523 goto out;
4524
4525 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
4526 0, NULL, NO_TIMEOUT);
4527
4528 pqi_pci_unmap(ctrl_info->pci_dev,
4529 request.data.report_event_configuration.sg_descriptors, 1,
4530 DMA_FROM_DEVICE);
4531
4532 if (rc)
4533 goto out;
4534
4535 for (i = 0; i < event_config->num_event_descriptors; i++) {
4536 event_descriptor = &event_config->descriptors[i];
4537 if (enable_events &&
4538 pqi_is_supported_event(event_descriptor->event_type))
4539 put_unaligned_le16(ctrl_info->event_queue.oq_id,
4540 &event_descriptor->oq_id);
4541 else
4542 put_unaligned_le16(0, &event_descriptor->oq_id);
4543 }
4544
4545 memset(&request, 0, sizeof(request));
4546
4547 request.header.iu_type = PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG;
4548 put_unaligned_le16(offsetof(struct pqi_general_management_request,
4549 data.report_event_configuration.sg_descriptors[1]) -
4550 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length);
4551 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4552 &request.data.report_event_configuration.buffer_length);
4553
4554 rc = pqi_map_single(ctrl_info->pci_dev,
4555 request.data.report_event_configuration.sg_descriptors,
4556 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4557 DMA_TO_DEVICE);
4558 if (rc)
4559 goto out;
4560
4561 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0,
4562 NULL, NO_TIMEOUT);
4563
4564 pqi_pci_unmap(ctrl_info->pci_dev,
4565 request.data.report_event_configuration.sg_descriptors, 1,
4566 DMA_TO_DEVICE);
4567
4568 out:
4569 kfree(event_config);
4570
4571 return rc;
4572 }
4573
4574 static inline int pqi_enable_events(struct pqi_ctrl_info *ctrl_info)
4575 {
4576 return pqi_configure_events(ctrl_info, true);
4577 }
4578
4579 static inline int pqi_disable_events(struct pqi_ctrl_info *ctrl_info)
4580 {
4581 return pqi_configure_events(ctrl_info, false);
4582 }
4583
4584 static void pqi_free_all_io_requests(struct pqi_ctrl_info *ctrl_info)
4585 {
4586 unsigned int i;
4587 struct device *dev;
4588 size_t sg_chain_buffer_length;
4589 struct pqi_io_request *io_request;
4590
4591 if (!ctrl_info->io_request_pool)
4592 return;
4593
4594 dev = &ctrl_info->pci_dev->dev;
4595 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length;
4596 io_request = ctrl_info->io_request_pool;
4597
4598 for (i = 0; i < ctrl_info->max_io_slots; i++) {
4599 kfree(io_request->iu);
4600 if (!io_request->sg_chain_buffer)
4601 break;
4602 dma_free_coherent(dev, sg_chain_buffer_length,
4603 io_request->sg_chain_buffer,
4604 io_request->sg_chain_buffer_dma_handle);
4605 io_request++;
4606 }
4607
4608 kfree(ctrl_info->io_request_pool);
4609 ctrl_info->io_request_pool = NULL;
4610 }
4611
4612 static inline int pqi_alloc_error_buffer(struct pqi_ctrl_info *ctrl_info)
4613 {
4614 ctrl_info->error_buffer = dma_alloc_coherent(&ctrl_info->pci_dev->dev,
4615 ctrl_info->error_buffer_length,
4616 &ctrl_info->error_buffer_dma_handle,
4617 GFP_KERNEL);
4618
4619 if (!ctrl_info->error_buffer)
4620 return -ENOMEM;
4621
4622 return 0;
4623 }
4624
4625 static int pqi_alloc_io_resources(struct pqi_ctrl_info *ctrl_info)
4626 {
4627 unsigned int i;
4628 void *sg_chain_buffer;
4629 size_t sg_chain_buffer_length;
4630 dma_addr_t sg_chain_buffer_dma_handle;
4631 struct device *dev;
4632 struct pqi_io_request *io_request;
4633
4634 ctrl_info->io_request_pool =
4635 kcalloc(ctrl_info->max_io_slots,
4636 sizeof(ctrl_info->io_request_pool[0]), GFP_KERNEL);
4637
4638 if (!ctrl_info->io_request_pool) {
4639 dev_err(&ctrl_info->pci_dev->dev,
4640 "failed to allocate I/O request pool\n");
4641 goto error;
4642 }
4643
4644 dev = &ctrl_info->pci_dev->dev;
4645 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length;
4646 io_request = ctrl_info->io_request_pool;
4647
4648 for (i = 0; i < ctrl_info->max_io_slots; i++) {
4649 io_request->iu =
4650 kmalloc(ctrl_info->max_inbound_iu_length, GFP_KERNEL);
4651
4652 if (!io_request->iu) {
4653 dev_err(&ctrl_info->pci_dev->dev,
4654 "failed to allocate IU buffers\n");
4655 goto error;
4656 }
4657
4658 sg_chain_buffer = dma_alloc_coherent(dev,
4659 sg_chain_buffer_length, &sg_chain_buffer_dma_handle,
4660 GFP_KERNEL);
4661
4662 if (!sg_chain_buffer) {
4663 dev_err(&ctrl_info->pci_dev->dev,
4664 "failed to allocate PQI scatter-gather chain buffers\n");
4665 goto error;
4666 }
4667
4668 io_request->index = i;
4669 io_request->sg_chain_buffer = sg_chain_buffer;
4670 io_request->sg_chain_buffer_dma_handle =
4671 sg_chain_buffer_dma_handle;
4672 io_request++;
4673 }
4674
4675 return 0;
4676
4677 error:
4678 pqi_free_all_io_requests(ctrl_info);
4679
4680 return -ENOMEM;
4681 }
4682
4683 /*
4684 * Calculate required resources that are sized based on max. outstanding
4685 * requests and max. transfer size.
4686 */
4687
4688 static void pqi_calculate_io_resources(struct pqi_ctrl_info *ctrl_info)
4689 {
4690 u32 max_transfer_size;
4691 u32 max_sg_entries;
4692
4693 ctrl_info->scsi_ml_can_queue =
4694 ctrl_info->max_outstanding_requests - PQI_RESERVED_IO_SLOTS;
4695 ctrl_info->max_io_slots = ctrl_info->max_outstanding_requests;
4696
4697 ctrl_info->error_buffer_length =
4698 ctrl_info->max_io_slots * PQI_ERROR_BUFFER_ELEMENT_LENGTH;
4699
4700 if (reset_devices)
4701 max_transfer_size = min(ctrl_info->max_transfer_size,
4702 PQI_MAX_TRANSFER_SIZE_KDUMP);
4703 else
4704 max_transfer_size = min(ctrl_info->max_transfer_size,
4705 PQI_MAX_TRANSFER_SIZE);
4706
4707 max_sg_entries = max_transfer_size / PAGE_SIZE;
4708
4709 /* +1 to cover when the buffer is not page-aligned. */
4710 max_sg_entries++;
4711
4712 max_sg_entries = min(ctrl_info->max_sg_entries, max_sg_entries);
4713
4714 max_transfer_size = (max_sg_entries - 1) * PAGE_SIZE;
4715
4716 ctrl_info->sg_chain_buffer_length =
4717 (max_sg_entries * sizeof(struct pqi_sg_descriptor)) +
4718 PQI_EXTRA_SGL_MEMORY;
4719 ctrl_info->sg_tablesize = max_sg_entries;
4720 ctrl_info->max_sectors = max_transfer_size / 512;
4721 }
4722
4723 static void pqi_calculate_queue_resources(struct pqi_ctrl_info *ctrl_info)
4724 {
4725 int num_queue_groups;
4726 u16 num_elements_per_iq;
4727 u16 num_elements_per_oq;
4728
4729 if (reset_devices) {
4730 num_queue_groups = 1;
4731 } else {
4732 int num_cpus;
4733 int max_queue_groups;
4734
4735 max_queue_groups = min(ctrl_info->max_inbound_queues / 2,
4736 ctrl_info->max_outbound_queues - 1);
4737 max_queue_groups = min(max_queue_groups, PQI_MAX_QUEUE_GROUPS);
4738
4739 num_cpus = num_online_cpus();
4740 num_queue_groups = min(num_cpus, ctrl_info->max_msix_vectors);
4741 num_queue_groups = min(num_queue_groups, max_queue_groups);
4742 }
4743
4744 ctrl_info->num_queue_groups = num_queue_groups;
4745 ctrl_info->max_hw_queue_index = num_queue_groups - 1;
4746
4747 /*
4748 * Make sure that the max. inbound IU length is an even multiple
4749 * of our inbound element length.
4750 */
4751 ctrl_info->max_inbound_iu_length =
4752 (ctrl_info->max_inbound_iu_length_per_firmware /
4753 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) *
4754 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH;
4755
4756 num_elements_per_iq =
4757 (ctrl_info->max_inbound_iu_length /
4758 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4759
4760 /* Add one because one element in each queue is unusable. */
4761 num_elements_per_iq++;
4762
4763 num_elements_per_iq = min(num_elements_per_iq,
4764 ctrl_info->max_elements_per_iq);
4765
4766 num_elements_per_oq = ((num_elements_per_iq - 1) * 2) + 1;
4767 num_elements_per_oq = min(num_elements_per_oq,
4768 ctrl_info->max_elements_per_oq);
4769
4770 ctrl_info->num_elements_per_iq = num_elements_per_iq;
4771 ctrl_info->num_elements_per_oq = num_elements_per_oq;
4772
4773 ctrl_info->max_sg_per_iu =
4774 ((ctrl_info->max_inbound_iu_length -
4775 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) /
4776 sizeof(struct pqi_sg_descriptor)) +
4777 PQI_MAX_EMBEDDED_SG_DESCRIPTORS;
4778 }
4779
4780 static inline void pqi_set_sg_descriptor(
4781 struct pqi_sg_descriptor *sg_descriptor, struct scatterlist *sg)
4782 {
4783 u64 address = (u64)sg_dma_address(sg);
4784 unsigned int length = sg_dma_len(sg);
4785
4786 put_unaligned_le64(address, &sg_descriptor->address);
4787 put_unaligned_le32(length, &sg_descriptor->length);
4788 put_unaligned_le32(0, &sg_descriptor->flags);
4789 }
4790
4791 static int pqi_build_raid_sg_list(struct pqi_ctrl_info *ctrl_info,
4792 struct pqi_raid_path_request *request, struct scsi_cmnd *scmd,
4793 struct pqi_io_request *io_request)
4794 {
4795 int i;
4796 u16 iu_length;
4797 int sg_count;
4798 bool chained;
4799 unsigned int num_sg_in_iu;
4800 unsigned int max_sg_per_iu;
4801 struct scatterlist *sg;
4802 struct pqi_sg_descriptor *sg_descriptor;
4803
4804 sg_count = scsi_dma_map(scmd);
4805 if (sg_count < 0)
4806 return sg_count;
4807
4808 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) -
4809 PQI_REQUEST_HEADER_LENGTH;
4810
4811 if (sg_count == 0)
4812 goto out;
4813
4814 sg = scsi_sglist(scmd);
4815 sg_descriptor = request->sg_descriptors;
4816 max_sg_per_iu = ctrl_info->max_sg_per_iu - 1;
4817 chained = false;
4818 num_sg_in_iu = 0;
4819 i = 0;
4820
4821 while (1) {
4822 pqi_set_sg_descriptor(sg_descriptor, sg);
4823 if (!chained)
4824 num_sg_in_iu++;
4825 i++;
4826 if (i == sg_count)
4827 break;
4828 sg_descriptor++;
4829 if (i == max_sg_per_iu) {
4830 put_unaligned_le64(
4831 (u64)io_request->sg_chain_buffer_dma_handle,
4832 &sg_descriptor->address);
4833 put_unaligned_le32((sg_count - num_sg_in_iu)
4834 * sizeof(*sg_descriptor),
4835 &sg_descriptor->length);
4836 put_unaligned_le32(CISS_SG_CHAIN,
4837 &sg_descriptor->flags);
4838 chained = true;
4839 num_sg_in_iu++;
4840 sg_descriptor = io_request->sg_chain_buffer;
4841 }
4842 sg = sg_next(sg);
4843 }
4844
4845 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags);
4846 request->partial = chained;
4847 iu_length += num_sg_in_iu * sizeof(*sg_descriptor);
4848
4849 out:
4850 put_unaligned_le16(iu_length, &request->header.iu_length);
4851
4852 return 0;
4853 }
4854
4855 static int pqi_build_aio_sg_list(struct pqi_ctrl_info *ctrl_info,
4856 struct pqi_aio_path_request *request, struct scsi_cmnd *scmd,
4857 struct pqi_io_request *io_request)
4858 {
4859 int i;
4860 u16 iu_length;
4861 int sg_count;
4862 bool chained;
4863 unsigned int num_sg_in_iu;
4864 unsigned int max_sg_per_iu;
4865 struct scatterlist *sg;
4866 struct pqi_sg_descriptor *sg_descriptor;
4867
4868 sg_count = scsi_dma_map(scmd);
4869 if (sg_count < 0)
4870 return sg_count;
4871
4872 iu_length = offsetof(struct pqi_aio_path_request, sg_descriptors) -
4873 PQI_REQUEST_HEADER_LENGTH;
4874 num_sg_in_iu = 0;
4875
4876 if (sg_count == 0)
4877 goto out;
4878
4879 sg = scsi_sglist(scmd);
4880 sg_descriptor = request->sg_descriptors;
4881 max_sg_per_iu = ctrl_info->max_sg_per_iu - 1;
4882 chained = false;
4883 i = 0;
4884
4885 while (1) {
4886 pqi_set_sg_descriptor(sg_descriptor, sg);
4887 if (!chained)
4888 num_sg_in_iu++;
4889 i++;
4890 if (i == sg_count)
4891 break;
4892 sg_descriptor++;
4893 if (i == max_sg_per_iu) {
4894 put_unaligned_le64(
4895 (u64)io_request->sg_chain_buffer_dma_handle,
4896 &sg_descriptor->address);
4897 put_unaligned_le32((sg_count - num_sg_in_iu)
4898 * sizeof(*sg_descriptor),
4899 &sg_descriptor->length);
4900 put_unaligned_le32(CISS_SG_CHAIN,
4901 &sg_descriptor->flags);
4902 chained = true;
4903 num_sg_in_iu++;
4904 sg_descriptor = io_request->sg_chain_buffer;
4905 }
4906 sg = sg_next(sg);
4907 }
4908
4909 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags);
4910 request->partial = chained;
4911 iu_length += num_sg_in_iu * sizeof(*sg_descriptor);
4912
4913 out:
4914 put_unaligned_le16(iu_length, &request->header.iu_length);
4915 request->num_sg_descriptors = num_sg_in_iu;
4916
4917 return 0;
4918 }
4919
4920 static void pqi_raid_io_complete(struct pqi_io_request *io_request,
4921 void *context)
4922 {
4923 struct scsi_cmnd *scmd;
4924
4925 scmd = io_request->scmd;
4926 pqi_free_io_request(io_request);
4927 scsi_dma_unmap(scmd);
4928 pqi_scsi_done(scmd);
4929 }
4930
4931 static int pqi_raid_submit_scsi_cmd_with_io_request(
4932 struct pqi_ctrl_info *ctrl_info, struct pqi_io_request *io_request,
4933 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
4934 struct pqi_queue_group *queue_group)
4935 {
4936 int rc;
4937 size_t cdb_length;
4938 struct pqi_raid_path_request *request;
4939
4940 io_request->io_complete_callback = pqi_raid_io_complete;
4941 io_request->scmd = scmd;
4942
4943 request = io_request->iu;
4944 memset(request, 0,
4945 offsetof(struct pqi_raid_path_request, sg_descriptors));
4946
4947 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
4948 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length);
4949 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
4950 put_unaligned_le16(io_request->index, &request->request_id);
4951 request->error_index = request->request_id;
4952 memcpy(request->lun_number, device->scsi3addr,
4953 sizeof(request->lun_number));
4954
4955 cdb_length = min_t(size_t, scmd->cmd_len, sizeof(request->cdb));
4956 memcpy(request->cdb, scmd->cmnd, cdb_length);
4957
4958 switch (cdb_length) {
4959 case 6:
4960 case 10:
4961 case 12:
4962 case 16:
4963 /* No bytes in the Additional CDB bytes field */
4964 request->additional_cdb_bytes_usage =
4965 SOP_ADDITIONAL_CDB_BYTES_0;
4966 break;
4967 case 20:
4968 /* 4 bytes in the Additional cdb field */
4969 request->additional_cdb_bytes_usage =
4970 SOP_ADDITIONAL_CDB_BYTES_4;
4971 break;
4972 case 24:
4973 /* 8 bytes in the Additional cdb field */
4974 request->additional_cdb_bytes_usage =
4975 SOP_ADDITIONAL_CDB_BYTES_8;
4976 break;
4977 case 28:
4978 /* 12 bytes in the Additional cdb field */
4979 request->additional_cdb_bytes_usage =
4980 SOP_ADDITIONAL_CDB_BYTES_12;
4981 break;
4982 case 32:
4983 default:
4984 /* 16 bytes in the Additional cdb field */
4985 request->additional_cdb_bytes_usage =
4986 SOP_ADDITIONAL_CDB_BYTES_16;
4987 break;
4988 }
4989
4990 switch (scmd->sc_data_direction) {
4991 case DMA_TO_DEVICE:
4992 request->data_direction = SOP_READ_FLAG;
4993 break;
4994 case DMA_FROM_DEVICE:
4995 request->data_direction = SOP_WRITE_FLAG;
4996 break;
4997 case DMA_NONE:
4998 request->data_direction = SOP_NO_DIRECTION_FLAG;
4999 break;
5000 case DMA_BIDIRECTIONAL:
5001 request->data_direction = SOP_BIDIRECTIONAL;
5002 break;
5003 default:
5004 dev_err(&ctrl_info->pci_dev->dev,
5005 "unknown data direction: %d\n",
5006 scmd->sc_data_direction);
5007 break;
5008 }
5009
5010 rc = pqi_build_raid_sg_list(ctrl_info, request, scmd, io_request);
5011 if (rc) {
5012 pqi_free_io_request(io_request);
5013 return SCSI_MLQUEUE_HOST_BUSY;
5014 }
5015
5016 pqi_start_io(ctrl_info, queue_group, RAID_PATH, io_request);
5017
5018 return 0;
5019 }
5020
5021 static inline int pqi_raid_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
5022 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
5023 struct pqi_queue_group *queue_group)
5024 {
5025 struct pqi_io_request *io_request;
5026
5027 io_request = pqi_alloc_io_request(ctrl_info);
5028
5029 return pqi_raid_submit_scsi_cmd_with_io_request(ctrl_info, io_request,
5030 device, scmd, queue_group);
5031 }
5032
5033 static inline void pqi_schedule_bypass_retry(struct pqi_ctrl_info *ctrl_info)
5034 {
5035 if (!pqi_ctrl_blocked(ctrl_info))
5036 schedule_work(&ctrl_info->raid_bypass_retry_work);
5037 }
5038
5039 static bool pqi_raid_bypass_retry_needed(struct pqi_io_request *io_request)
5040 {
5041 struct scsi_cmnd *scmd;
5042 struct pqi_scsi_dev *device;
5043 struct pqi_ctrl_info *ctrl_info;
5044
5045 if (!io_request->raid_bypass)
5046 return false;
5047
5048 scmd = io_request->scmd;
5049 if ((scmd->result & 0xff) == SAM_STAT_GOOD)
5050 return false;
5051 if (host_byte(scmd->result) == DID_NO_CONNECT)
5052 return false;
5053
5054 device = scmd->device->hostdata;
5055 if (pqi_device_offline(device))
5056 return false;
5057
5058 ctrl_info = shost_to_hba(scmd->device->host);
5059 if (pqi_ctrl_offline(ctrl_info))
5060 return false;
5061
5062 return true;
5063 }
5064
5065 static inline void pqi_add_to_raid_bypass_retry_list(
5066 struct pqi_ctrl_info *ctrl_info,
5067 struct pqi_io_request *io_request, bool at_head)
5068 {
5069 unsigned long flags;
5070
5071 spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags);
5072 if (at_head)
5073 list_add(&io_request->request_list_entry,
5074 &ctrl_info->raid_bypass_retry_list);
5075 else
5076 list_add_tail(&io_request->request_list_entry,
5077 &ctrl_info->raid_bypass_retry_list);
5078 spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags);
5079 }
5080
5081 static void pqi_queued_raid_bypass_complete(struct pqi_io_request *io_request,
5082 void *context)
5083 {
5084 struct scsi_cmnd *scmd;
5085
5086 scmd = io_request->scmd;
5087 pqi_free_io_request(io_request);
5088 pqi_scsi_done(scmd);
5089 }
5090
5091 static void pqi_queue_raid_bypass_retry(struct pqi_io_request *io_request)
5092 {
5093 struct scsi_cmnd *scmd;
5094 struct pqi_ctrl_info *ctrl_info;
5095
5096 io_request->io_complete_callback = pqi_queued_raid_bypass_complete;
5097 scmd = io_request->scmd;
5098 scmd->result = 0;
5099 ctrl_info = shost_to_hba(scmd->device->host);
5100
5101 pqi_add_to_raid_bypass_retry_list(ctrl_info, io_request, false);
5102 pqi_schedule_bypass_retry(ctrl_info);
5103 }
5104
5105 static int pqi_retry_raid_bypass(struct pqi_io_request *io_request)
5106 {
5107 struct scsi_cmnd *scmd;
5108 struct pqi_scsi_dev *device;
5109 struct pqi_ctrl_info *ctrl_info;
5110 struct pqi_queue_group *queue_group;
5111
5112 scmd = io_request->scmd;
5113 device = scmd->device->hostdata;
5114 if (pqi_device_in_reset(device)) {
5115 pqi_free_io_request(io_request);
5116 set_host_byte(scmd, DID_RESET);
5117 pqi_scsi_done(scmd);
5118 return 0;
5119 }
5120
5121 ctrl_info = shost_to_hba(scmd->device->host);
5122 queue_group = io_request->queue_group;
5123
5124 pqi_reinit_io_request(io_request);
5125
5126 return pqi_raid_submit_scsi_cmd_with_io_request(ctrl_info, io_request,
5127 device, scmd, queue_group);
5128 }
5129
5130 static inline struct pqi_io_request *pqi_next_queued_raid_bypass_request(
5131 struct pqi_ctrl_info *ctrl_info)
5132 {
5133 unsigned long flags;
5134 struct pqi_io_request *io_request;
5135
5136 spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags);
5137 io_request = list_first_entry_or_null(
5138 &ctrl_info->raid_bypass_retry_list,
5139 struct pqi_io_request, request_list_entry);
5140 if (io_request)
5141 list_del(&io_request->request_list_entry);
5142 spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags);
5143
5144 return io_request;
5145 }
5146
5147 static void pqi_retry_raid_bypass_requests(struct pqi_ctrl_info *ctrl_info)
5148 {
5149 int rc;
5150 struct pqi_io_request *io_request;
5151
5152 pqi_ctrl_busy(ctrl_info);
5153
5154 while (1) {
5155 if (pqi_ctrl_blocked(ctrl_info))
5156 break;
5157 io_request = pqi_next_queued_raid_bypass_request(ctrl_info);
5158 if (!io_request)
5159 break;
5160 rc = pqi_retry_raid_bypass(io_request);
5161 if (rc) {
5162 pqi_add_to_raid_bypass_retry_list(ctrl_info, io_request,
5163 true);
5164 pqi_schedule_bypass_retry(ctrl_info);
5165 break;
5166 }
5167 }
5168
5169 pqi_ctrl_unbusy(ctrl_info);
5170 }
5171
5172 static void pqi_raid_bypass_retry_worker(struct work_struct *work)
5173 {
5174 struct pqi_ctrl_info *ctrl_info;
5175
5176 ctrl_info = container_of(work, struct pqi_ctrl_info,
5177 raid_bypass_retry_work);
5178 pqi_retry_raid_bypass_requests(ctrl_info);
5179 }
5180
5181 static void pqi_clear_all_queued_raid_bypass_retries(
5182 struct pqi_ctrl_info *ctrl_info)
5183 {
5184 unsigned long flags;
5185
5186 spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags);
5187 INIT_LIST_HEAD(&ctrl_info->raid_bypass_retry_list);
5188 spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags);
5189 }
5190
5191 static void pqi_aio_io_complete(struct pqi_io_request *io_request,
5192 void *context)
5193 {
5194 struct scsi_cmnd *scmd;
5195
5196 scmd = io_request->scmd;
5197 scsi_dma_unmap(scmd);
5198 if (io_request->status == -EAGAIN)
5199 set_host_byte(scmd, DID_IMM_RETRY);
5200 else if (pqi_raid_bypass_retry_needed(io_request)) {
5201 pqi_queue_raid_bypass_retry(io_request);
5202 return;
5203 }
5204 pqi_free_io_request(io_request);
5205 pqi_scsi_done(scmd);
5206 }
5207
5208 static inline int pqi_aio_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
5209 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
5210 struct pqi_queue_group *queue_group)
5211 {
5212 return pqi_aio_submit_io(ctrl_info, scmd, device->aio_handle,
5213 scmd->cmnd, scmd->cmd_len, queue_group, NULL, false);
5214 }
5215
5216 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info,
5217 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb,
5218 unsigned int cdb_length, struct pqi_queue_group *queue_group,
5219 struct pqi_encryption_info *encryption_info, bool raid_bypass)
5220 {
5221 int rc;
5222 struct pqi_io_request *io_request;
5223 struct pqi_aio_path_request *request;
5224
5225 io_request = pqi_alloc_io_request(ctrl_info);
5226 io_request->io_complete_callback = pqi_aio_io_complete;
5227 io_request->scmd = scmd;
5228 io_request->raid_bypass = raid_bypass;
5229
5230 request = io_request->iu;
5231 memset(request, 0,
5232 offsetof(struct pqi_raid_path_request, sg_descriptors));
5233
5234 request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_IO;
5235 put_unaligned_le32(aio_handle, &request->nexus_id);
5236 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length);
5237 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
5238 put_unaligned_le16(io_request->index, &request->request_id);
5239 request->error_index = request->request_id;
5240 if (cdb_length > sizeof(request->cdb))
5241 cdb_length = sizeof(request->cdb);
5242 request->cdb_length = cdb_length;
5243 memcpy(request->cdb, cdb, cdb_length);
5244
5245 switch (scmd->sc_data_direction) {
5246 case DMA_TO_DEVICE:
5247 request->data_direction = SOP_READ_FLAG;
5248 break;
5249 case DMA_FROM_DEVICE:
5250 request->data_direction = SOP_WRITE_FLAG;
5251 break;
5252 case DMA_NONE:
5253 request->data_direction = SOP_NO_DIRECTION_FLAG;
5254 break;
5255 case DMA_BIDIRECTIONAL:
5256 request->data_direction = SOP_BIDIRECTIONAL;
5257 break;
5258 default:
5259 dev_err(&ctrl_info->pci_dev->dev,
5260 "unknown data direction: %d\n",
5261 scmd->sc_data_direction);
5262 break;
5263 }
5264
5265 if (encryption_info) {
5266 request->encryption_enable = true;
5267 put_unaligned_le16(encryption_info->data_encryption_key_index,
5268 &request->data_encryption_key_index);
5269 put_unaligned_le32(encryption_info->encrypt_tweak_lower,
5270 &request->encrypt_tweak_lower);
5271 put_unaligned_le32(encryption_info->encrypt_tweak_upper,
5272 &request->encrypt_tweak_upper);
5273 }
5274
5275 rc = pqi_build_aio_sg_list(ctrl_info, request, scmd, io_request);
5276 if (rc) {
5277 pqi_free_io_request(io_request);
5278 return SCSI_MLQUEUE_HOST_BUSY;
5279 }
5280
5281 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request);
5282
5283 return 0;
5284 }
5285
5286 static inline u16 pqi_get_hw_queue(struct pqi_ctrl_info *ctrl_info,
5287 struct scsi_cmnd *scmd)
5288 {
5289 u16 hw_queue;
5290
5291 hw_queue = blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(scmd->request));
5292 if (hw_queue > ctrl_info->max_hw_queue_index)
5293 hw_queue = 0;
5294
5295 return hw_queue;
5296 }
5297
5298 /*
5299 * This function gets called just before we hand the completed SCSI request
5300 * back to the SML.
5301 */
5302
5303 void pqi_prep_for_scsi_done(struct scsi_cmnd *scmd)
5304 {
5305 struct pqi_scsi_dev *device;
5306
5307 if (!scmd->device) {
5308 set_host_byte(scmd, DID_NO_CONNECT);
5309 return;
5310 }
5311
5312 device = scmd->device->hostdata;
5313 if (!device) {
5314 set_host_byte(scmd, DID_NO_CONNECT);
5315 return;
5316 }
5317
5318 atomic_dec(&device->scsi_cmds_outstanding);
5319 }
5320
5321 static int pqi_scsi_queue_command(struct Scsi_Host *shost,
5322 struct scsi_cmnd *scmd)
5323 {
5324 int rc;
5325 struct pqi_ctrl_info *ctrl_info;
5326 struct pqi_scsi_dev *device;
5327 u16 hw_queue;
5328 struct pqi_queue_group *queue_group;
5329 bool raid_bypassed;
5330
5331 device = scmd->device->hostdata;
5332 ctrl_info = shost_to_hba(shost);
5333
5334 if (!device) {
5335 set_host_byte(scmd, DID_NO_CONNECT);
5336 pqi_scsi_done(scmd);
5337 return 0;
5338 }
5339
5340 atomic_inc(&device->scsi_cmds_outstanding);
5341
5342 if (pqi_ctrl_offline(ctrl_info) || pqi_device_in_remove(ctrl_info,
5343 device)) {
5344 set_host_byte(scmd, DID_NO_CONNECT);
5345 pqi_scsi_done(scmd);
5346 return 0;
5347 }
5348
5349 pqi_ctrl_busy(ctrl_info);
5350 if (pqi_ctrl_blocked(ctrl_info) || pqi_device_in_reset(device) ||
5351 pqi_ctrl_in_ofa(ctrl_info)) {
5352 rc = SCSI_MLQUEUE_HOST_BUSY;
5353 goto out;
5354 }
5355
5356 /*
5357 * This is necessary because the SML doesn't zero out this field during
5358 * error recovery.
5359 */
5360 scmd->result = 0;
5361
5362 hw_queue = pqi_get_hw_queue(ctrl_info, scmd);
5363 queue_group = &ctrl_info->queue_groups[hw_queue];
5364
5365 if (pqi_is_logical_device(device)) {
5366 raid_bypassed = false;
5367 if (device->raid_bypass_enabled &&
5368 !blk_rq_is_passthrough(scmd->request)) {
5369 rc = pqi_raid_bypass_submit_scsi_cmd(ctrl_info, device,
5370 scmd, queue_group);
5371 if (rc == 0 || rc == SCSI_MLQUEUE_HOST_BUSY)
5372 raid_bypassed = true;
5373 }
5374 if (!raid_bypassed)
5375 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd,
5376 queue_group);
5377 } else {
5378 if (device->aio_enabled)
5379 rc = pqi_aio_submit_scsi_cmd(ctrl_info, device, scmd,
5380 queue_group);
5381 else
5382 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd,
5383 queue_group);
5384 }
5385
5386 out:
5387 pqi_ctrl_unbusy(ctrl_info);
5388 if (rc)
5389 atomic_dec(&device->scsi_cmds_outstanding);
5390
5391 return rc;
5392 }
5393
5394 static int pqi_wait_until_queued_io_drained(struct pqi_ctrl_info *ctrl_info,
5395 struct pqi_queue_group *queue_group)
5396 {
5397 unsigned int path;
5398 unsigned long flags;
5399 bool list_is_empty;
5400
5401 for (path = 0; path < 2; path++) {
5402 while (1) {
5403 spin_lock_irqsave(
5404 &queue_group->submit_lock[path], flags);
5405 list_is_empty =
5406 list_empty(&queue_group->request_list[path]);
5407 spin_unlock_irqrestore(
5408 &queue_group->submit_lock[path], flags);
5409 if (list_is_empty)
5410 break;
5411 pqi_check_ctrl_health(ctrl_info);
5412 if (pqi_ctrl_offline(ctrl_info))
5413 return -ENXIO;
5414 usleep_range(1000, 2000);
5415 }
5416 }
5417
5418 return 0;
5419 }
5420
5421 static int pqi_wait_until_inbound_queues_empty(struct pqi_ctrl_info *ctrl_info)
5422 {
5423 int rc;
5424 unsigned int i;
5425 unsigned int path;
5426 struct pqi_queue_group *queue_group;
5427 pqi_index_t iq_pi;
5428 pqi_index_t iq_ci;
5429
5430 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
5431 queue_group = &ctrl_info->queue_groups[i];
5432
5433 rc = pqi_wait_until_queued_io_drained(ctrl_info, queue_group);
5434 if (rc)
5435 return rc;
5436
5437 for (path = 0; path < 2; path++) {
5438 iq_pi = queue_group->iq_pi_copy[path];
5439
5440 while (1) {
5441 iq_ci = readl(queue_group->iq_ci[path]);
5442 if (iq_ci == iq_pi)
5443 break;
5444 pqi_check_ctrl_health(ctrl_info);
5445 if (pqi_ctrl_offline(ctrl_info))
5446 return -ENXIO;
5447 usleep_range(1000, 2000);
5448 }
5449 }
5450 }
5451
5452 return 0;
5453 }
5454
5455 static void pqi_fail_io_queued_for_device(struct pqi_ctrl_info *ctrl_info,
5456 struct pqi_scsi_dev *device)
5457 {
5458 unsigned int i;
5459 unsigned int path;
5460 struct pqi_queue_group *queue_group;
5461 unsigned long flags;
5462 struct pqi_io_request *io_request;
5463 struct pqi_io_request *next;
5464 struct scsi_cmnd *scmd;
5465 struct pqi_scsi_dev *scsi_device;
5466
5467 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
5468 queue_group = &ctrl_info->queue_groups[i];
5469
5470 for (path = 0; path < 2; path++) {
5471 spin_lock_irqsave(
5472 &queue_group->submit_lock[path], flags);
5473
5474 list_for_each_entry_safe(io_request, next,
5475 &queue_group->request_list[path],
5476 request_list_entry) {
5477 scmd = io_request->scmd;
5478 if (!scmd)
5479 continue;
5480
5481 scsi_device = scmd->device->hostdata;
5482 if (scsi_device != device)
5483 continue;
5484
5485 list_del(&io_request->request_list_entry);
5486 set_host_byte(scmd, DID_RESET);
5487 pqi_scsi_done(scmd);
5488 }
5489
5490 spin_unlock_irqrestore(
5491 &queue_group->submit_lock[path], flags);
5492 }
5493 }
5494 }
5495
5496 static void pqi_fail_io_queued_for_all_devices(struct pqi_ctrl_info *ctrl_info)
5497 {
5498 unsigned int i;
5499 unsigned int path;
5500 struct pqi_queue_group *queue_group;
5501 unsigned long flags;
5502 struct pqi_io_request *io_request;
5503 struct pqi_io_request *next;
5504 struct scsi_cmnd *scmd;
5505
5506 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
5507 queue_group = &ctrl_info->queue_groups[i];
5508
5509 for (path = 0; path < 2; path++) {
5510 spin_lock_irqsave(&queue_group->submit_lock[path],
5511 flags);
5512
5513 list_for_each_entry_safe(io_request, next,
5514 &queue_group->request_list[path],
5515 request_list_entry) {
5516
5517 scmd = io_request->scmd;
5518 if (!scmd)
5519 continue;
5520
5521 list_del(&io_request->request_list_entry);
5522 set_host_byte(scmd, DID_RESET);
5523 pqi_scsi_done(scmd);
5524 }
5525
5526 spin_unlock_irqrestore(
5527 &queue_group->submit_lock[path], flags);
5528 }
5529 }
5530 }
5531
5532 static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info,
5533 struct pqi_scsi_dev *device, unsigned long timeout_secs)
5534 {
5535 unsigned long timeout;
5536
5537 timeout = (timeout_secs * PQI_HZ) + jiffies;
5538
5539 while (atomic_read(&device->scsi_cmds_outstanding)) {
5540 pqi_check_ctrl_health(ctrl_info);
5541 if (pqi_ctrl_offline(ctrl_info))
5542 return -ENXIO;
5543 if (timeout_secs != NO_TIMEOUT) {
5544 if (time_after(jiffies, timeout)) {
5545 dev_err(&ctrl_info->pci_dev->dev,
5546 "timed out waiting for pending IO\n");
5547 return -ETIMEDOUT;
5548 }
5549 }
5550 usleep_range(1000, 2000);
5551 }
5552
5553 return 0;
5554 }
5555
5556 static int pqi_ctrl_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info,
5557 unsigned long timeout_secs)
5558 {
5559 bool io_pending;
5560 unsigned long flags;
5561 unsigned long timeout;
5562 struct pqi_scsi_dev *device;
5563
5564 timeout = (timeout_secs * PQI_HZ) + jiffies;
5565 while (1) {
5566 io_pending = false;
5567
5568 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
5569 list_for_each_entry(device, &ctrl_info->scsi_device_list,
5570 scsi_device_list_entry) {
5571 if (atomic_read(&device->scsi_cmds_outstanding)) {
5572 io_pending = true;
5573 break;
5574 }
5575 }
5576 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
5577 flags);
5578
5579 if (!io_pending)
5580 break;
5581
5582 pqi_check_ctrl_health(ctrl_info);
5583 if (pqi_ctrl_offline(ctrl_info))
5584 return -ENXIO;
5585
5586 if (timeout_secs != NO_TIMEOUT) {
5587 if (time_after(jiffies, timeout)) {
5588 dev_err(&ctrl_info->pci_dev->dev,
5589 "timed out waiting for pending IO\n");
5590 return -ETIMEDOUT;
5591 }
5592 }
5593 usleep_range(1000, 2000);
5594 }
5595
5596 return 0;
5597 }
5598
5599 static void pqi_lun_reset_complete(struct pqi_io_request *io_request,
5600 void *context)
5601 {
5602 struct completion *waiting = context;
5603
5604 complete(waiting);
5605 }
5606
5607 #define PQI_LUN_RESET_TIMEOUT_SECS 10
5608
5609 static int pqi_wait_for_lun_reset_completion(struct pqi_ctrl_info *ctrl_info,
5610 struct pqi_scsi_dev *device, struct completion *wait)
5611 {
5612 int rc;
5613
5614 while (1) {
5615 if (wait_for_completion_io_timeout(wait,
5616 PQI_LUN_RESET_TIMEOUT_SECS * PQI_HZ)) {
5617 rc = 0;
5618 break;
5619 }
5620
5621 pqi_check_ctrl_health(ctrl_info);
5622 if (pqi_ctrl_offline(ctrl_info)) {
5623 rc = -ENXIO;
5624 break;
5625 }
5626 }
5627
5628 return rc;
5629 }
5630
5631 static int pqi_lun_reset(struct pqi_ctrl_info *ctrl_info,
5632 struct pqi_scsi_dev *device)
5633 {
5634 int rc;
5635 struct pqi_io_request *io_request;
5636 DECLARE_COMPLETION_ONSTACK(wait);
5637 struct pqi_task_management_request *request;
5638
5639 io_request = pqi_alloc_io_request(ctrl_info);
5640 io_request->io_complete_callback = pqi_lun_reset_complete;
5641 io_request->context = &wait;
5642
5643 request = io_request->iu;
5644 memset(request, 0, sizeof(*request));
5645
5646 request->header.iu_type = PQI_REQUEST_IU_TASK_MANAGEMENT;
5647 put_unaligned_le16(sizeof(*request) - PQI_REQUEST_HEADER_LENGTH,
5648 &request->header.iu_length);
5649 put_unaligned_le16(io_request->index, &request->request_id);
5650 memcpy(request->lun_number, device->scsi3addr,
5651 sizeof(request->lun_number));
5652 request->task_management_function = SOP_TASK_MANAGEMENT_LUN_RESET;
5653
5654 pqi_start_io(ctrl_info,
5655 &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH,
5656 io_request);
5657
5658 rc = pqi_wait_for_lun_reset_completion(ctrl_info, device, &wait);
5659 if (rc == 0)
5660 rc = io_request->status;
5661
5662 pqi_free_io_request(io_request);
5663
5664 return rc;
5665 }
5666
5667 /* Performs a reset at the LUN level. */
5668
5669 #define PQI_LUN_RESET_RETRIES 3
5670 #define PQI_LUN_RESET_RETRY_INTERVAL_MSECS 10000
5671 #define PQI_LUN_RESET_PENDING_IO_TIMEOUT_SECS 120
5672
5673 static int _pqi_device_reset(struct pqi_ctrl_info *ctrl_info,
5674 struct pqi_scsi_dev *device)
5675 {
5676 int rc;
5677 unsigned int retries;
5678 unsigned long timeout_secs;
5679
5680 for (retries = 0;;) {
5681 rc = pqi_lun_reset(ctrl_info, device);
5682 if (rc != -EAGAIN || ++retries > PQI_LUN_RESET_RETRIES)
5683 break;
5684 msleep(PQI_LUN_RESET_RETRY_INTERVAL_MSECS);
5685 }
5686
5687 timeout_secs = rc ? PQI_LUN_RESET_PENDING_IO_TIMEOUT_SECS : NO_TIMEOUT;
5688
5689 rc |= pqi_device_wait_for_pending_io(ctrl_info, device, timeout_secs);
5690
5691 return rc == 0 ? SUCCESS : FAILED;
5692 }
5693
5694 static int pqi_device_reset(struct pqi_ctrl_info *ctrl_info,
5695 struct pqi_scsi_dev *device)
5696 {
5697 int rc;
5698
5699 mutex_lock(&ctrl_info->lun_reset_mutex);
5700
5701 pqi_ctrl_block_requests(ctrl_info);
5702 pqi_ctrl_wait_until_quiesced(ctrl_info);
5703 pqi_fail_io_queued_for_device(ctrl_info, device);
5704 rc = pqi_wait_until_inbound_queues_empty(ctrl_info);
5705 pqi_device_reset_start(device);
5706 pqi_ctrl_unblock_requests(ctrl_info);
5707
5708 if (rc)
5709 rc = FAILED;
5710 else
5711 rc = _pqi_device_reset(ctrl_info, device);
5712
5713 pqi_device_reset_done(device);
5714
5715 mutex_unlock(&ctrl_info->lun_reset_mutex);
5716
5717 return rc;
5718 }
5719
5720 static int pqi_eh_device_reset_handler(struct scsi_cmnd *scmd)
5721 {
5722 int rc;
5723 struct Scsi_Host *shost;
5724 struct pqi_ctrl_info *ctrl_info;
5725 struct pqi_scsi_dev *device;
5726
5727 shost = scmd->device->host;
5728 ctrl_info = shost_to_hba(shost);
5729 device = scmd->device->hostdata;
5730
5731 dev_err(&ctrl_info->pci_dev->dev,
5732 "resetting scsi %d:%d:%d:%d\n",
5733 shost->host_no, device->bus, device->target, device->lun);
5734
5735 pqi_check_ctrl_health(ctrl_info);
5736 if (pqi_ctrl_offline(ctrl_info)) {
5737 dev_err(&ctrl_info->pci_dev->dev,
5738 "controller %u offlined - cannot send device reset\n",
5739 ctrl_info->ctrl_id);
5740 rc = FAILED;
5741 goto out;
5742 }
5743
5744 pqi_wait_until_ofa_finished(ctrl_info);
5745
5746 rc = pqi_device_reset(ctrl_info, device);
5747
5748 out:
5749 dev_err(&ctrl_info->pci_dev->dev,
5750 "reset of scsi %d:%d:%d:%d: %s\n",
5751 shost->host_no, device->bus, device->target, device->lun,
5752 rc == SUCCESS ? "SUCCESS" : "FAILED");
5753
5754 return rc;
5755 }
5756
5757 static int pqi_slave_alloc(struct scsi_device *sdev)
5758 {
5759 struct pqi_scsi_dev *device;
5760 unsigned long flags;
5761 struct pqi_ctrl_info *ctrl_info;
5762 struct scsi_target *starget;
5763 struct sas_rphy *rphy;
5764
5765 ctrl_info = shost_to_hba(sdev->host);
5766
5767 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
5768
5769 if (sdev_channel(sdev) == PQI_PHYSICAL_DEVICE_BUS) {
5770 starget = scsi_target(sdev);
5771 rphy = target_to_rphy(starget);
5772 device = pqi_find_device_by_sas_rphy(ctrl_info, rphy);
5773 if (device) {
5774 device->target = sdev_id(sdev);
5775 device->lun = sdev->lun;
5776 device->target_lun_valid = true;
5777 }
5778 } else {
5779 device = pqi_find_scsi_dev(ctrl_info, sdev_channel(sdev),
5780 sdev_id(sdev), sdev->lun);
5781 }
5782
5783 if (device) {
5784 sdev->hostdata = device;
5785 device->sdev = sdev;
5786 if (device->queue_depth) {
5787 device->advertised_queue_depth = device->queue_depth;
5788 scsi_change_queue_depth(sdev,
5789 device->advertised_queue_depth);
5790 }
5791 if (pqi_is_logical_device(device))
5792 pqi_disable_write_same(sdev);
5793 else
5794 sdev->allow_restart = 1;
5795 }
5796
5797 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
5798
5799 return 0;
5800 }
5801
5802 static int pqi_map_queues(struct Scsi_Host *shost)
5803 {
5804 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
5805
5806 return blk_mq_pci_map_queues(&shost->tag_set.map[HCTX_TYPE_DEFAULT],
5807 ctrl_info->pci_dev, 0);
5808 }
5809
5810 static int pqi_getpciinfo_ioctl(struct pqi_ctrl_info *ctrl_info,
5811 void __user *arg)
5812 {
5813 struct pci_dev *pci_dev;
5814 u32 subsystem_vendor;
5815 u32 subsystem_device;
5816 cciss_pci_info_struct pciinfo;
5817
5818 if (!arg)
5819 return -EINVAL;
5820
5821 pci_dev = ctrl_info->pci_dev;
5822
5823 pciinfo.domain = pci_domain_nr(pci_dev->bus);
5824 pciinfo.bus = pci_dev->bus->number;
5825 pciinfo.dev_fn = pci_dev->devfn;
5826 subsystem_vendor = pci_dev->subsystem_vendor;
5827 subsystem_device = pci_dev->subsystem_device;
5828 pciinfo.board_id = ((subsystem_device << 16) & 0xffff0000) |
5829 subsystem_vendor;
5830
5831 if (copy_to_user(arg, &pciinfo, sizeof(pciinfo)))
5832 return -EFAULT;
5833
5834 return 0;
5835 }
5836
5837 static int pqi_getdrivver_ioctl(void __user *arg)
5838 {
5839 u32 version;
5840
5841 if (!arg)
5842 return -EINVAL;
5843
5844 version = (DRIVER_MAJOR << 28) | (DRIVER_MINOR << 24) |
5845 (DRIVER_RELEASE << 16) | DRIVER_REVISION;
5846
5847 if (copy_to_user(arg, &version, sizeof(version)))
5848 return -EFAULT;
5849
5850 return 0;
5851 }
5852
5853 struct ciss_error_info {
5854 u8 scsi_status;
5855 int command_status;
5856 size_t sense_data_length;
5857 };
5858
5859 static void pqi_error_info_to_ciss(struct pqi_raid_error_info *pqi_error_info,
5860 struct ciss_error_info *ciss_error_info)
5861 {
5862 int ciss_cmd_status;
5863 size_t sense_data_length;
5864
5865 switch (pqi_error_info->data_out_result) {
5866 case PQI_DATA_IN_OUT_GOOD:
5867 ciss_cmd_status = CISS_CMD_STATUS_SUCCESS;
5868 break;
5869 case PQI_DATA_IN_OUT_UNDERFLOW:
5870 ciss_cmd_status = CISS_CMD_STATUS_DATA_UNDERRUN;
5871 break;
5872 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW:
5873 ciss_cmd_status = CISS_CMD_STATUS_DATA_OVERRUN;
5874 break;
5875 case PQI_DATA_IN_OUT_PROTOCOL_ERROR:
5876 case PQI_DATA_IN_OUT_BUFFER_ERROR:
5877 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA:
5878 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE:
5879 case PQI_DATA_IN_OUT_ERROR:
5880 ciss_cmd_status = CISS_CMD_STATUS_PROTOCOL_ERROR;
5881 break;
5882 case PQI_DATA_IN_OUT_HARDWARE_ERROR:
5883 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR:
5884 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT:
5885 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED:
5886 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED:
5887 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED:
5888 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST:
5889 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION:
5890 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED:
5891 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ:
5892 ciss_cmd_status = CISS_CMD_STATUS_HARDWARE_ERROR;
5893 break;
5894 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT:
5895 ciss_cmd_status = CISS_CMD_STATUS_UNSOLICITED_ABORT;
5896 break;
5897 case PQI_DATA_IN_OUT_ABORTED:
5898 ciss_cmd_status = CISS_CMD_STATUS_ABORTED;
5899 break;
5900 case PQI_DATA_IN_OUT_TIMEOUT:
5901 ciss_cmd_status = CISS_CMD_STATUS_TIMEOUT;
5902 break;
5903 default:
5904 ciss_cmd_status = CISS_CMD_STATUS_TARGET_STATUS;
5905 break;
5906 }
5907
5908 sense_data_length =
5909 get_unaligned_le16(&pqi_error_info->sense_data_length);
5910 if (sense_data_length == 0)
5911 sense_data_length =
5912 get_unaligned_le16(&pqi_error_info->response_data_length);
5913 if (sense_data_length)
5914 if (sense_data_length > sizeof(pqi_error_info->data))
5915 sense_data_length = sizeof(pqi_error_info->data);
5916
5917 ciss_error_info->scsi_status = pqi_error_info->status;
5918 ciss_error_info->command_status = ciss_cmd_status;
5919 ciss_error_info->sense_data_length = sense_data_length;
5920 }
5921
5922 static int pqi_passthru_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg)
5923 {
5924 int rc;
5925 char *kernel_buffer = NULL;
5926 u16 iu_length;
5927 size_t sense_data_length;
5928 IOCTL_Command_struct iocommand;
5929 struct pqi_raid_path_request request;
5930 struct pqi_raid_error_info pqi_error_info;
5931 struct ciss_error_info ciss_error_info;
5932
5933 if (pqi_ctrl_offline(ctrl_info))
5934 return -ENXIO;
5935 if (!arg)
5936 return -EINVAL;
5937 if (!capable(CAP_SYS_RAWIO))
5938 return -EPERM;
5939 if (copy_from_user(&iocommand, arg, sizeof(iocommand)))
5940 return -EFAULT;
5941 if (iocommand.buf_size < 1 &&
5942 iocommand.Request.Type.Direction != XFER_NONE)
5943 return -EINVAL;
5944 if (iocommand.Request.CDBLen > sizeof(request.cdb))
5945 return -EINVAL;
5946 if (iocommand.Request.Type.Type != TYPE_CMD)
5947 return -EINVAL;
5948
5949 switch (iocommand.Request.Type.Direction) {
5950 case XFER_NONE:
5951 case XFER_WRITE:
5952 case XFER_READ:
5953 case XFER_READ | XFER_WRITE:
5954 break;
5955 default:
5956 return -EINVAL;
5957 }
5958
5959 if (iocommand.buf_size > 0) {
5960 kernel_buffer = kmalloc(iocommand.buf_size, GFP_KERNEL);
5961 if (!kernel_buffer)
5962 return -ENOMEM;
5963 if (iocommand.Request.Type.Direction & XFER_WRITE) {
5964 if (copy_from_user(kernel_buffer, iocommand.buf,
5965 iocommand.buf_size)) {
5966 rc = -EFAULT;
5967 goto out;
5968 }
5969 } else {
5970 memset(kernel_buffer, 0, iocommand.buf_size);
5971 }
5972 }
5973
5974 memset(&request, 0, sizeof(request));
5975
5976 request.header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
5977 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) -
5978 PQI_REQUEST_HEADER_LENGTH;
5979 memcpy(request.lun_number, iocommand.LUN_info.LunAddrBytes,
5980 sizeof(request.lun_number));
5981 memcpy(request.cdb, iocommand.Request.CDB, iocommand.Request.CDBLen);
5982 request.additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0;
5983
5984 switch (iocommand.Request.Type.Direction) {
5985 case XFER_NONE:
5986 request.data_direction = SOP_NO_DIRECTION_FLAG;
5987 break;
5988 case XFER_WRITE:
5989 request.data_direction = SOP_WRITE_FLAG;
5990 break;
5991 case XFER_READ:
5992 request.data_direction = SOP_READ_FLAG;
5993 break;
5994 case XFER_READ | XFER_WRITE:
5995 request.data_direction = SOP_BIDIRECTIONAL;
5996 break;
5997 }
5998
5999 request.task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
6000
6001 if (iocommand.buf_size > 0) {
6002 put_unaligned_le32(iocommand.buf_size, &request.buffer_length);
6003
6004 rc = pqi_map_single(ctrl_info->pci_dev,
6005 &request.sg_descriptors[0], kernel_buffer,
6006 iocommand.buf_size, DMA_BIDIRECTIONAL);
6007 if (rc)
6008 goto out;
6009
6010 iu_length += sizeof(request.sg_descriptors[0]);
6011 }
6012
6013 put_unaligned_le16(iu_length, &request.header.iu_length);
6014
6015 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
6016 PQI_SYNC_FLAGS_INTERRUPTABLE, &pqi_error_info, NO_TIMEOUT);
6017
6018 if (iocommand.buf_size > 0)
6019 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1,
6020 DMA_BIDIRECTIONAL);
6021
6022 memset(&iocommand.error_info, 0, sizeof(iocommand.error_info));
6023
6024 if (rc == 0) {
6025 pqi_error_info_to_ciss(&pqi_error_info, &ciss_error_info);
6026 iocommand.error_info.ScsiStatus = ciss_error_info.scsi_status;
6027 iocommand.error_info.CommandStatus =
6028 ciss_error_info.command_status;
6029 sense_data_length = ciss_error_info.sense_data_length;
6030 if (sense_data_length) {
6031 if (sense_data_length >
6032 sizeof(iocommand.error_info.SenseInfo))
6033 sense_data_length =
6034 sizeof(iocommand.error_info.SenseInfo);
6035 memcpy(iocommand.error_info.SenseInfo,
6036 pqi_error_info.data, sense_data_length);
6037 iocommand.error_info.SenseLen = sense_data_length;
6038 }
6039 }
6040
6041 if (copy_to_user(arg, &iocommand, sizeof(iocommand))) {
6042 rc = -EFAULT;
6043 goto out;
6044 }
6045
6046 if (rc == 0 && iocommand.buf_size > 0 &&
6047 (iocommand.Request.Type.Direction & XFER_READ)) {
6048 if (copy_to_user(iocommand.buf, kernel_buffer,
6049 iocommand.buf_size)) {
6050 rc = -EFAULT;
6051 }
6052 }
6053
6054 out:
6055 kfree(kernel_buffer);
6056
6057 return rc;
6058 }
6059
6060 static int pqi_ioctl(struct scsi_device *sdev, unsigned int cmd,
6061 void __user *arg)
6062 {
6063 int rc;
6064 struct pqi_ctrl_info *ctrl_info;
6065
6066 ctrl_info = shost_to_hba(sdev->host);
6067
6068 if (pqi_ctrl_in_ofa(ctrl_info))
6069 return -EBUSY;
6070
6071 switch (cmd) {
6072 case CCISS_DEREGDISK:
6073 case CCISS_REGNEWDISK:
6074 case CCISS_REGNEWD:
6075 rc = pqi_scan_scsi_devices(ctrl_info);
6076 break;
6077 case CCISS_GETPCIINFO:
6078 rc = pqi_getpciinfo_ioctl(ctrl_info, arg);
6079 break;
6080 case CCISS_GETDRIVVER:
6081 rc = pqi_getdrivver_ioctl(arg);
6082 break;
6083 case CCISS_PASSTHRU:
6084 rc = pqi_passthru_ioctl(ctrl_info, arg);
6085 break;
6086 default:
6087 rc = -EINVAL;
6088 break;
6089 }
6090
6091 return rc;
6092 }
6093
6094 static ssize_t pqi_version_show(struct device *dev,
6095 struct device_attribute *attr, char *buffer)
6096 {
6097 ssize_t count = 0;
6098 struct Scsi_Host *shost;
6099 struct pqi_ctrl_info *ctrl_info;
6100
6101 shost = class_to_shost(dev);
6102 ctrl_info = shost_to_hba(shost);
6103
6104 count += snprintf(buffer + count, PAGE_SIZE - count,
6105 " driver: %s\n", DRIVER_VERSION BUILD_TIMESTAMP);
6106
6107 count += snprintf(buffer + count, PAGE_SIZE - count,
6108 "firmware: %s\n", ctrl_info->firmware_version);
6109
6110 return count;
6111 }
6112
6113 static ssize_t pqi_host_rescan_store(struct device *dev,
6114 struct device_attribute *attr, const char *buffer, size_t count)
6115 {
6116 struct Scsi_Host *shost = class_to_shost(dev);
6117
6118 pqi_scan_start(shost);
6119
6120 return count;
6121 }
6122
6123 static ssize_t pqi_lockup_action_show(struct device *dev,
6124 struct device_attribute *attr, char *buffer)
6125 {
6126 int count = 0;
6127 unsigned int i;
6128
6129 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
6130 if (pqi_lockup_actions[i].action == pqi_lockup_action)
6131 count += snprintf(buffer + count, PAGE_SIZE - count,
6132 "[%s] ", pqi_lockup_actions[i].name);
6133 else
6134 count += snprintf(buffer + count, PAGE_SIZE - count,
6135 "%s ", pqi_lockup_actions[i].name);
6136 }
6137
6138 count += snprintf(buffer + count, PAGE_SIZE - count, "\n");
6139
6140 return count;
6141 }
6142
6143 static ssize_t pqi_lockup_action_store(struct device *dev,
6144 struct device_attribute *attr, const char *buffer, size_t count)
6145 {
6146 unsigned int i;
6147 char *action_name;
6148 char action_name_buffer[32];
6149
6150 strlcpy(action_name_buffer, buffer, sizeof(action_name_buffer));
6151 action_name = strstrip(action_name_buffer);
6152
6153 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
6154 if (strcmp(action_name, pqi_lockup_actions[i].name) == 0) {
6155 pqi_lockup_action = pqi_lockup_actions[i].action;
6156 return count;
6157 }
6158 }
6159
6160 return -EINVAL;
6161 }
6162
6163 static DEVICE_ATTR(version, 0444, pqi_version_show, NULL);
6164 static DEVICE_ATTR(rescan, 0200, NULL, pqi_host_rescan_store);
6165 static DEVICE_ATTR(lockup_action, 0644,
6166 pqi_lockup_action_show, pqi_lockup_action_store);
6167
6168 static struct device_attribute *pqi_shost_attrs[] = {
6169 &dev_attr_version,
6170 &dev_attr_rescan,
6171 &dev_attr_lockup_action,
6172 NULL
6173 };
6174
6175 static ssize_t pqi_unique_id_show(struct device *dev,
6176 struct device_attribute *attr, char *buffer)
6177 {
6178 struct pqi_ctrl_info *ctrl_info;
6179 struct scsi_device *sdev;
6180 struct pqi_scsi_dev *device;
6181 unsigned long flags;
6182 unsigned char uid[16];
6183
6184 sdev = to_scsi_device(dev);
6185 ctrl_info = shost_to_hba(sdev->host);
6186
6187 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6188
6189 device = sdev->hostdata;
6190 if (!device) {
6191 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
6192 flags);
6193 return -ENODEV;
6194 }
6195 memcpy(uid, device->unique_id, sizeof(uid));
6196
6197 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6198
6199 return snprintf(buffer, PAGE_SIZE,
6200 "%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X\n",
6201 uid[0], uid[1], uid[2], uid[3],
6202 uid[4], uid[5], uid[6], uid[7],
6203 uid[8], uid[9], uid[10], uid[11],
6204 uid[12], uid[13], uid[14], uid[15]);
6205 }
6206
6207 static ssize_t pqi_lunid_show(struct device *dev,
6208 struct device_attribute *attr, char *buffer)
6209 {
6210 struct pqi_ctrl_info *ctrl_info;
6211 struct scsi_device *sdev;
6212 struct pqi_scsi_dev *device;
6213 unsigned long flags;
6214 u8 lunid[8];
6215
6216 sdev = to_scsi_device(dev);
6217 ctrl_info = shost_to_hba(sdev->host);
6218
6219 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6220
6221 device = sdev->hostdata;
6222 if (!device) {
6223 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
6224 flags);
6225 return -ENODEV;
6226 }
6227 memcpy(lunid, device->scsi3addr, sizeof(lunid));
6228
6229 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6230
6231 return snprintf(buffer, PAGE_SIZE, "0x%8phN\n", lunid);
6232 }
6233
6234 #define MAX_PATHS 8
6235 static ssize_t pqi_path_info_show(struct device *dev,
6236 struct device_attribute *attr, char *buf)
6237 {
6238 struct pqi_ctrl_info *ctrl_info;
6239 struct scsi_device *sdev;
6240 struct pqi_scsi_dev *device;
6241 unsigned long flags;
6242 int i;
6243 int output_len = 0;
6244 u8 box;
6245 u8 bay;
6246 u8 path_map_index = 0;
6247 char *active;
6248 unsigned char phys_connector[2];
6249
6250 sdev = to_scsi_device(dev);
6251 ctrl_info = shost_to_hba(sdev->host);
6252
6253 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6254
6255 device = sdev->hostdata;
6256 if (!device) {
6257 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
6258 flags);
6259 return -ENODEV;
6260 }
6261
6262 bay = device->bay;
6263 for (i = 0; i < MAX_PATHS; i++) {
6264 path_map_index = 1<<i;
6265 if (i == device->active_path_index)
6266 active = "Active";
6267 else if (device->path_map & path_map_index)
6268 active = "Inactive";
6269 else
6270 continue;
6271
6272 output_len += scnprintf(buf + output_len,
6273 PAGE_SIZE - output_len,
6274 "[%d:%d:%d:%d] %20.20s ",
6275 ctrl_info->scsi_host->host_no,
6276 device->bus, device->target,
6277 device->lun,
6278 scsi_device_type(device->devtype));
6279
6280 if (device->devtype == TYPE_RAID ||
6281 pqi_is_logical_device(device))
6282 goto end_buffer;
6283
6284 memcpy(&phys_connector, &device->phys_connector[i],
6285 sizeof(phys_connector));
6286 if (phys_connector[0] < '0')
6287 phys_connector[0] = '0';
6288 if (phys_connector[1] < '0')
6289 phys_connector[1] = '0';
6290
6291 output_len += scnprintf(buf + output_len,
6292 PAGE_SIZE - output_len,
6293 "PORT: %.2s ", phys_connector);
6294
6295 box = device->box[i];
6296 if (box != 0 && box != 0xFF)
6297 output_len += scnprintf(buf + output_len,
6298 PAGE_SIZE - output_len,
6299 "BOX: %hhu ", box);
6300
6301 if ((device->devtype == TYPE_DISK ||
6302 device->devtype == TYPE_ZBC) &&
6303 pqi_expose_device(device))
6304 output_len += scnprintf(buf + output_len,
6305 PAGE_SIZE - output_len,
6306 "BAY: %hhu ", bay);
6307
6308 end_buffer:
6309 output_len += scnprintf(buf + output_len,
6310 PAGE_SIZE - output_len,
6311 "%s\n", active);
6312 }
6313
6314 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6315 return output_len;
6316 }
6317
6318
6319 static ssize_t pqi_sas_address_show(struct device *dev,
6320 struct device_attribute *attr, char *buffer)
6321 {
6322 struct pqi_ctrl_info *ctrl_info;
6323 struct scsi_device *sdev;
6324 struct pqi_scsi_dev *device;
6325 unsigned long flags;
6326 u64 sas_address;
6327
6328 sdev = to_scsi_device(dev);
6329 ctrl_info = shost_to_hba(sdev->host);
6330
6331 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6332
6333 device = sdev->hostdata;
6334 if (pqi_is_logical_device(device)) {
6335 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
6336 flags);
6337 return -ENODEV;
6338 }
6339 sas_address = device->sas_address;
6340
6341 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6342
6343 return snprintf(buffer, PAGE_SIZE, "0x%016llx\n", sas_address);
6344 }
6345
6346 static ssize_t pqi_ssd_smart_path_enabled_show(struct device *dev,
6347 struct device_attribute *attr, char *buffer)
6348 {
6349 struct pqi_ctrl_info *ctrl_info;
6350 struct scsi_device *sdev;
6351 struct pqi_scsi_dev *device;
6352 unsigned long flags;
6353
6354 sdev = to_scsi_device(dev);
6355 ctrl_info = shost_to_hba(sdev->host);
6356
6357 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6358
6359 device = sdev->hostdata;
6360 buffer[0] = device->raid_bypass_enabled ? '1' : '0';
6361 buffer[1] = '\n';
6362 buffer[2] = '\0';
6363
6364 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6365
6366 return 2;
6367 }
6368
6369 static ssize_t pqi_raid_level_show(struct device *dev,
6370 struct device_attribute *attr, char *buffer)
6371 {
6372 struct pqi_ctrl_info *ctrl_info;
6373 struct scsi_device *sdev;
6374 struct pqi_scsi_dev *device;
6375 unsigned long flags;
6376 char *raid_level;
6377
6378 sdev = to_scsi_device(dev);
6379 ctrl_info = shost_to_hba(sdev->host);
6380
6381 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6382
6383 device = sdev->hostdata;
6384
6385 if (pqi_is_logical_device(device))
6386 raid_level = pqi_raid_level_to_string(device->raid_level);
6387 else
6388 raid_level = "N/A";
6389
6390 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6391
6392 return snprintf(buffer, PAGE_SIZE, "%s\n", raid_level);
6393 }
6394
6395 static DEVICE_ATTR(lunid, 0444, pqi_lunid_show, NULL);
6396 static DEVICE_ATTR(unique_id, 0444, pqi_unique_id_show, NULL);
6397 static DEVICE_ATTR(path_info, 0444, pqi_path_info_show, NULL);
6398 static DEVICE_ATTR(sas_address, 0444, pqi_sas_address_show, NULL);
6399 static DEVICE_ATTR(ssd_smart_path_enabled, 0444,
6400 pqi_ssd_smart_path_enabled_show, NULL);
6401 static DEVICE_ATTR(raid_level, 0444, pqi_raid_level_show, NULL);
6402
6403 static struct device_attribute *pqi_sdev_attrs[] = {
6404 &dev_attr_lunid,
6405 &dev_attr_unique_id,
6406 &dev_attr_path_info,
6407 &dev_attr_sas_address,
6408 &dev_attr_ssd_smart_path_enabled,
6409 &dev_attr_raid_level,
6410 NULL
6411 };
6412
6413 static struct scsi_host_template pqi_driver_template = {
6414 .module = THIS_MODULE,
6415 .name = DRIVER_NAME_SHORT,
6416 .proc_name = DRIVER_NAME_SHORT,
6417 .queuecommand = pqi_scsi_queue_command,
6418 .scan_start = pqi_scan_start,
6419 .scan_finished = pqi_scan_finished,
6420 .this_id = -1,
6421 .eh_device_reset_handler = pqi_eh_device_reset_handler,
6422 .ioctl = pqi_ioctl,
6423 .slave_alloc = pqi_slave_alloc,
6424 .map_queues = pqi_map_queues,
6425 .sdev_attrs = pqi_sdev_attrs,
6426 .shost_attrs = pqi_shost_attrs,
6427 };
6428
6429 static int pqi_register_scsi(struct pqi_ctrl_info *ctrl_info)
6430 {
6431 int rc;
6432 struct Scsi_Host *shost;
6433
6434 shost = scsi_host_alloc(&pqi_driver_template, sizeof(ctrl_info));
6435 if (!shost) {
6436 dev_err(&ctrl_info->pci_dev->dev,
6437 "scsi_host_alloc failed for controller %u\n",
6438 ctrl_info->ctrl_id);
6439 return -ENOMEM;
6440 }
6441
6442 shost->io_port = 0;
6443 shost->n_io_port = 0;
6444 shost->this_id = -1;
6445 shost->max_channel = PQI_MAX_BUS;
6446 shost->max_cmd_len = MAX_COMMAND_SIZE;
6447 shost->max_lun = ~0;
6448 shost->max_id = ~0;
6449 shost->max_sectors = ctrl_info->max_sectors;
6450 shost->can_queue = ctrl_info->scsi_ml_can_queue;
6451 shost->cmd_per_lun = shost->can_queue;
6452 shost->sg_tablesize = ctrl_info->sg_tablesize;
6453 shost->transportt = pqi_sas_transport_template;
6454 shost->irq = pci_irq_vector(ctrl_info->pci_dev, 0);
6455 shost->unique_id = shost->irq;
6456 shost->nr_hw_queues = ctrl_info->num_queue_groups;
6457 shost->hostdata[0] = (unsigned long)ctrl_info;
6458
6459 rc = scsi_add_host(shost, &ctrl_info->pci_dev->dev);
6460 if (rc) {
6461 dev_err(&ctrl_info->pci_dev->dev,
6462 "scsi_add_host failed for controller %u\n",
6463 ctrl_info->ctrl_id);
6464 goto free_host;
6465 }
6466
6467 rc = pqi_add_sas_host(shost, ctrl_info);
6468 if (rc) {
6469 dev_err(&ctrl_info->pci_dev->dev,
6470 "add SAS host failed for controller %u\n",
6471 ctrl_info->ctrl_id);
6472 goto remove_host;
6473 }
6474
6475 ctrl_info->scsi_host = shost;
6476
6477 return 0;
6478
6479 remove_host:
6480 scsi_remove_host(shost);
6481 free_host:
6482 scsi_host_put(shost);
6483
6484 return rc;
6485 }
6486
6487 static void pqi_unregister_scsi(struct pqi_ctrl_info *ctrl_info)
6488 {
6489 struct Scsi_Host *shost;
6490
6491 pqi_delete_sas_host(ctrl_info);
6492
6493 shost = ctrl_info->scsi_host;
6494 if (!shost)
6495 return;
6496
6497 scsi_remove_host(shost);
6498 scsi_host_put(shost);
6499 }
6500
6501 static int pqi_wait_for_pqi_reset_completion(struct pqi_ctrl_info *ctrl_info)
6502 {
6503 int rc = 0;
6504 struct pqi_device_registers __iomem *pqi_registers;
6505 unsigned long timeout;
6506 unsigned int timeout_msecs;
6507 union pqi_reset_register reset_reg;
6508
6509 pqi_registers = ctrl_info->pqi_registers;
6510 timeout_msecs = readw(&pqi_registers->max_reset_timeout) * 100;
6511 timeout = msecs_to_jiffies(timeout_msecs) + jiffies;
6512
6513 while (1) {
6514 msleep(PQI_RESET_POLL_INTERVAL_MSECS);
6515 reset_reg.all_bits = readl(&pqi_registers->device_reset);
6516 if (reset_reg.bits.reset_action == PQI_RESET_ACTION_COMPLETED)
6517 break;
6518 pqi_check_ctrl_health(ctrl_info);
6519 if (pqi_ctrl_offline(ctrl_info)) {
6520 rc = -ENXIO;
6521 break;
6522 }
6523 if (time_after(jiffies, timeout)) {
6524 rc = -ETIMEDOUT;
6525 break;
6526 }
6527 }
6528
6529 return rc;
6530 }
6531
6532 static int pqi_reset(struct pqi_ctrl_info *ctrl_info)
6533 {
6534 int rc;
6535 union pqi_reset_register reset_reg;
6536
6537 if (ctrl_info->pqi_reset_quiesce_supported) {
6538 rc = sis_pqi_reset_quiesce(ctrl_info);
6539 if (rc) {
6540 dev_err(&ctrl_info->pci_dev->dev,
6541 "PQI reset failed during quiesce with error %d\n",
6542 rc);
6543 return rc;
6544 }
6545 }
6546
6547 reset_reg.all_bits = 0;
6548 reset_reg.bits.reset_type = PQI_RESET_TYPE_HARD_RESET;
6549 reset_reg.bits.reset_action = PQI_RESET_ACTION_RESET;
6550
6551 writel(reset_reg.all_bits, &ctrl_info->pqi_registers->device_reset);
6552
6553 rc = pqi_wait_for_pqi_reset_completion(ctrl_info);
6554 if (rc)
6555 dev_err(&ctrl_info->pci_dev->dev,
6556 "PQI reset failed with error %d\n", rc);
6557
6558 return rc;
6559 }
6560
6561 static int pqi_get_ctrl_firmware_version(struct pqi_ctrl_info *ctrl_info)
6562 {
6563 int rc;
6564 struct bmic_identify_controller *identify;
6565
6566 identify = kmalloc(sizeof(*identify), GFP_KERNEL);
6567 if (!identify)
6568 return -ENOMEM;
6569
6570 rc = pqi_identify_controller(ctrl_info, identify);
6571 if (rc)
6572 goto out;
6573
6574 memcpy(ctrl_info->firmware_version, identify->firmware_version,
6575 sizeof(identify->firmware_version));
6576 ctrl_info->firmware_version[sizeof(identify->firmware_version)] = '\0';
6577 snprintf(ctrl_info->firmware_version +
6578 strlen(ctrl_info->firmware_version),
6579 sizeof(ctrl_info->firmware_version),
6580 "-%u", get_unaligned_le16(&identify->firmware_build_number));
6581
6582 out:
6583 kfree(identify);
6584
6585 return rc;
6586 }
6587
6588 struct pqi_config_table_section_info {
6589 struct pqi_ctrl_info *ctrl_info;
6590 void *section;
6591 u32 section_offset;
6592 void __iomem *section_iomem_addr;
6593 };
6594
6595 static inline bool pqi_is_firmware_feature_supported(
6596 struct pqi_config_table_firmware_features *firmware_features,
6597 unsigned int bit_position)
6598 {
6599 unsigned int byte_index;
6600
6601 byte_index = bit_position / BITS_PER_BYTE;
6602
6603 if (byte_index >= le16_to_cpu(firmware_features->num_elements))
6604 return false;
6605
6606 return firmware_features->features_supported[byte_index] &
6607 (1 << (bit_position % BITS_PER_BYTE)) ? true : false;
6608 }
6609
6610 static inline bool pqi_is_firmware_feature_enabled(
6611 struct pqi_config_table_firmware_features *firmware_features,
6612 void __iomem *firmware_features_iomem_addr,
6613 unsigned int bit_position)
6614 {
6615 unsigned int byte_index;
6616 u8 __iomem *features_enabled_iomem_addr;
6617
6618 byte_index = (bit_position / BITS_PER_BYTE) +
6619 (le16_to_cpu(firmware_features->num_elements) * 2);
6620
6621 features_enabled_iomem_addr = firmware_features_iomem_addr +
6622 offsetof(struct pqi_config_table_firmware_features,
6623 features_supported) + byte_index;
6624
6625 return *((__force u8 *)features_enabled_iomem_addr) &
6626 (1 << (bit_position % BITS_PER_BYTE)) ? true : false;
6627 }
6628
6629 static inline void pqi_request_firmware_feature(
6630 struct pqi_config_table_firmware_features *firmware_features,
6631 unsigned int bit_position)
6632 {
6633 unsigned int byte_index;
6634
6635 byte_index = (bit_position / BITS_PER_BYTE) +
6636 le16_to_cpu(firmware_features->num_elements);
6637
6638 firmware_features->features_supported[byte_index] |=
6639 (1 << (bit_position % BITS_PER_BYTE));
6640 }
6641
6642 static int pqi_config_table_update(struct pqi_ctrl_info *ctrl_info,
6643 u16 first_section, u16 last_section)
6644 {
6645 struct pqi_vendor_general_request request;
6646
6647 memset(&request, 0, sizeof(request));
6648
6649 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL;
6650 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
6651 &request.header.iu_length);
6652 put_unaligned_le16(PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE,
6653 &request.function_code);
6654 put_unaligned_le16(first_section,
6655 &request.data.config_table_update.first_section);
6656 put_unaligned_le16(last_section,
6657 &request.data.config_table_update.last_section);
6658
6659 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
6660 0, NULL, NO_TIMEOUT);
6661 }
6662
6663 static int pqi_enable_firmware_features(struct pqi_ctrl_info *ctrl_info,
6664 struct pqi_config_table_firmware_features *firmware_features,
6665 void __iomem *firmware_features_iomem_addr)
6666 {
6667 void *features_requested;
6668 void __iomem *features_requested_iomem_addr;
6669
6670 features_requested = firmware_features->features_supported +
6671 le16_to_cpu(firmware_features->num_elements);
6672
6673 features_requested_iomem_addr = firmware_features_iomem_addr +
6674 (features_requested - (void *)firmware_features);
6675
6676 memcpy_toio(features_requested_iomem_addr, features_requested,
6677 le16_to_cpu(firmware_features->num_elements));
6678
6679 return pqi_config_table_update(ctrl_info,
6680 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES,
6681 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES);
6682 }
6683
6684 struct pqi_firmware_feature {
6685 char *feature_name;
6686 unsigned int feature_bit;
6687 bool supported;
6688 bool enabled;
6689 void (*feature_status)(struct pqi_ctrl_info *ctrl_info,
6690 struct pqi_firmware_feature *firmware_feature);
6691 };
6692
6693 static void pqi_firmware_feature_status(struct pqi_ctrl_info *ctrl_info,
6694 struct pqi_firmware_feature *firmware_feature)
6695 {
6696 if (!firmware_feature->supported) {
6697 dev_info(&ctrl_info->pci_dev->dev, "%s not supported by controller\n",
6698 firmware_feature->feature_name);
6699 return;
6700 }
6701
6702 if (firmware_feature->enabled) {
6703 dev_info(&ctrl_info->pci_dev->dev,
6704 "%s enabled\n", firmware_feature->feature_name);
6705 return;
6706 }
6707
6708 dev_err(&ctrl_info->pci_dev->dev, "failed to enable %s\n",
6709 firmware_feature->feature_name);
6710 }
6711
6712 static inline void pqi_firmware_feature_update(struct pqi_ctrl_info *ctrl_info,
6713 struct pqi_firmware_feature *firmware_feature)
6714 {
6715 if (firmware_feature->feature_status)
6716 firmware_feature->feature_status(ctrl_info, firmware_feature);
6717 }
6718
6719 static DEFINE_MUTEX(pqi_firmware_features_mutex);
6720
6721 static struct pqi_firmware_feature pqi_firmware_features[] = {
6722 {
6723 .feature_name = "Online Firmware Activation",
6724 .feature_bit = PQI_FIRMWARE_FEATURE_OFA,
6725 .feature_status = pqi_firmware_feature_status,
6726 },
6727 {
6728 .feature_name = "Serial Management Protocol",
6729 .feature_bit = PQI_FIRMWARE_FEATURE_SMP,
6730 .feature_status = pqi_firmware_feature_status,
6731 },
6732 {
6733 .feature_name = "New Soft Reset Handshake",
6734 .feature_bit = PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE,
6735 .feature_status = pqi_firmware_feature_status,
6736 },
6737 };
6738
6739 static void pqi_process_firmware_features(
6740 struct pqi_config_table_section_info *section_info)
6741 {
6742 int rc;
6743 struct pqi_ctrl_info *ctrl_info;
6744 struct pqi_config_table_firmware_features *firmware_features;
6745 void __iomem *firmware_features_iomem_addr;
6746 unsigned int i;
6747 unsigned int num_features_supported;
6748
6749 ctrl_info = section_info->ctrl_info;
6750 firmware_features = section_info->section;
6751 firmware_features_iomem_addr = section_info->section_iomem_addr;
6752
6753 for (i = 0, num_features_supported = 0;
6754 i < ARRAY_SIZE(pqi_firmware_features); i++) {
6755 if (pqi_is_firmware_feature_supported(firmware_features,
6756 pqi_firmware_features[i].feature_bit)) {
6757 pqi_firmware_features[i].supported = true;
6758 num_features_supported++;
6759 } else {
6760 pqi_firmware_feature_update(ctrl_info,
6761 &pqi_firmware_features[i]);
6762 }
6763 }
6764
6765 if (num_features_supported == 0)
6766 return;
6767
6768 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
6769 if (!pqi_firmware_features[i].supported)
6770 continue;
6771 pqi_request_firmware_feature(firmware_features,
6772 pqi_firmware_features[i].feature_bit);
6773 }
6774
6775 rc = pqi_enable_firmware_features(ctrl_info, firmware_features,
6776 firmware_features_iomem_addr);
6777 if (rc) {
6778 dev_err(&ctrl_info->pci_dev->dev,
6779 "failed to enable firmware features in PQI configuration table\n");
6780 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
6781 if (!pqi_firmware_features[i].supported)
6782 continue;
6783 pqi_firmware_feature_update(ctrl_info,
6784 &pqi_firmware_features[i]);
6785 }
6786 return;
6787 }
6788
6789 ctrl_info->soft_reset_handshake_supported = false;
6790 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
6791 if (!pqi_firmware_features[i].supported)
6792 continue;
6793 if (pqi_is_firmware_feature_enabled(firmware_features,
6794 firmware_features_iomem_addr,
6795 pqi_firmware_features[i].feature_bit)) {
6796 pqi_firmware_features[i].enabled = true;
6797 if (pqi_firmware_features[i].feature_bit ==
6798 PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE)
6799 ctrl_info->soft_reset_handshake_supported =
6800 true;
6801 }
6802 pqi_firmware_feature_update(ctrl_info,
6803 &pqi_firmware_features[i]);
6804 }
6805 }
6806
6807 static void pqi_init_firmware_features(void)
6808 {
6809 unsigned int i;
6810
6811 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
6812 pqi_firmware_features[i].supported = false;
6813 pqi_firmware_features[i].enabled = false;
6814 }
6815 }
6816
6817 static void pqi_process_firmware_features_section(
6818 struct pqi_config_table_section_info *section_info)
6819 {
6820 mutex_lock(&pqi_firmware_features_mutex);
6821 pqi_init_firmware_features();
6822 pqi_process_firmware_features(section_info);
6823 mutex_unlock(&pqi_firmware_features_mutex);
6824 }
6825
6826 static int pqi_process_config_table(struct pqi_ctrl_info *ctrl_info)
6827 {
6828 u32 table_length;
6829 u32 section_offset;
6830 void __iomem *table_iomem_addr;
6831 struct pqi_config_table *config_table;
6832 struct pqi_config_table_section_header *section;
6833 struct pqi_config_table_section_info section_info;
6834
6835 table_length = ctrl_info->config_table_length;
6836 if (table_length == 0)
6837 return 0;
6838
6839 config_table = kmalloc(table_length, GFP_KERNEL);
6840 if (!config_table) {
6841 dev_err(&ctrl_info->pci_dev->dev,
6842 "failed to allocate memory for PQI configuration table\n");
6843 return -ENOMEM;
6844 }
6845
6846 /*
6847 * Copy the config table contents from I/O memory space into the
6848 * temporary buffer.
6849 */
6850 table_iomem_addr = ctrl_info->iomem_base +
6851 ctrl_info->config_table_offset;
6852 memcpy_fromio(config_table, table_iomem_addr, table_length);
6853
6854 section_info.ctrl_info = ctrl_info;
6855 section_offset =
6856 get_unaligned_le32(&config_table->first_section_offset);
6857
6858 while (section_offset) {
6859 section = (void *)config_table + section_offset;
6860
6861 section_info.section = section;
6862 section_info.section_offset = section_offset;
6863 section_info.section_iomem_addr =
6864 table_iomem_addr + section_offset;
6865
6866 switch (get_unaligned_le16(&section->section_id)) {
6867 case PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES:
6868 pqi_process_firmware_features_section(&section_info);
6869 break;
6870 case PQI_CONFIG_TABLE_SECTION_HEARTBEAT:
6871 if (pqi_disable_heartbeat)
6872 dev_warn(&ctrl_info->pci_dev->dev,
6873 "heartbeat disabled by module parameter\n");
6874 else
6875 ctrl_info->heartbeat_counter =
6876 table_iomem_addr +
6877 section_offset +
6878 offsetof(
6879 struct pqi_config_table_heartbeat,
6880 heartbeat_counter);
6881 break;
6882 case PQI_CONFIG_TABLE_SECTION_SOFT_RESET:
6883 ctrl_info->soft_reset_status =
6884 table_iomem_addr +
6885 section_offset +
6886 offsetof(struct pqi_config_table_soft_reset,
6887 soft_reset_status);
6888 break;
6889 }
6890
6891 section_offset =
6892 get_unaligned_le16(&section->next_section_offset);
6893 }
6894
6895 kfree(config_table);
6896
6897 return 0;
6898 }
6899
6900 /* Switches the controller from PQI mode back into SIS mode. */
6901
6902 static int pqi_revert_to_sis_mode(struct pqi_ctrl_info *ctrl_info)
6903 {
6904 int rc;
6905
6906 pqi_change_irq_mode(ctrl_info, IRQ_MODE_NONE);
6907 rc = pqi_reset(ctrl_info);
6908 if (rc)
6909 return rc;
6910 rc = sis_reenable_sis_mode(ctrl_info);
6911 if (rc) {
6912 dev_err(&ctrl_info->pci_dev->dev,
6913 "re-enabling SIS mode failed with error %d\n", rc);
6914 return rc;
6915 }
6916 pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
6917
6918 return 0;
6919 }
6920
6921 /*
6922 * If the controller isn't already in SIS mode, this function forces it into
6923 * SIS mode.
6924 */
6925
6926 static int pqi_force_sis_mode(struct pqi_ctrl_info *ctrl_info)
6927 {
6928 if (!sis_is_firmware_running(ctrl_info))
6929 return -ENXIO;
6930
6931 if (pqi_get_ctrl_mode(ctrl_info) == SIS_MODE)
6932 return 0;
6933
6934 if (sis_is_kernel_up(ctrl_info)) {
6935 pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
6936 return 0;
6937 }
6938
6939 return pqi_revert_to_sis_mode(ctrl_info);
6940 }
6941
6942 static int pqi_ctrl_init(struct pqi_ctrl_info *ctrl_info)
6943 {
6944 int rc;
6945
6946 rc = pqi_force_sis_mode(ctrl_info);
6947 if (rc)
6948 return rc;
6949
6950 /*
6951 * Wait until the controller is ready to start accepting SIS
6952 * commands.
6953 */
6954 rc = sis_wait_for_ctrl_ready(ctrl_info);
6955 if (rc)
6956 return rc;
6957
6958 /*
6959 * Get the controller properties. This allows us to determine
6960 * whether or not it supports PQI mode.
6961 */
6962 rc = sis_get_ctrl_properties(ctrl_info);
6963 if (rc) {
6964 dev_err(&ctrl_info->pci_dev->dev,
6965 "error obtaining controller properties\n");
6966 return rc;
6967 }
6968
6969 rc = sis_get_pqi_capabilities(ctrl_info);
6970 if (rc) {
6971 dev_err(&ctrl_info->pci_dev->dev,
6972 "error obtaining controller capabilities\n");
6973 return rc;
6974 }
6975
6976 if (reset_devices) {
6977 if (ctrl_info->max_outstanding_requests >
6978 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP)
6979 ctrl_info->max_outstanding_requests =
6980 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP;
6981 } else {
6982 if (ctrl_info->max_outstanding_requests >
6983 PQI_MAX_OUTSTANDING_REQUESTS)
6984 ctrl_info->max_outstanding_requests =
6985 PQI_MAX_OUTSTANDING_REQUESTS;
6986 }
6987
6988 pqi_calculate_io_resources(ctrl_info);
6989
6990 rc = pqi_alloc_error_buffer(ctrl_info);
6991 if (rc) {
6992 dev_err(&ctrl_info->pci_dev->dev,
6993 "failed to allocate PQI error buffer\n");
6994 return rc;
6995 }
6996
6997 /*
6998 * If the function we are about to call succeeds, the
6999 * controller will transition from legacy SIS mode
7000 * into PQI mode.
7001 */
7002 rc = sis_init_base_struct_addr(ctrl_info);
7003 if (rc) {
7004 dev_err(&ctrl_info->pci_dev->dev,
7005 "error initializing PQI mode\n");
7006 return rc;
7007 }
7008
7009 /* Wait for the controller to complete the SIS -> PQI transition. */
7010 rc = pqi_wait_for_pqi_mode_ready(ctrl_info);
7011 if (rc) {
7012 dev_err(&ctrl_info->pci_dev->dev,
7013 "transition to PQI mode failed\n");
7014 return rc;
7015 }
7016
7017 /* From here on, we are running in PQI mode. */
7018 ctrl_info->pqi_mode_enabled = true;
7019 pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
7020
7021 rc = pqi_alloc_admin_queues(ctrl_info);
7022 if (rc) {
7023 dev_err(&ctrl_info->pci_dev->dev,
7024 "failed to allocate admin queues\n");
7025 return rc;
7026 }
7027
7028 rc = pqi_create_admin_queues(ctrl_info);
7029 if (rc) {
7030 dev_err(&ctrl_info->pci_dev->dev,
7031 "error creating admin queues\n");
7032 return rc;
7033 }
7034
7035 rc = pqi_report_device_capability(ctrl_info);
7036 if (rc) {
7037 dev_err(&ctrl_info->pci_dev->dev,
7038 "obtaining device capability failed\n");
7039 return rc;
7040 }
7041
7042 rc = pqi_validate_device_capability(ctrl_info);
7043 if (rc)
7044 return rc;
7045
7046 pqi_calculate_queue_resources(ctrl_info);
7047
7048 rc = pqi_enable_msix_interrupts(ctrl_info);
7049 if (rc)
7050 return rc;
7051
7052 if (ctrl_info->num_msix_vectors_enabled < ctrl_info->num_queue_groups) {
7053 ctrl_info->max_msix_vectors =
7054 ctrl_info->num_msix_vectors_enabled;
7055 pqi_calculate_queue_resources(ctrl_info);
7056 }
7057
7058 rc = pqi_alloc_io_resources(ctrl_info);
7059 if (rc)
7060 return rc;
7061
7062 rc = pqi_alloc_operational_queues(ctrl_info);
7063 if (rc) {
7064 dev_err(&ctrl_info->pci_dev->dev,
7065 "failed to allocate operational queues\n");
7066 return rc;
7067 }
7068
7069 pqi_init_operational_queues(ctrl_info);
7070
7071 rc = pqi_request_irqs(ctrl_info);
7072 if (rc)
7073 return rc;
7074
7075 rc = pqi_create_queues(ctrl_info);
7076 if (rc)
7077 return rc;
7078
7079 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX);
7080
7081 ctrl_info->controller_online = true;
7082
7083 rc = pqi_process_config_table(ctrl_info);
7084 if (rc)
7085 return rc;
7086
7087 pqi_start_heartbeat_timer(ctrl_info);
7088
7089 rc = pqi_enable_events(ctrl_info);
7090 if (rc) {
7091 dev_err(&ctrl_info->pci_dev->dev,
7092 "error enabling events\n");
7093 return rc;
7094 }
7095
7096 /* Register with the SCSI subsystem. */
7097 rc = pqi_register_scsi(ctrl_info);
7098 if (rc)
7099 return rc;
7100
7101 rc = pqi_get_ctrl_firmware_version(ctrl_info);
7102 if (rc) {
7103 dev_err(&ctrl_info->pci_dev->dev,
7104 "error obtaining firmware version\n");
7105 return rc;
7106 }
7107
7108 rc = pqi_set_diag_rescan(ctrl_info);
7109 if (rc) {
7110 dev_err(&ctrl_info->pci_dev->dev,
7111 "error enabling multi-lun rescan\n");
7112 return rc;
7113 }
7114
7115 rc = pqi_write_driver_version_to_host_wellness(ctrl_info);
7116 if (rc) {
7117 dev_err(&ctrl_info->pci_dev->dev,
7118 "error updating host wellness\n");
7119 return rc;
7120 }
7121
7122 pqi_schedule_update_time_worker(ctrl_info);
7123
7124 pqi_scan_scsi_devices(ctrl_info);
7125
7126 return 0;
7127 }
7128
7129 static void pqi_reinit_queues(struct pqi_ctrl_info *ctrl_info)
7130 {
7131 unsigned int i;
7132 struct pqi_admin_queues *admin_queues;
7133 struct pqi_event_queue *event_queue;
7134
7135 admin_queues = &ctrl_info->admin_queues;
7136 admin_queues->iq_pi_copy = 0;
7137 admin_queues->oq_ci_copy = 0;
7138 writel(0, admin_queues->oq_pi);
7139
7140 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
7141 ctrl_info->queue_groups[i].iq_pi_copy[RAID_PATH] = 0;
7142 ctrl_info->queue_groups[i].iq_pi_copy[AIO_PATH] = 0;
7143 ctrl_info->queue_groups[i].oq_ci_copy = 0;
7144
7145 writel(0, ctrl_info->queue_groups[i].iq_ci[RAID_PATH]);
7146 writel(0, ctrl_info->queue_groups[i].iq_ci[AIO_PATH]);
7147 writel(0, ctrl_info->queue_groups[i].oq_pi);
7148 }
7149
7150 event_queue = &ctrl_info->event_queue;
7151 writel(0, event_queue->oq_pi);
7152 event_queue->oq_ci_copy = 0;
7153 }
7154
7155 static int pqi_ctrl_init_resume(struct pqi_ctrl_info *ctrl_info)
7156 {
7157 int rc;
7158
7159 rc = pqi_force_sis_mode(ctrl_info);
7160 if (rc)
7161 return rc;
7162
7163 /*
7164 * Wait until the controller is ready to start accepting SIS
7165 * commands.
7166 */
7167 rc = sis_wait_for_ctrl_ready_resume(ctrl_info);
7168 if (rc)
7169 return rc;
7170
7171 /*
7172 * Get the controller properties. This allows us to determine
7173 * whether or not it supports PQI mode.
7174 */
7175 rc = sis_get_ctrl_properties(ctrl_info);
7176 if (rc) {
7177 dev_err(&ctrl_info->pci_dev->dev,
7178 "error obtaining controller properties\n");
7179 return rc;
7180 }
7181
7182 rc = sis_get_pqi_capabilities(ctrl_info);
7183 if (rc) {
7184 dev_err(&ctrl_info->pci_dev->dev,
7185 "error obtaining controller capabilities\n");
7186 return rc;
7187 }
7188
7189 /*
7190 * If the function we are about to call succeeds, the
7191 * controller will transition from legacy SIS mode
7192 * into PQI mode.
7193 */
7194 rc = sis_init_base_struct_addr(ctrl_info);
7195 if (rc) {
7196 dev_err(&ctrl_info->pci_dev->dev,
7197 "error initializing PQI mode\n");
7198 return rc;
7199 }
7200
7201 /* Wait for the controller to complete the SIS -> PQI transition. */
7202 rc = pqi_wait_for_pqi_mode_ready(ctrl_info);
7203 if (rc) {
7204 dev_err(&ctrl_info->pci_dev->dev,
7205 "transition to PQI mode failed\n");
7206 return rc;
7207 }
7208
7209 /* From here on, we are running in PQI mode. */
7210 ctrl_info->pqi_mode_enabled = true;
7211 pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
7212
7213 pqi_reinit_queues(ctrl_info);
7214
7215 rc = pqi_create_admin_queues(ctrl_info);
7216 if (rc) {
7217 dev_err(&ctrl_info->pci_dev->dev,
7218 "error creating admin queues\n");
7219 return rc;
7220 }
7221
7222 rc = pqi_create_queues(ctrl_info);
7223 if (rc)
7224 return rc;
7225
7226 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX);
7227
7228 ctrl_info->controller_online = true;
7229 pqi_ctrl_unblock_requests(ctrl_info);
7230
7231 rc = pqi_process_config_table(ctrl_info);
7232 if (rc)
7233 return rc;
7234
7235 pqi_start_heartbeat_timer(ctrl_info);
7236
7237 rc = pqi_enable_events(ctrl_info);
7238 if (rc) {
7239 dev_err(&ctrl_info->pci_dev->dev,
7240 "error enabling events\n");
7241 return rc;
7242 }
7243
7244 rc = pqi_get_ctrl_firmware_version(ctrl_info);
7245 if (rc) {
7246 dev_err(&ctrl_info->pci_dev->dev,
7247 "error obtaining firmware version\n");
7248 return rc;
7249 }
7250
7251 rc = pqi_set_diag_rescan(ctrl_info);
7252 if (rc) {
7253 dev_err(&ctrl_info->pci_dev->dev,
7254 "error enabling multi-lun rescan\n");
7255 return rc;
7256 }
7257
7258 rc = pqi_write_driver_version_to_host_wellness(ctrl_info);
7259 if (rc) {
7260 dev_err(&ctrl_info->pci_dev->dev,
7261 "error updating host wellness\n");
7262 return rc;
7263 }
7264
7265 pqi_schedule_update_time_worker(ctrl_info);
7266
7267 pqi_scan_scsi_devices(ctrl_info);
7268
7269 return 0;
7270 }
7271
7272 static inline int pqi_set_pcie_completion_timeout(struct pci_dev *pci_dev,
7273 u16 timeout)
7274 {
7275 return pcie_capability_clear_and_set_word(pci_dev, PCI_EXP_DEVCTL2,
7276 PCI_EXP_DEVCTL2_COMP_TIMEOUT, timeout);
7277 }
7278
7279 static int pqi_pci_init(struct pqi_ctrl_info *ctrl_info)
7280 {
7281 int rc;
7282 u64 mask;
7283
7284 rc = pci_enable_device(ctrl_info->pci_dev);
7285 if (rc) {
7286 dev_err(&ctrl_info->pci_dev->dev,
7287 "failed to enable PCI device\n");
7288 return rc;
7289 }
7290
7291 if (sizeof(dma_addr_t) > 4)
7292 mask = DMA_BIT_MASK(64);
7293 else
7294 mask = DMA_BIT_MASK(32);
7295
7296 rc = dma_set_mask_and_coherent(&ctrl_info->pci_dev->dev, mask);
7297 if (rc) {
7298 dev_err(&ctrl_info->pci_dev->dev, "failed to set DMA mask\n");
7299 goto disable_device;
7300 }
7301
7302 rc = pci_request_regions(ctrl_info->pci_dev, DRIVER_NAME_SHORT);
7303 if (rc) {
7304 dev_err(&ctrl_info->pci_dev->dev,
7305 "failed to obtain PCI resources\n");
7306 goto disable_device;
7307 }
7308
7309 ctrl_info->iomem_base = ioremap_nocache(pci_resource_start(
7310 ctrl_info->pci_dev, 0),
7311 sizeof(struct pqi_ctrl_registers));
7312 if (!ctrl_info->iomem_base) {
7313 dev_err(&ctrl_info->pci_dev->dev,
7314 "failed to map memory for controller registers\n");
7315 rc = -ENOMEM;
7316 goto release_regions;
7317 }
7318
7319 #define PCI_EXP_COMP_TIMEOUT_65_TO_210_MS 0x6
7320
7321 /* Increase the PCIe completion timeout. */
7322 rc = pqi_set_pcie_completion_timeout(ctrl_info->pci_dev,
7323 PCI_EXP_COMP_TIMEOUT_65_TO_210_MS);
7324 if (rc) {
7325 dev_err(&ctrl_info->pci_dev->dev,
7326 "failed to set PCIe completion timeout\n");
7327 goto release_regions;
7328 }
7329
7330 /* Enable bus mastering. */
7331 pci_set_master(ctrl_info->pci_dev);
7332
7333 ctrl_info->registers = ctrl_info->iomem_base;
7334 ctrl_info->pqi_registers = &ctrl_info->registers->pqi_registers;
7335
7336 pci_set_drvdata(ctrl_info->pci_dev, ctrl_info);
7337
7338 return 0;
7339
7340 release_regions:
7341 pci_release_regions(ctrl_info->pci_dev);
7342 disable_device:
7343 pci_disable_device(ctrl_info->pci_dev);
7344
7345 return rc;
7346 }
7347
7348 static void pqi_cleanup_pci_init(struct pqi_ctrl_info *ctrl_info)
7349 {
7350 iounmap(ctrl_info->iomem_base);
7351 pci_release_regions(ctrl_info->pci_dev);
7352 if (pci_is_enabled(ctrl_info->pci_dev))
7353 pci_disable_device(ctrl_info->pci_dev);
7354 pci_set_drvdata(ctrl_info->pci_dev, NULL);
7355 }
7356
7357 static struct pqi_ctrl_info *pqi_alloc_ctrl_info(int numa_node)
7358 {
7359 struct pqi_ctrl_info *ctrl_info;
7360
7361 ctrl_info = kzalloc_node(sizeof(struct pqi_ctrl_info),
7362 GFP_KERNEL, numa_node);
7363 if (!ctrl_info)
7364 return NULL;
7365
7366 mutex_init(&ctrl_info->scan_mutex);
7367 mutex_init(&ctrl_info->lun_reset_mutex);
7368 mutex_init(&ctrl_info->ofa_mutex);
7369
7370 INIT_LIST_HEAD(&ctrl_info->scsi_device_list);
7371 spin_lock_init(&ctrl_info->scsi_device_list_lock);
7372
7373 INIT_WORK(&ctrl_info->event_work, pqi_event_worker);
7374 atomic_set(&ctrl_info->num_interrupts, 0);
7375
7376 INIT_DELAYED_WORK(&ctrl_info->rescan_work, pqi_rescan_worker);
7377 INIT_DELAYED_WORK(&ctrl_info->update_time_work, pqi_update_time_worker);
7378
7379 timer_setup(&ctrl_info->heartbeat_timer, pqi_heartbeat_timer_handler, 0);
7380 INIT_WORK(&ctrl_info->ctrl_offline_work, pqi_ctrl_offline_worker);
7381
7382 sema_init(&ctrl_info->sync_request_sem,
7383 PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS);
7384 init_waitqueue_head(&ctrl_info->block_requests_wait);
7385
7386 INIT_LIST_HEAD(&ctrl_info->raid_bypass_retry_list);
7387 spin_lock_init(&ctrl_info->raid_bypass_retry_list_lock);
7388 INIT_WORK(&ctrl_info->raid_bypass_retry_work,
7389 pqi_raid_bypass_retry_worker);
7390
7391 ctrl_info->ctrl_id = atomic_inc_return(&pqi_controller_count) - 1;
7392 ctrl_info->irq_mode = IRQ_MODE_NONE;
7393 ctrl_info->max_msix_vectors = PQI_MAX_MSIX_VECTORS;
7394
7395 return ctrl_info;
7396 }
7397
7398 static inline void pqi_free_ctrl_info(struct pqi_ctrl_info *ctrl_info)
7399 {
7400 kfree(ctrl_info);
7401 }
7402
7403 static void pqi_free_interrupts(struct pqi_ctrl_info *ctrl_info)
7404 {
7405 pqi_free_irqs(ctrl_info);
7406 pqi_disable_msix_interrupts(ctrl_info);
7407 }
7408
7409 static void pqi_free_ctrl_resources(struct pqi_ctrl_info *ctrl_info)
7410 {
7411 pqi_stop_heartbeat_timer(ctrl_info);
7412 pqi_free_interrupts(ctrl_info);
7413 if (ctrl_info->queue_memory_base)
7414 dma_free_coherent(&ctrl_info->pci_dev->dev,
7415 ctrl_info->queue_memory_length,
7416 ctrl_info->queue_memory_base,
7417 ctrl_info->queue_memory_base_dma_handle);
7418 if (ctrl_info->admin_queue_memory_base)
7419 dma_free_coherent(&ctrl_info->pci_dev->dev,
7420 ctrl_info->admin_queue_memory_length,
7421 ctrl_info->admin_queue_memory_base,
7422 ctrl_info->admin_queue_memory_base_dma_handle);
7423 pqi_free_all_io_requests(ctrl_info);
7424 if (ctrl_info->error_buffer)
7425 dma_free_coherent(&ctrl_info->pci_dev->dev,
7426 ctrl_info->error_buffer_length,
7427 ctrl_info->error_buffer,
7428 ctrl_info->error_buffer_dma_handle);
7429 if (ctrl_info->iomem_base)
7430 pqi_cleanup_pci_init(ctrl_info);
7431 pqi_free_ctrl_info(ctrl_info);
7432 }
7433
7434 static void pqi_remove_ctrl(struct pqi_ctrl_info *ctrl_info)
7435 {
7436 pqi_cancel_rescan_worker(ctrl_info);
7437 pqi_cancel_update_time_worker(ctrl_info);
7438 pqi_remove_all_scsi_devices(ctrl_info);
7439 pqi_unregister_scsi(ctrl_info);
7440 if (ctrl_info->pqi_mode_enabled)
7441 pqi_revert_to_sis_mode(ctrl_info);
7442 pqi_free_ctrl_resources(ctrl_info);
7443 }
7444
7445 static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info)
7446 {
7447 pqi_cancel_update_time_worker(ctrl_info);
7448 pqi_cancel_rescan_worker(ctrl_info);
7449 pqi_wait_until_lun_reset_finished(ctrl_info);
7450 pqi_wait_until_scan_finished(ctrl_info);
7451 pqi_ctrl_ofa_start(ctrl_info);
7452 pqi_ctrl_block_requests(ctrl_info);
7453 pqi_ctrl_wait_until_quiesced(ctrl_info);
7454 pqi_ctrl_wait_for_pending_io(ctrl_info, PQI_PENDING_IO_TIMEOUT_SECS);
7455 pqi_fail_io_queued_for_all_devices(ctrl_info);
7456 pqi_wait_until_inbound_queues_empty(ctrl_info);
7457 pqi_stop_heartbeat_timer(ctrl_info);
7458 ctrl_info->pqi_mode_enabled = false;
7459 pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
7460 }
7461
7462 static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info)
7463 {
7464 pqi_ofa_free_host_buffer(ctrl_info);
7465 ctrl_info->pqi_mode_enabled = true;
7466 pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
7467 ctrl_info->controller_online = true;
7468 pqi_ctrl_unblock_requests(ctrl_info);
7469 pqi_start_heartbeat_timer(ctrl_info);
7470 pqi_schedule_update_time_worker(ctrl_info);
7471 pqi_clear_soft_reset_status(ctrl_info,
7472 PQI_SOFT_RESET_ABORT);
7473 pqi_scan_scsi_devices(ctrl_info);
7474 }
7475
7476 static int pqi_ofa_alloc_mem(struct pqi_ctrl_info *ctrl_info,
7477 u32 total_size, u32 chunk_size)
7478 {
7479 u32 sg_count;
7480 u32 size;
7481 int i;
7482 struct pqi_sg_descriptor *mem_descriptor = NULL;
7483 struct device *dev;
7484 struct pqi_ofa_memory *ofap;
7485
7486 dev = &ctrl_info->pci_dev->dev;
7487
7488 sg_count = (total_size + chunk_size - 1);
7489 sg_count /= chunk_size;
7490
7491 ofap = ctrl_info->pqi_ofa_mem_virt_addr;
7492
7493 if (sg_count*chunk_size < total_size)
7494 goto out;
7495
7496 ctrl_info->pqi_ofa_chunk_virt_addr =
7497 kcalloc(sg_count, sizeof(void *), GFP_KERNEL);
7498 if (!ctrl_info->pqi_ofa_chunk_virt_addr)
7499 goto out;
7500
7501 for (size = 0, i = 0; size < total_size; size += chunk_size, i++) {
7502 dma_addr_t dma_handle;
7503
7504 ctrl_info->pqi_ofa_chunk_virt_addr[i] =
7505 dma_alloc_coherent(dev, chunk_size, &dma_handle,
7506 GFP_KERNEL);
7507
7508 if (!ctrl_info->pqi_ofa_chunk_virt_addr[i])
7509 break;
7510
7511 mem_descriptor = &ofap->sg_descriptor[i];
7512 put_unaligned_le64 ((u64) dma_handle, &mem_descriptor->address);
7513 put_unaligned_le32 (chunk_size, &mem_descriptor->length);
7514 }
7515
7516 if (!size || size < total_size)
7517 goto out_free_chunks;
7518
7519 put_unaligned_le32(CISS_SG_LAST, &mem_descriptor->flags);
7520 put_unaligned_le16(sg_count, &ofap->num_memory_descriptors);
7521 put_unaligned_le32(size, &ofap->bytes_allocated);
7522
7523 return 0;
7524
7525 out_free_chunks:
7526 while (--i >= 0) {
7527 mem_descriptor = &ofap->sg_descriptor[i];
7528 dma_free_coherent(dev, chunk_size,
7529 ctrl_info->pqi_ofa_chunk_virt_addr[i],
7530 get_unaligned_le64(&mem_descriptor->address));
7531 }
7532 kfree(ctrl_info->pqi_ofa_chunk_virt_addr);
7533
7534 out:
7535 put_unaligned_le32 (0, &ofap->bytes_allocated);
7536 return -ENOMEM;
7537 }
7538
7539 static int pqi_ofa_alloc_host_buffer(struct pqi_ctrl_info *ctrl_info)
7540 {
7541 u32 total_size;
7542 u32 min_chunk_size;
7543 u32 chunk_sz;
7544
7545 total_size = le32_to_cpu(
7546 ctrl_info->pqi_ofa_mem_virt_addr->bytes_allocated);
7547 min_chunk_size = total_size / PQI_OFA_MAX_SG_DESCRIPTORS;
7548
7549 for (chunk_sz = total_size; chunk_sz >= min_chunk_size; chunk_sz /= 2)
7550 if (!pqi_ofa_alloc_mem(ctrl_info, total_size, chunk_sz))
7551 return 0;
7552
7553 return -ENOMEM;
7554 }
7555
7556 static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info,
7557 u32 bytes_requested)
7558 {
7559 struct pqi_ofa_memory *pqi_ofa_memory;
7560 struct device *dev;
7561
7562 dev = &ctrl_info->pci_dev->dev;
7563 pqi_ofa_memory = dma_alloc_coherent(dev,
7564 PQI_OFA_MEMORY_DESCRIPTOR_LENGTH,
7565 &ctrl_info->pqi_ofa_mem_dma_handle,
7566 GFP_KERNEL);
7567
7568 if (!pqi_ofa_memory)
7569 return;
7570
7571 put_unaligned_le16(PQI_OFA_VERSION, &pqi_ofa_memory->version);
7572 memcpy(&pqi_ofa_memory->signature, PQI_OFA_SIGNATURE,
7573 sizeof(pqi_ofa_memory->signature));
7574 pqi_ofa_memory->bytes_allocated = cpu_to_le32(bytes_requested);
7575
7576 ctrl_info->pqi_ofa_mem_virt_addr = pqi_ofa_memory;
7577
7578 if (pqi_ofa_alloc_host_buffer(ctrl_info) < 0) {
7579 dev_err(dev, "Failed to allocate host buffer of size = %u",
7580 bytes_requested);
7581 }
7582 }
7583
7584 static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info)
7585 {
7586 int i;
7587 struct pqi_sg_descriptor *mem_descriptor;
7588 struct pqi_ofa_memory *ofap;
7589
7590 ofap = ctrl_info->pqi_ofa_mem_virt_addr;
7591
7592 if (!ofap)
7593 return;
7594
7595 if (!ofap->bytes_allocated)
7596 goto out;
7597
7598 mem_descriptor = ofap->sg_descriptor;
7599
7600 for (i = 0; i < get_unaligned_le16(&ofap->num_memory_descriptors);
7601 i++) {
7602 dma_free_coherent(&ctrl_info->pci_dev->dev,
7603 get_unaligned_le32(&mem_descriptor[i].length),
7604 ctrl_info->pqi_ofa_chunk_virt_addr[i],
7605 get_unaligned_le64(&mem_descriptor[i].address));
7606 }
7607 kfree(ctrl_info->pqi_ofa_chunk_virt_addr);
7608
7609 out:
7610 dma_free_coherent(&ctrl_info->pci_dev->dev,
7611 PQI_OFA_MEMORY_DESCRIPTOR_LENGTH, ofap,
7612 ctrl_info->pqi_ofa_mem_dma_handle);
7613 ctrl_info->pqi_ofa_mem_virt_addr = NULL;
7614 }
7615
7616 static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info)
7617 {
7618 struct pqi_vendor_general_request request;
7619 size_t size;
7620 struct pqi_ofa_memory *ofap;
7621
7622 memset(&request, 0, sizeof(request));
7623
7624 ofap = ctrl_info->pqi_ofa_mem_virt_addr;
7625
7626 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL;
7627 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
7628 &request.header.iu_length);
7629 put_unaligned_le16(PQI_VENDOR_GENERAL_HOST_MEMORY_UPDATE,
7630 &request.function_code);
7631
7632 if (ofap) {
7633 size = offsetof(struct pqi_ofa_memory, sg_descriptor) +
7634 get_unaligned_le16(&ofap->num_memory_descriptors) *
7635 sizeof(struct pqi_sg_descriptor);
7636
7637 put_unaligned_le64((u64)ctrl_info->pqi_ofa_mem_dma_handle,
7638 &request.data.ofa_memory_allocation.buffer_address);
7639 put_unaligned_le32(size,
7640 &request.data.ofa_memory_allocation.buffer_length);
7641
7642 }
7643
7644 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
7645 0, NULL, NO_TIMEOUT);
7646 }
7647
7648 #define PQI_POST_RESET_DELAY_B4_MSGU_READY 5000
7649
7650 static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info)
7651 {
7652 msleep(PQI_POST_RESET_DELAY_B4_MSGU_READY);
7653 return pqi_ctrl_init_resume(ctrl_info);
7654 }
7655
7656 static void pqi_perform_lockup_action(void)
7657 {
7658 switch (pqi_lockup_action) {
7659 case PANIC:
7660 panic("FATAL: Smart Family Controller lockup detected");
7661 break;
7662 case REBOOT:
7663 emergency_restart();
7664 break;
7665 case NONE:
7666 default:
7667 break;
7668 }
7669 }
7670
7671 static struct pqi_raid_error_info pqi_ctrl_offline_raid_error_info = {
7672 .data_out_result = PQI_DATA_IN_OUT_HARDWARE_ERROR,
7673 .status = SAM_STAT_CHECK_CONDITION,
7674 };
7675
7676 static void pqi_fail_all_outstanding_requests(struct pqi_ctrl_info *ctrl_info)
7677 {
7678 unsigned int i;
7679 struct pqi_io_request *io_request;
7680 struct scsi_cmnd *scmd;
7681
7682 for (i = 0; i < ctrl_info->max_io_slots; i++) {
7683 io_request = &ctrl_info->io_request_pool[i];
7684 if (atomic_read(&io_request->refcount) == 0)
7685 continue;
7686
7687 scmd = io_request->scmd;
7688 if (scmd) {
7689 set_host_byte(scmd, DID_NO_CONNECT);
7690 } else {
7691 io_request->status = -ENXIO;
7692 io_request->error_info =
7693 &pqi_ctrl_offline_raid_error_info;
7694 }
7695
7696 io_request->io_complete_callback(io_request,
7697 io_request->context);
7698 }
7699 }
7700
7701 static void pqi_take_ctrl_offline_deferred(struct pqi_ctrl_info *ctrl_info)
7702 {
7703 pqi_perform_lockup_action();
7704 pqi_stop_heartbeat_timer(ctrl_info);
7705 pqi_free_interrupts(ctrl_info);
7706 pqi_cancel_rescan_worker(ctrl_info);
7707 pqi_cancel_update_time_worker(ctrl_info);
7708 pqi_ctrl_wait_until_quiesced(ctrl_info);
7709 pqi_fail_all_outstanding_requests(ctrl_info);
7710 pqi_clear_all_queued_raid_bypass_retries(ctrl_info);
7711 pqi_ctrl_unblock_requests(ctrl_info);
7712 }
7713
7714 static void pqi_ctrl_offline_worker(struct work_struct *work)
7715 {
7716 struct pqi_ctrl_info *ctrl_info;
7717
7718 ctrl_info = container_of(work, struct pqi_ctrl_info, ctrl_offline_work);
7719 pqi_take_ctrl_offline_deferred(ctrl_info);
7720 }
7721
7722 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info)
7723 {
7724 if (!ctrl_info->controller_online)
7725 return;
7726
7727 ctrl_info->controller_online = false;
7728 ctrl_info->pqi_mode_enabled = false;
7729 pqi_ctrl_block_requests(ctrl_info);
7730 if (!pqi_disable_ctrl_shutdown)
7731 sis_shutdown_ctrl(ctrl_info);
7732 pci_disable_device(ctrl_info->pci_dev);
7733 dev_err(&ctrl_info->pci_dev->dev, "controller offline\n");
7734 schedule_work(&ctrl_info->ctrl_offline_work);
7735 }
7736
7737 static void pqi_print_ctrl_info(struct pci_dev *pci_dev,
7738 const struct pci_device_id *id)
7739 {
7740 char *ctrl_description;
7741
7742 if (id->driver_data)
7743 ctrl_description = (char *)id->driver_data;
7744 else
7745 ctrl_description = "Microsemi Smart Family Controller";
7746
7747 dev_info(&pci_dev->dev, "%s found\n", ctrl_description);
7748 }
7749
7750 static int pqi_pci_probe(struct pci_dev *pci_dev,
7751 const struct pci_device_id *id)
7752 {
7753 int rc;
7754 int node, cp_node;
7755 struct pqi_ctrl_info *ctrl_info;
7756
7757 pqi_print_ctrl_info(pci_dev, id);
7758
7759 if (pqi_disable_device_id_wildcards &&
7760 id->subvendor == PCI_ANY_ID &&
7761 id->subdevice == PCI_ANY_ID) {
7762 dev_warn(&pci_dev->dev,
7763 "controller not probed because device ID wildcards are disabled\n");
7764 return -ENODEV;
7765 }
7766
7767 if (id->subvendor == PCI_ANY_ID || id->subdevice == PCI_ANY_ID)
7768 dev_warn(&pci_dev->dev,
7769 "controller device ID matched using wildcards\n");
7770
7771 node = dev_to_node(&pci_dev->dev);
7772 if (node == NUMA_NO_NODE) {
7773 cp_node = cpu_to_node(0);
7774 if (cp_node == NUMA_NO_NODE)
7775 cp_node = 0;
7776 set_dev_node(&pci_dev->dev, cp_node);
7777 }
7778
7779 ctrl_info = pqi_alloc_ctrl_info(node);
7780 if (!ctrl_info) {
7781 dev_err(&pci_dev->dev,
7782 "failed to allocate controller info block\n");
7783 return -ENOMEM;
7784 }
7785
7786 ctrl_info->pci_dev = pci_dev;
7787
7788 rc = pqi_pci_init(ctrl_info);
7789 if (rc)
7790 goto error;
7791
7792 rc = pqi_ctrl_init(ctrl_info);
7793 if (rc)
7794 goto error;
7795
7796 return 0;
7797
7798 error:
7799 pqi_remove_ctrl(ctrl_info);
7800
7801 return rc;
7802 }
7803
7804 static void pqi_pci_remove(struct pci_dev *pci_dev)
7805 {
7806 struct pqi_ctrl_info *ctrl_info;
7807
7808 ctrl_info = pci_get_drvdata(pci_dev);
7809 if (!ctrl_info)
7810 return;
7811
7812 ctrl_info->in_shutdown = true;
7813
7814 pqi_remove_ctrl(ctrl_info);
7815 }
7816
7817 static void pqi_shutdown(struct pci_dev *pci_dev)
7818 {
7819 int rc;
7820 struct pqi_ctrl_info *ctrl_info;
7821
7822 ctrl_info = pci_get_drvdata(pci_dev);
7823 if (!ctrl_info)
7824 goto error;
7825
7826 /*
7827 * Write all data in the controller's battery-backed cache to
7828 * storage.
7829 */
7830 rc = pqi_flush_cache(ctrl_info, SHUTDOWN);
7831 pqi_free_interrupts(ctrl_info);
7832 pqi_reset(ctrl_info);
7833 if (rc == 0)
7834 return;
7835
7836 error:
7837 dev_warn(&pci_dev->dev,
7838 "unable to flush controller cache\n");
7839 }
7840
7841 static void pqi_process_lockup_action_param(void)
7842 {
7843 unsigned int i;
7844
7845 if (!pqi_lockup_action_param)
7846 return;
7847
7848 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
7849 if (strcmp(pqi_lockup_action_param,
7850 pqi_lockup_actions[i].name) == 0) {
7851 pqi_lockup_action = pqi_lockup_actions[i].action;
7852 return;
7853 }
7854 }
7855
7856 pr_warn("%s: invalid lockup action setting \"%s\" - supported settings: none, reboot, panic\n",
7857 DRIVER_NAME_SHORT, pqi_lockup_action_param);
7858 }
7859
7860 static void pqi_process_module_params(void)
7861 {
7862 pqi_process_lockup_action_param();
7863 }
7864
7865 static __maybe_unused int pqi_suspend(struct pci_dev *pci_dev, pm_message_t state)
7866 {
7867 struct pqi_ctrl_info *ctrl_info;
7868
7869 ctrl_info = pci_get_drvdata(pci_dev);
7870
7871 pqi_disable_events(ctrl_info);
7872 pqi_cancel_update_time_worker(ctrl_info);
7873 pqi_cancel_rescan_worker(ctrl_info);
7874 pqi_wait_until_scan_finished(ctrl_info);
7875 pqi_wait_until_lun_reset_finished(ctrl_info);
7876 pqi_wait_until_ofa_finished(ctrl_info);
7877 pqi_flush_cache(ctrl_info, SUSPEND);
7878 pqi_ctrl_block_requests(ctrl_info);
7879 pqi_ctrl_wait_until_quiesced(ctrl_info);
7880 pqi_wait_until_inbound_queues_empty(ctrl_info);
7881 pqi_ctrl_wait_for_pending_io(ctrl_info, NO_TIMEOUT);
7882 pqi_stop_heartbeat_timer(ctrl_info);
7883
7884 if (state.event == PM_EVENT_FREEZE)
7885 return 0;
7886
7887 pci_save_state(pci_dev);
7888 pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
7889
7890 ctrl_info->controller_online = false;
7891 ctrl_info->pqi_mode_enabled = false;
7892
7893 return 0;
7894 }
7895
7896 static __maybe_unused int pqi_resume(struct pci_dev *pci_dev)
7897 {
7898 int rc;
7899 struct pqi_ctrl_info *ctrl_info;
7900
7901 ctrl_info = pci_get_drvdata(pci_dev);
7902
7903 if (pci_dev->current_state != PCI_D0) {
7904 ctrl_info->max_hw_queue_index = 0;
7905 pqi_free_interrupts(ctrl_info);
7906 pqi_change_irq_mode(ctrl_info, IRQ_MODE_INTX);
7907 rc = request_irq(pci_irq_vector(pci_dev, 0), pqi_irq_handler,
7908 IRQF_SHARED, DRIVER_NAME_SHORT,
7909 &ctrl_info->queue_groups[0]);
7910 if (rc) {
7911 dev_err(&ctrl_info->pci_dev->dev,
7912 "irq %u init failed with error %d\n",
7913 pci_dev->irq, rc);
7914 return rc;
7915 }
7916 pqi_start_heartbeat_timer(ctrl_info);
7917 pqi_ctrl_unblock_requests(ctrl_info);
7918 return 0;
7919 }
7920
7921 pci_set_power_state(pci_dev, PCI_D0);
7922 pci_restore_state(pci_dev);
7923
7924 return pqi_ctrl_init_resume(ctrl_info);
7925 }
7926
7927 /* Define the PCI IDs for the controllers that we support. */
7928 static const struct pci_device_id pqi_pci_id_table[] = {
7929 {
7930 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7931 0x105b, 0x1211)
7932 },
7933 {
7934 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7935 0x105b, 0x1321)
7936 },
7937 {
7938 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7939 0x152d, 0x8a22)
7940 },
7941 {
7942 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7943 0x152d, 0x8a23)
7944 },
7945 {
7946 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7947 0x152d, 0x8a24)
7948 },
7949 {
7950 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7951 0x152d, 0x8a36)
7952 },
7953 {
7954 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7955 0x152d, 0x8a37)
7956 },
7957 {
7958 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7959 0x193d, 0x1104)
7960 },
7961 {
7962 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7963 0x193d, 0x1105)
7964 },
7965 {
7966 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7967 0x193d, 0x1106)
7968 },
7969 {
7970 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7971 0x193d, 0x1107)
7972 },
7973 {
7974 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7975 0x193d, 0x8460)
7976 },
7977 {
7978 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7979 0x193d, 0x8461)
7980 },
7981 {
7982 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7983 0x193d, 0xc460)
7984 },
7985 {
7986 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7987 0x193d, 0xc461)
7988 },
7989 {
7990 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7991 0x193d, 0xf460)
7992 },
7993 {
7994 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7995 0x193d, 0xf461)
7996 },
7997 {
7998 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7999 0x1bd4, 0x0045)
8000 },
8001 {
8002 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8003 0x1bd4, 0x0046)
8004 },
8005 {
8006 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8007 0x1bd4, 0x0047)
8008 },
8009 {
8010 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8011 0x1bd4, 0x0048)
8012 },
8013 {
8014 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8015 0x1bd4, 0x004a)
8016 },
8017 {
8018 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8019 0x1bd4, 0x004b)
8020 },
8021 {
8022 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8023 0x1bd4, 0x004c)
8024 },
8025 {
8026 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8027 0x19e5, 0xd227)
8028 },
8029 {
8030 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8031 0x19e5, 0xd228)
8032 },
8033 {
8034 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8035 0x19e5, 0xd229)
8036 },
8037 {
8038 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8039 0x19e5, 0xd22a)
8040 },
8041 {
8042 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8043 0x19e5, 0xd22b)
8044 },
8045 {
8046 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8047 0x19e5, 0xd22c)
8048 },
8049 {
8050 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8051 PCI_VENDOR_ID_ADAPTEC2, 0x0110)
8052 },
8053 {
8054 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8055 PCI_VENDOR_ID_ADAPTEC2, 0x0608)
8056 },
8057 {
8058 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8059 PCI_VENDOR_ID_ADAPTEC2, 0x0800)
8060 },
8061 {
8062 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8063 PCI_VENDOR_ID_ADAPTEC2, 0x0801)
8064 },
8065 {
8066 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8067 PCI_VENDOR_ID_ADAPTEC2, 0x0802)
8068 },
8069 {
8070 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8071 PCI_VENDOR_ID_ADAPTEC2, 0x0803)
8072 },
8073 {
8074 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8075 PCI_VENDOR_ID_ADAPTEC2, 0x0804)
8076 },
8077 {
8078 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8079 PCI_VENDOR_ID_ADAPTEC2, 0x0805)
8080 },
8081 {
8082 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8083 PCI_VENDOR_ID_ADAPTEC2, 0x0806)
8084 },
8085 {
8086 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8087 PCI_VENDOR_ID_ADAPTEC2, 0x0807)
8088 },
8089 {
8090 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8091 PCI_VENDOR_ID_ADAPTEC2, 0x0900)
8092 },
8093 {
8094 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8095 PCI_VENDOR_ID_ADAPTEC2, 0x0901)
8096 },
8097 {
8098 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8099 PCI_VENDOR_ID_ADAPTEC2, 0x0902)
8100 },
8101 {
8102 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8103 PCI_VENDOR_ID_ADAPTEC2, 0x0903)
8104 },
8105 {
8106 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8107 PCI_VENDOR_ID_ADAPTEC2, 0x0904)
8108 },
8109 {
8110 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8111 PCI_VENDOR_ID_ADAPTEC2, 0x0905)
8112 },
8113 {
8114 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8115 PCI_VENDOR_ID_ADAPTEC2, 0x0906)
8116 },
8117 {
8118 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8119 PCI_VENDOR_ID_ADAPTEC2, 0x0907)
8120 },
8121 {
8122 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8123 PCI_VENDOR_ID_ADAPTEC2, 0x0908)
8124 },
8125 {
8126 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8127 PCI_VENDOR_ID_ADAPTEC2, 0x090a)
8128 },
8129 {
8130 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8131 PCI_VENDOR_ID_ADAPTEC2, 0x1200)
8132 },
8133 {
8134 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8135 PCI_VENDOR_ID_ADAPTEC2, 0x1201)
8136 },
8137 {
8138 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8139 PCI_VENDOR_ID_ADAPTEC2, 0x1202)
8140 },
8141 {
8142 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8143 PCI_VENDOR_ID_ADAPTEC2, 0x1280)
8144 },
8145 {
8146 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8147 PCI_VENDOR_ID_ADAPTEC2, 0x1281)
8148 },
8149 {
8150 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8151 PCI_VENDOR_ID_ADAPTEC2, 0x1282)
8152 },
8153 {
8154 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8155 PCI_VENDOR_ID_ADAPTEC2, 0x1300)
8156 },
8157 {
8158 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8159 PCI_VENDOR_ID_ADAPTEC2, 0x1301)
8160 },
8161 {
8162 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8163 PCI_VENDOR_ID_ADAPTEC2, 0x1302)
8164 },
8165 {
8166 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8167 PCI_VENDOR_ID_ADAPTEC2, 0x1303)
8168 },
8169 {
8170 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8171 PCI_VENDOR_ID_ADAPTEC2, 0x1380)
8172 },
8173 {
8174 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8175 PCI_VENDOR_ID_ADVANTECH, 0x8312)
8176 },
8177 {
8178 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8179 PCI_VENDOR_ID_DELL, 0x1fe0)
8180 },
8181 {
8182 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8183 PCI_VENDOR_ID_HP, 0x0600)
8184 },
8185 {
8186 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8187 PCI_VENDOR_ID_HP, 0x0601)
8188 },
8189 {
8190 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8191 PCI_VENDOR_ID_HP, 0x0602)
8192 },
8193 {
8194 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8195 PCI_VENDOR_ID_HP, 0x0603)
8196 },
8197 {
8198 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8199 PCI_VENDOR_ID_HP, 0x0609)
8200 },
8201 {
8202 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8203 PCI_VENDOR_ID_HP, 0x0650)
8204 },
8205 {
8206 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8207 PCI_VENDOR_ID_HP, 0x0651)
8208 },
8209 {
8210 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8211 PCI_VENDOR_ID_HP, 0x0652)
8212 },
8213 {
8214 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8215 PCI_VENDOR_ID_HP, 0x0653)
8216 },
8217 {
8218 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8219 PCI_VENDOR_ID_HP, 0x0654)
8220 },
8221 {
8222 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8223 PCI_VENDOR_ID_HP, 0x0655)
8224 },
8225 {
8226 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8227 PCI_VENDOR_ID_HP, 0x0700)
8228 },
8229 {
8230 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8231 PCI_VENDOR_ID_HP, 0x0701)
8232 },
8233 {
8234 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8235 PCI_VENDOR_ID_HP, 0x1001)
8236 },
8237 {
8238 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8239 PCI_VENDOR_ID_HP, 0x1100)
8240 },
8241 {
8242 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8243 PCI_VENDOR_ID_HP, 0x1101)
8244 },
8245 {
8246 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8247 PCI_ANY_ID, PCI_ANY_ID)
8248 },
8249 { 0 }
8250 };
8251
8252 MODULE_DEVICE_TABLE(pci, pqi_pci_id_table);
8253
8254 static struct pci_driver pqi_pci_driver = {
8255 .name = DRIVER_NAME_SHORT,
8256 .id_table = pqi_pci_id_table,
8257 .probe = pqi_pci_probe,
8258 .remove = pqi_pci_remove,
8259 .shutdown = pqi_shutdown,
8260 #if defined(CONFIG_PM)
8261 .suspend = pqi_suspend,
8262 .resume = pqi_resume,
8263 #endif
8264 };
8265
8266 static int __init pqi_init(void)
8267 {
8268 int rc;
8269
8270 pr_info(DRIVER_NAME "\n");
8271
8272 pqi_sas_transport_template =
8273 sas_attach_transport(&pqi_sas_transport_functions);
8274 if (!pqi_sas_transport_template)
8275 return -ENODEV;
8276
8277 pqi_process_module_params();
8278
8279 rc = pci_register_driver(&pqi_pci_driver);
8280 if (rc)
8281 sas_release_transport(pqi_sas_transport_template);
8282
8283 return rc;
8284 }
8285
8286 static void __exit pqi_cleanup(void)
8287 {
8288 pci_unregister_driver(&pqi_pci_driver);
8289 sas_release_transport(pqi_sas_transport_template);
8290 }
8291
8292 module_init(pqi_init);
8293 module_exit(pqi_cleanup);
8294
8295 static void __attribute__((unused)) verify_structures(void)
8296 {
8297 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8298 sis_host_to_ctrl_doorbell) != 0x20);
8299 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8300 sis_interrupt_mask) != 0x34);
8301 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8302 sis_ctrl_to_host_doorbell) != 0x9c);
8303 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8304 sis_ctrl_to_host_doorbell_clear) != 0xa0);
8305 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8306 sis_driver_scratch) != 0xb0);
8307 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8308 sis_firmware_status) != 0xbc);
8309 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8310 sis_mailbox) != 0x1000);
8311 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8312 pqi_registers) != 0x4000);
8313
8314 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
8315 iu_type) != 0x0);
8316 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
8317 iu_length) != 0x2);
8318 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
8319 response_queue_id) != 0x4);
8320 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
8321 work_area) != 0x6);
8322 BUILD_BUG_ON(sizeof(struct pqi_iu_header) != 0x8);
8323
8324 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8325 status) != 0x0);
8326 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8327 service_response) != 0x1);
8328 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8329 data_present) != 0x2);
8330 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8331 reserved) != 0x3);
8332 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8333 residual_count) != 0x4);
8334 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8335 data_length) != 0x8);
8336 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8337 reserved1) != 0xa);
8338 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8339 data) != 0xc);
8340 BUILD_BUG_ON(sizeof(struct pqi_aio_error_info) != 0x10c);
8341
8342 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8343 data_in_result) != 0x0);
8344 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8345 data_out_result) != 0x1);
8346 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8347 reserved) != 0x2);
8348 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8349 status) != 0x5);
8350 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8351 status_qualifier) != 0x6);
8352 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8353 sense_data_length) != 0x8);
8354 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8355 response_data_length) != 0xa);
8356 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8357 data_in_transferred) != 0xc);
8358 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8359 data_out_transferred) != 0x10);
8360 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8361 data) != 0x14);
8362 BUILD_BUG_ON(sizeof(struct pqi_raid_error_info) != 0x114);
8363
8364 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8365 signature) != 0x0);
8366 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8367 function_and_status_code) != 0x8);
8368 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8369 max_admin_iq_elements) != 0x10);
8370 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8371 max_admin_oq_elements) != 0x11);
8372 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8373 admin_iq_element_length) != 0x12);
8374 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8375 admin_oq_element_length) != 0x13);
8376 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8377 max_reset_timeout) != 0x14);
8378 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8379 legacy_intx_status) != 0x18);
8380 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8381 legacy_intx_mask_set) != 0x1c);
8382 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8383 legacy_intx_mask_clear) != 0x20);
8384 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8385 device_status) != 0x40);
8386 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8387 admin_iq_pi_offset) != 0x48);
8388 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8389 admin_oq_ci_offset) != 0x50);
8390 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8391 admin_iq_element_array_addr) != 0x58);
8392 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8393 admin_oq_element_array_addr) != 0x60);
8394 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8395 admin_iq_ci_addr) != 0x68);
8396 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8397 admin_oq_pi_addr) != 0x70);
8398 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8399 admin_iq_num_elements) != 0x78);
8400 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8401 admin_oq_num_elements) != 0x79);
8402 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8403 admin_queue_int_msg_num) != 0x7a);
8404 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8405 device_error) != 0x80);
8406 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8407 error_details) != 0x88);
8408 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8409 device_reset) != 0x90);
8410 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8411 power_action) != 0x94);
8412 BUILD_BUG_ON(sizeof(struct pqi_device_registers) != 0x100);
8413
8414 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8415 header.iu_type) != 0);
8416 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8417 header.iu_length) != 2);
8418 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8419 header.work_area) != 6);
8420 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8421 request_id) != 8);
8422 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8423 function_code) != 10);
8424 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8425 data.report_device_capability.buffer_length) != 44);
8426 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8427 data.report_device_capability.sg_descriptor) != 48);
8428 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8429 data.create_operational_iq.queue_id) != 12);
8430 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8431 data.create_operational_iq.element_array_addr) != 16);
8432 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8433 data.create_operational_iq.ci_addr) != 24);
8434 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8435 data.create_operational_iq.num_elements) != 32);
8436 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8437 data.create_operational_iq.element_length) != 34);
8438 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8439 data.create_operational_iq.queue_protocol) != 36);
8440 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8441 data.create_operational_oq.queue_id) != 12);
8442 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8443 data.create_operational_oq.element_array_addr) != 16);
8444 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8445 data.create_operational_oq.pi_addr) != 24);
8446 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8447 data.create_operational_oq.num_elements) != 32);
8448 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8449 data.create_operational_oq.element_length) != 34);
8450 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8451 data.create_operational_oq.queue_protocol) != 36);
8452 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8453 data.create_operational_oq.int_msg_num) != 40);
8454 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8455 data.create_operational_oq.coalescing_count) != 42);
8456 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8457 data.create_operational_oq.min_coalescing_time) != 44);
8458 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8459 data.create_operational_oq.max_coalescing_time) != 48);
8460 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8461 data.delete_operational_queue.queue_id) != 12);
8462 BUILD_BUG_ON(sizeof(struct pqi_general_admin_request) != 64);
8463 BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request,
8464 data.create_operational_iq) != 64 - 11);
8465 BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request,
8466 data.create_operational_oq) != 64 - 11);
8467 BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request,
8468 data.delete_operational_queue) != 64 - 11);
8469
8470 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8471 header.iu_type) != 0);
8472 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8473 header.iu_length) != 2);
8474 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8475 header.work_area) != 6);
8476 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8477 request_id) != 8);
8478 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8479 function_code) != 10);
8480 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8481 status) != 11);
8482 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8483 data.create_operational_iq.status_descriptor) != 12);
8484 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8485 data.create_operational_iq.iq_pi_offset) != 16);
8486 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8487 data.create_operational_oq.status_descriptor) != 12);
8488 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8489 data.create_operational_oq.oq_ci_offset) != 16);
8490 BUILD_BUG_ON(sizeof(struct pqi_general_admin_response) != 64);
8491
8492 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8493 header.iu_type) != 0);
8494 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8495 header.iu_length) != 2);
8496 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8497 header.response_queue_id) != 4);
8498 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8499 header.work_area) != 6);
8500 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8501 request_id) != 8);
8502 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8503 nexus_id) != 10);
8504 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8505 buffer_length) != 12);
8506 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8507 lun_number) != 16);
8508 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8509 protocol_specific) != 24);
8510 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8511 error_index) != 27);
8512 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8513 cdb) != 32);
8514 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8515 sg_descriptors) != 64);
8516 BUILD_BUG_ON(sizeof(struct pqi_raid_path_request) !=
8517 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
8518
8519 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8520 header.iu_type) != 0);
8521 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8522 header.iu_length) != 2);
8523 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8524 header.response_queue_id) != 4);
8525 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8526 header.work_area) != 6);
8527 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8528 request_id) != 8);
8529 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8530 nexus_id) != 12);
8531 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8532 buffer_length) != 16);
8533 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8534 data_encryption_key_index) != 22);
8535 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8536 encrypt_tweak_lower) != 24);
8537 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8538 encrypt_tweak_upper) != 28);
8539 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8540 cdb) != 32);
8541 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8542 error_index) != 48);
8543 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8544 num_sg_descriptors) != 50);
8545 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8546 cdb_length) != 51);
8547 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8548 lun_number) != 52);
8549 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8550 sg_descriptors) != 64);
8551 BUILD_BUG_ON(sizeof(struct pqi_aio_path_request) !=
8552 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
8553
8554 BUILD_BUG_ON(offsetof(struct pqi_io_response,
8555 header.iu_type) != 0);
8556 BUILD_BUG_ON(offsetof(struct pqi_io_response,
8557 header.iu_length) != 2);
8558 BUILD_BUG_ON(offsetof(struct pqi_io_response,
8559 request_id) != 8);
8560 BUILD_BUG_ON(offsetof(struct pqi_io_response,
8561 error_index) != 10);
8562
8563 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8564 header.iu_type) != 0);
8565 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8566 header.iu_length) != 2);
8567 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8568 header.response_queue_id) != 4);
8569 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8570 request_id) != 8);
8571 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8572 data.report_event_configuration.buffer_length) != 12);
8573 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8574 data.report_event_configuration.sg_descriptors) != 16);
8575 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8576 data.set_event_configuration.global_event_oq_id) != 10);
8577 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8578 data.set_event_configuration.buffer_length) != 12);
8579 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8580 data.set_event_configuration.sg_descriptors) != 16);
8581
8582 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor,
8583 max_inbound_iu_length) != 6);
8584 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor,
8585 max_outbound_iu_length) != 14);
8586 BUILD_BUG_ON(sizeof(struct pqi_iu_layer_descriptor) != 16);
8587
8588 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8589 data_length) != 0);
8590 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8591 iq_arbitration_priority_support_bitmask) != 8);
8592 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8593 maximum_aw_a) != 9);
8594 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8595 maximum_aw_b) != 10);
8596 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8597 maximum_aw_c) != 11);
8598 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8599 max_inbound_queues) != 16);
8600 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8601 max_elements_per_iq) != 18);
8602 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8603 max_iq_element_length) != 24);
8604 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8605 min_iq_element_length) != 26);
8606 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8607 max_outbound_queues) != 30);
8608 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8609 max_elements_per_oq) != 32);
8610 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8611 intr_coalescing_time_granularity) != 34);
8612 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8613 max_oq_element_length) != 36);
8614 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8615 min_oq_element_length) != 38);
8616 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8617 iu_layer_descriptors) != 64);
8618 BUILD_BUG_ON(sizeof(struct pqi_device_capability) != 576);
8619
8620 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor,
8621 event_type) != 0);
8622 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor,
8623 oq_id) != 2);
8624 BUILD_BUG_ON(sizeof(struct pqi_event_descriptor) != 4);
8625
8626 BUILD_BUG_ON(offsetof(struct pqi_event_config,
8627 num_event_descriptors) != 2);
8628 BUILD_BUG_ON(offsetof(struct pqi_event_config,
8629 descriptors) != 4);
8630
8631 BUILD_BUG_ON(PQI_NUM_SUPPORTED_EVENTS !=
8632 ARRAY_SIZE(pqi_supported_event_types));
8633
8634 BUILD_BUG_ON(offsetof(struct pqi_event_response,
8635 header.iu_type) != 0);
8636 BUILD_BUG_ON(offsetof(struct pqi_event_response,
8637 header.iu_length) != 2);
8638 BUILD_BUG_ON(offsetof(struct pqi_event_response,
8639 event_type) != 8);
8640 BUILD_BUG_ON(offsetof(struct pqi_event_response,
8641 event_id) != 10);
8642 BUILD_BUG_ON(offsetof(struct pqi_event_response,
8643 additional_event_id) != 12);
8644 BUILD_BUG_ON(offsetof(struct pqi_event_response,
8645 data) != 16);
8646 BUILD_BUG_ON(sizeof(struct pqi_event_response) != 32);
8647
8648 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
8649 header.iu_type) != 0);
8650 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
8651 header.iu_length) != 2);
8652 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
8653 event_type) != 8);
8654 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
8655 event_id) != 10);
8656 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
8657 additional_event_id) != 12);
8658 BUILD_BUG_ON(sizeof(struct pqi_event_acknowledge_request) != 16);
8659
8660 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8661 header.iu_type) != 0);
8662 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8663 header.iu_length) != 2);
8664 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8665 request_id) != 8);
8666 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8667 nexus_id) != 10);
8668 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8669 lun_number) != 16);
8670 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8671 protocol_specific) != 24);
8672 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8673 outbound_queue_id_to_manage) != 26);
8674 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8675 request_id_to_manage) != 28);
8676 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8677 task_management_function) != 30);
8678 BUILD_BUG_ON(sizeof(struct pqi_task_management_request) != 32);
8679
8680 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
8681 header.iu_type) != 0);
8682 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
8683 header.iu_length) != 2);
8684 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
8685 request_id) != 8);
8686 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
8687 nexus_id) != 10);
8688 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
8689 additional_response_info) != 12);
8690 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
8691 response_code) != 15);
8692 BUILD_BUG_ON(sizeof(struct pqi_task_management_response) != 16);
8693
8694 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
8695 configured_logical_drive_count) != 0);
8696 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
8697 configuration_signature) != 1);
8698 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
8699 firmware_version) != 5);
8700 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
8701 extended_logical_unit_count) != 154);
8702 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
8703 firmware_build_number) != 190);
8704 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
8705 controller_mode) != 292);
8706
8707 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
8708 phys_bay_in_box) != 115);
8709 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
8710 device_type) != 120);
8711 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
8712 redundant_path_present_map) != 1736);
8713 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
8714 active_path_number) != 1738);
8715 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
8716 alternate_paths_phys_connector) != 1739);
8717 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
8718 alternate_paths_phys_box_on_port) != 1755);
8719 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
8720 current_queue_depth_limit) != 1796);
8721 BUILD_BUG_ON(sizeof(struct bmic_identify_physical_device) != 2560);
8722
8723 BUILD_BUG_ON(PQI_ADMIN_IQ_NUM_ELEMENTS > 255);
8724 BUILD_BUG_ON(PQI_ADMIN_OQ_NUM_ELEMENTS > 255);
8725 BUILD_BUG_ON(PQI_ADMIN_IQ_ELEMENT_LENGTH %
8726 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
8727 BUILD_BUG_ON(PQI_ADMIN_OQ_ELEMENT_LENGTH %
8728 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
8729 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH > 1048560);
8730 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH %
8731 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
8732 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH > 1048560);
8733 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH %
8734 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
8735
8736 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= PQI_MAX_OUTSTANDING_REQUESTS);
8737 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >=
8738 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP);
8739 }
Linux with added FPC-III support