drivers/net/phy/marvell.c

   1 /*
   2  * drivers/net/phy/marvell.c
   3  *
   4  * Driver for Marvell PHYs
   5  *
   6  * Author: Andy Fleming
   7  *
   8  * Copyright (c) 2004 Freescale Semiconductor, Inc.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  *
  15  */
  16 #include <linux/kernel.h>
  17 #include <linux/string.h>
  18 #include <linux/errno.h>
  19 #include <linux/unistd.h>
  20 #include <linux/slab.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/init.h>
  23 #include <linux/delay.h>
  24 #include <linux/netdevice.h>
  25 #include <linux/etherdevice.h>
  26 #include <linux/skbuff.h>
  27 #include <linux/spinlock.h>
  28 #include <linux/mm.h>
  29 #include <linux/module.h>
  30 #include <linux/mii.h>
  31 #include <linux/ethtool.h>
  32 #include <linux/phy.h>
  33
  34 #include <asm/io.h>
  35 #include <asm/irq.h>
  36 #include <asm/uaccess.h>
  37
  38 #define MII_M1011_IEVENT                0x13
  39 #define MII_M1011_IEVENT_CLEAR          0x0000
  40
  41 #define MII_M1011_IMASK                 0x12
  42 #define MII_M1011_IMASK_INIT            0x6400
  43 #define MII_M1011_IMASK_CLEAR           0x0000
  44
  45 #define MII_M1011_PHY_SCR               0x10
  46 #define MII_M1011_PHY_SCR_AUTO_CROSS    0x0060
  47
  48 #define MII_M1145_PHY_EXT_CR            0x14
  49 #define MII_M1145_RGMII_RX_DELAY        0x0080
  50 #define MII_M1145_RGMII_TX_DELAY        0x0002
  51
  52 #define M1145_DEV_FLAGS_RESISTANCE      0x00000001
  53
  54 #define MII_M1111_PHY_LED_CONTROL       0x18
  55 #define MII_M1111_PHY_LED_DIRECT        0x4100
  56 #define MII_M1111_PHY_LED_COMBINE       0x411c
  57 #define MII_M1111_PHY_EXT_CR            0x14
  58 #define MII_M1111_RX_DELAY              0x80
  59 #define MII_M1111_TX_DELAY              0x2
  60 #define MII_M1111_PHY_EXT_SR            0x1b
  61
  62 #define MII_M1111_HWCFG_MODE_MASK               0xf
  63 #define MII_M1111_HWCFG_MODE_COPPER_RGMII       0xb
  64 #define MII_M1111_HWCFG_MODE_FIBER_RGMII        0x3
  65 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK       0x4
  66 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO       0x8000
  67 #define MII_M1111_HWCFG_FIBER_COPPER_RES        0x2000
  68
  69 #define MII_M1111_COPPER                0
  70 #define MII_M1111_FIBER                 1
  71
  72 #define MII_88E1121_PHY_LED_CTRL        16
  73 #define MII_88E1121_PHY_LED_PAGE        3
  74 #define MII_88E1121_PHY_LED_DEF         0x0030
  75 #define MII_88E1121_PHY_PAGE            22
  76
  77 #define MII_M1011_PHY_STATUS            0x11
  78 #define MII_M1011_PHY_STATUS_1000       0x8000
  79 #define MII_M1011_PHY_STATUS_100        0x4000
  80 #define MII_M1011_PHY_STATUS_SPD_MASK   0xc000
  81 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
  82 #define MII_M1011_PHY_STATUS_RESOLVED   0x0800
  83 #define MII_M1011_PHY_STATUS_LINK       0x0400
  84
  85
  86 MODULE_DESCRIPTION("Marvell PHY driver");
  87 MODULE_AUTHOR("Andy Fleming");
  88 MODULE_LICENSE("GPL");
  89
  90 static int marvell_ack_interrupt(struct phy_device *phydev)
  91 {
  92         int err;
  93
  94         /* Clear the interrupts by reading the reg */
  95         err = phy_read(phydev, MII_M1011_IEVENT);
  96
  97         if (err < 0)
  98                 return err;
  99
 100         return 0;
 101 }
 102
 103 static int marvell_config_intr(struct phy_device *phydev)
 104 {
 105         int err;
 106
 107         if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
 108                 err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
 109         else
 110                 err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);
 111
 112         return err;
 113 }
 114
 115 static int marvell_config_aneg(struct phy_device *phydev)
 116 {
 117         int err;
 118
 119         /* The Marvell PHY has an errata which requires
 120          * that certain registers get written in order
 121          * to restart autonegotiation */
 122         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 123
 124         if (err < 0)
 125                 return err;
 126
 127         err = phy_write(phydev, 0x1d, 0x1f);
 128         if (err < 0)
 129                 return err;
 130
 131         err = phy_write(phydev, 0x1e, 0x200c);
 132         if (err < 0)
 133                 return err;
 134
 135         err = phy_write(phydev, 0x1d, 0x5);
 136         if (err < 0)
 137                 return err;
 138
 139         err = phy_write(phydev, 0x1e, 0);
 140         if (err < 0)
 141                 return err;
 142
 143         err = phy_write(phydev, 0x1e, 0x100);
 144         if (err < 0)
 145                 return err;
 146
 147         err = phy_write(phydev, MII_M1011_PHY_SCR,
 148                         MII_M1011_PHY_SCR_AUTO_CROSS);
 149         if (err < 0)
 150                 return err;
 151
 152         err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
 153                         MII_M1111_PHY_LED_DIRECT);
 154         if (err < 0)
 155                 return err;
 156
 157         err = genphy_config_aneg(phydev);
 158
 159         return err;
 160 }
 161
 162 static int m88e1121_config_aneg(struct phy_device *phydev)
 163 {
 164         int err, temp;
 165
 166         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 167         if (err < 0)
 168                 return err;
 169
 170         err = phy_write(phydev, MII_M1011_PHY_SCR,
 171                         MII_M1011_PHY_SCR_AUTO_CROSS);
 172         if (err < 0)
 173                 return err;
 174
 175         temp = phy_read(phydev, MII_88E1121_PHY_PAGE);
 176
 177         phy_write(phydev, MII_88E1121_PHY_PAGE, MII_88E1121_PHY_LED_PAGE);
 178         phy_write(phydev, MII_88E1121_PHY_LED_CTRL, MII_88E1121_PHY_LED_DEF);
 179         phy_write(phydev, MII_88E1121_PHY_PAGE, temp);
 180
 181         err = genphy_config_aneg(phydev);
 182
 183         return err;
 184 }
 185
 186 static int m88e1111_config_init(struct phy_device *phydev)
 187 {
 188         int err;
 189         int temp;
 190
 191         /* Enable Fiber/Copper auto selection */
 192         temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 193         temp &= ~MII_M1111_HWCFG_FIBER_COPPER_AUTO;
 194         phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 195
 196         temp = phy_read(phydev, MII_BMCR);
 197         temp |= BMCR_RESET;
 198         phy_write(phydev, MII_BMCR, temp);
 199
 200         if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
 201             (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
 202             (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) ||
 203             (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
 204
 205                 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
 206                 if (temp < 0)
 207                         return temp;
 208
 209                 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
 210                         temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
 211                 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
 212                         temp &= ~MII_M1111_TX_DELAY;
 213                         temp |= MII_M1111_RX_DELAY;
 214                 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
 215                         temp &= ~MII_M1111_RX_DELAY;
 216                         temp |= MII_M1111_TX_DELAY;
 217                 }
 218
 219                 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
 220                 if (err < 0)
 221                         return err;
 222
 223                 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 224                 if (temp < 0)
 225                         return temp;
 226
 227                 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
 228
 229                 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
 230                         temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
 231                 else
 232                         temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
 233
 234                 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 235                 if (err < 0)
 236                         return err;
 237         }
 238
 239         if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
 240                 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 241                 if (temp < 0)
 242                         return temp;
 243
 244                 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
 245                 temp |= MII_M1111_HWCFG_MODE_SGMII_NO_CLK;
 246                 temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
 247
 248                 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 249                 if (err < 0)
 250                         return err;
 251         }
 252
 253         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 254         if (err < 0)
 255                 return err;
 256
 257         return 0;
 258 }
 259
 260 static int m88e1118_config_aneg(struct phy_device *phydev)
 261 {
 262         int err;
 263
 264         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 265         if (err < 0)
 266                 return err;
 267
 268         err = phy_write(phydev, MII_M1011_PHY_SCR,
 269                         MII_M1011_PHY_SCR_AUTO_CROSS);
 270         if (err < 0)
 271                 return err;
 272
 273         err = genphy_config_aneg(phydev);
 274         return 0;
 275 }
 276
 277 static int m88e1118_config_init(struct phy_device *phydev)
 278 {
 279         int err;
 280
 281         /* Change address */
 282         err = phy_write(phydev, 0x16, 0x0002);
 283         if (err < 0)
 284                 return err;
 285
 286         /* Enable 1000 Mbit */
 287         err = phy_write(phydev, 0x15, 0x1070);
 288         if (err < 0)
 289                 return err;
 290
 291         /* Change address */
 292         err = phy_write(phydev, 0x16, 0x0003);
 293         if (err < 0)
 294                 return err;
 295
 296         /* Adjust LED Control */
 297         err = phy_write(phydev, 0x10, 0x021e);
 298         if (err < 0)
 299                 return err;
 300
 301         /* Reset address */
 302         err = phy_write(phydev, 0x16, 0x0);
 303         if (err < 0)
 304                 return err;
 305
 306         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 307         if (err < 0)
 308                 return err;
 309
 310         return 0;
 311 }
 312
 313 static int m88e1145_config_init(struct phy_device *phydev)
 314 {
 315         int err;
 316
 317         /* Take care of errata E0 & E1 */
 318         err = phy_write(phydev, 0x1d, 0x001b);
 319         if (err < 0)
 320                 return err;
 321
 322         err = phy_write(phydev, 0x1e, 0x418f);
 323         if (err < 0)
 324                 return err;
 325
 326         err = phy_write(phydev, 0x1d, 0x0016);
 327         if (err < 0)
 328                 return err;
 329
 330         err = phy_write(phydev, 0x1e, 0xa2da);
 331         if (err < 0)
 332                 return err;
 333
 334         if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
 335                 int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR);
 336                 if (temp < 0)
 337                         return temp;
 338
 339                 temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY);
 340
 341                 err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp);
 342                 if (err < 0)
 343                         return err;
 344
 345                 if (phydev->dev_flags & M1145_DEV_FLAGS_RESISTANCE) {
 346                         err = phy_write(phydev, 0x1d, 0x0012);
 347                         if (err < 0)
 348                                 return err;
 349
 350                         temp = phy_read(phydev, 0x1e);
 351                         if (temp < 0)
 352                                 return temp;
 353
 354                         temp &= 0xf03f;
 355                         temp |= 2 << 9; /* 36 ohm */
 356                         temp |= 2 << 6; /* 39 ohm */
 357
 358                         err = phy_write(phydev, 0x1e, temp);
 359                         if (err < 0)
 360                                 return err;
 361
 362                         err = phy_write(phydev, 0x1d, 0x3);
 363                         if (err < 0)
 364                                 return err;
 365
 366                         err = phy_write(phydev, 0x1e, 0x8000);
 367                         if (err < 0)
 368                                 return err;
 369                 }
 370         }
 371
 372         return 0;
 373 }
 374
 375 /* marvell_read_status
 376  *
 377  * Generic status code does not detect Fiber correctly!
 378  * Description:
 379  *   Check the link, then figure out the current state
 380  *   by comparing what we advertise with what the link partner
 381  *   advertises.  Start by checking the gigabit possibilities,
 382  *   then move on to 10/100.
 383  */
 384 static int marvell_read_status(struct phy_device *phydev)
 385 {
 386         int adv;
 387         int err;
 388         int lpa;
 389         int status = 0;
 390
 391         /* Update the link, but return if there
 392          * was an error */
 393         err = genphy_update_link(phydev);
 394         if (err)
 395                 return err;
 396
 397         if (AUTONEG_ENABLE == phydev->autoneg) {
 398                 status = phy_read(phydev, MII_M1011_PHY_STATUS);
 399                 if (status < 0)
 400                         return status;
 401
 402                 lpa = phy_read(phydev, MII_LPA);
 403                 if (lpa < 0)
 404                         return lpa;
 405
 406                 adv = phy_read(phydev, MII_ADVERTISE);
 407                 if (adv < 0)
 408                         return adv;
 409
 410                 lpa &= adv;
 411
 412                 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
 413                         phydev->duplex = DUPLEX_FULL;
 414                 else
 415                         phydev->duplex = DUPLEX_HALF;
 416
 417                 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
 418                 phydev->pause = phydev->asym_pause = 0;
 419
 420                 switch (status) {
 421                 case MII_M1011_PHY_STATUS_1000:
 422                         phydev->speed = SPEED_1000;
 423                         break;
 424
 425                 case MII_M1011_PHY_STATUS_100:
 426                         phydev->speed = SPEED_100;
 427                         break;
 428
 429                 default:
 430                         phydev->speed = SPEED_10;
 431                         break;
 432                 }
 433
 434                 if (phydev->duplex == DUPLEX_FULL) {
 435                         phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
 436                         phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
 437                 }
 438         } else {
 439                 int bmcr = phy_read(phydev, MII_BMCR);
 440
 441                 if (bmcr < 0)
 442                         return bmcr;
 443
 444                 if (bmcr & BMCR_FULLDPLX)
 445                         phydev->duplex = DUPLEX_FULL;
 446                 else
 447                         phydev->duplex = DUPLEX_HALF;
 448
 449                 if (bmcr & BMCR_SPEED1000)
 450                         phydev->speed = SPEED_1000;
 451                 else if (bmcr & BMCR_SPEED100)
 452                         phydev->speed = SPEED_100;
 453                 else
 454                         phydev->speed = SPEED_10;
 455
 456                 phydev->pause = phydev->asym_pause = 0;
 457         }
 458
 459         return 0;
 460 }
 461
 462 static int m88e1121_did_interrupt(struct phy_device *phydev)
 463 {
 464         int imask;
 465
 466         imask = phy_read(phydev, MII_M1011_IEVENT);
 467
 468         if (imask & MII_M1011_IMASK_INIT)
 469                 return 1;
 470
 471         return 0;
 472 }
 473
 474 static struct phy_driver marvell_drivers[] = {
 475         {
 476                 .phy_id = 0x01410c60,
 477                 .phy_id_mask = 0xfffffff0,
 478                 .name = "Marvell 88E1101",
 479                 .features = PHY_GBIT_FEATURES,
 480                 .flags = PHY_HAS_INTERRUPT,
 481                 .config_aneg = &marvell_config_aneg,
 482                 .read_status = &genphy_read_status,
 483                 .ack_interrupt = &marvell_ack_interrupt,
 484                 .config_intr = &marvell_config_intr,
 485                 .driver = { .owner = THIS_MODULE },
 486         },
 487         {
 488                 .phy_id = 0x01410c90,
 489                 .phy_id_mask = 0xfffffff0,
 490                 .name = "Marvell 88E1112",
 491                 .features = PHY_GBIT_FEATURES,
 492                 .flags = PHY_HAS_INTERRUPT,
 493                 .config_init = &m88e1111_config_init,
 494                 .config_aneg = &marvell_config_aneg,
 495                 .read_status = &genphy_read_status,
 496                 .ack_interrupt = &marvell_ack_interrupt,
 497                 .config_intr = &marvell_config_intr,
 498                 .driver = { .owner = THIS_MODULE },
 499         },
 500         {
 501                 .phy_id = 0x01410cc0,
 502                 .phy_id_mask = 0xfffffff0,
 503                 .name = "Marvell 88E1111",
 504                 .features = PHY_GBIT_FEATURES,
 505                 .flags = PHY_HAS_INTERRUPT,
 506                 .config_init = &m88e1111_config_init,
 507                 .config_aneg = &marvell_config_aneg,
 508                 .read_status = &marvell_read_status,
 509                 .ack_interrupt = &marvell_ack_interrupt,
 510                 .config_intr = &marvell_config_intr,
 511                 .driver = { .owner = THIS_MODULE },
 512         },
 513         {
 514                 .phy_id = 0x01410e10,
 515                 .phy_id_mask = 0xfffffff0,
 516                 .name = "Marvell 88E1118",
 517                 .features = PHY_GBIT_FEATURES,
 518                 .flags = PHY_HAS_INTERRUPT,
 519                 .config_init = &m88e1118_config_init,
 520                 .config_aneg = &m88e1118_config_aneg,
 521                 .read_status = &genphy_read_status,
 522                 .ack_interrupt = &marvell_ack_interrupt,
 523                 .config_intr = &marvell_config_intr,
 524                 .driver = {.owner = THIS_MODULE,},
 525         },
 526         {
 527                 .phy_id = 0x01410cb0,
 528                 .phy_id_mask = 0xfffffff0,
 529                 .name = "Marvell 88E1121R",
 530                 .features = PHY_GBIT_FEATURES,
 531                 .flags = PHY_HAS_INTERRUPT,
 532                 .config_aneg = &m88e1121_config_aneg,
 533                 .read_status = &marvell_read_status,
 534                 .ack_interrupt = &marvell_ack_interrupt,
 535                 .config_intr = &marvell_config_intr,
 536                 .did_interrupt = &m88e1121_did_interrupt,
 537                 .driver = { .owner = THIS_MODULE },
 538         },
 539         {
 540                 .phy_id = 0x01410cd0,
 541                 .phy_id_mask = 0xfffffff0,
 542                 .name = "Marvell 88E1145",
 543                 .features = PHY_GBIT_FEATURES,
 544                 .flags = PHY_HAS_INTERRUPT,
 545                 .config_init = &m88e1145_config_init,
 546                 .config_aneg = &marvell_config_aneg,
 547                 .read_status = &genphy_read_status,
 548                 .ack_interrupt = &marvell_ack_interrupt,
 549                 .config_intr = &marvell_config_intr,
 550                 .driver = { .owner = THIS_MODULE },
 551         },
 552         {
 553                 .phy_id = 0x01410e30,
 554                 .phy_id_mask = 0xfffffff0,
 555                 .name = "Marvell 88E1240",
 556                 .features = PHY_GBIT_FEATURES,
 557                 .flags = PHY_HAS_INTERRUPT,
 558                 .config_init = &m88e1111_config_init,
 559                 .config_aneg = &marvell_config_aneg,
 560                 .read_status = &genphy_read_status,
 561                 .ack_interrupt = &marvell_ack_interrupt,
 562                 .config_intr = &marvell_config_intr,
 563                 .driver = { .owner = THIS_MODULE },
 564         },
 565 };
 566
 567 static int __init marvell_init(void)
 568 {
 569         int ret;
 570         int i;
 571
 572         for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++) {
 573                 ret = phy_driver_register(&marvell_drivers[i]);
 574
 575                 if (ret) {
 576                         while (i-- > 0)
 577                                 phy_driver_unregister(&marvell_drivers[i]);
 578                         return ret;
 579                 }
 580         }
 581
 582         return 0;
 583 }
 584
 585 static void __exit marvell_exit(void)
 586 {
 587         int i;
 588
 589         for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++)
 590                 phy_driver_unregister(&marvell_drivers[i]);
 591 }
 592
 593 module_init(marvell_init);
 594 module_exit(marvell_exit);