1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Analog Devices 1889 audio driver
4 * This is a driver for the AD1889 PCI audio chipset found
5 * on the HP PA-RISC [BCJ]-xxx0 workstations.
7 * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org>
8 * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org>
9 * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org>
12 * Do we need to take care of CCS register?
13 * Maybe we could use finer grained locking (separate locks for pb/cap)?
15 * Control Interface (mixer) support
16 * Better AC97 support (VSR...)?
20 * SG DMA support (this will need *a lot* of work)
23 #include <linux/init.h>
24 #include <linux/pci.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/slab.h>
27 #include <linux/interrupt.h>
28 #include <linux/compiler.h>
29 #include <linux/delay.h>
30 #include <linux/module.h>
33 #include <sound/core.h>
34 #include <sound/pcm.h>
35 #include <sound/initval.h>
36 #include <sound/ac97_codec.h>
39 #include "ac97/ac97_id.h"
41 #define AD1889_DRVVER "Version: 1.7"
43 MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>");
44 MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver");
45 MODULE_LICENSE("GPL");
46 MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}");
48 static int index
[SNDRV_CARDS
] = SNDRV_DEFAULT_IDX
;
49 module_param_array(index
, int, NULL
, 0444);
50 MODULE_PARM_DESC(index
, "Index value for the AD1889 soundcard.");
52 static char *id
[SNDRV_CARDS
] = SNDRV_DEFAULT_STR
;
53 module_param_array(id
, charp
, NULL
, 0444);
54 MODULE_PARM_DESC(id
, "ID string for the AD1889 soundcard.");
56 static bool enable
[SNDRV_CARDS
] = SNDRV_DEFAULT_ENABLE_PNP
;
57 module_param_array(enable
, bool, NULL
, 0444);
58 MODULE_PARM_DESC(enable
, "Enable AD1889 soundcard.");
60 static char *ac97_quirk
[SNDRV_CARDS
];
61 module_param_array(ac97_quirk
, charp
, NULL
, 0444);
62 MODULE_PARM_DESC(ac97_quirk
, "AC'97 workaround for strange hardware.");
64 #define DEVNAME "ad1889"
65 #define PFX DEVNAME ": "
67 /* keep track of some hw registers */
68 struct ad1889_register_state
{
69 u16 reg
; /* reg setup */
70 u32 addr
; /* dma base address */
71 unsigned long size
; /* DMA buffer size */
75 struct snd_card
*card
;
82 struct snd_ac97
*ac97
;
83 struct snd_ac97_bus
*ac97_bus
;
85 struct snd_info_entry
*proc
;
87 struct snd_pcm_substream
*psubs
;
88 struct snd_pcm_substream
*csubs
;
90 /* playback register state */
91 struct ad1889_register_state wave
;
92 struct ad1889_register_state ramc
;
98 ad1889_readw(struct snd_ad1889
*chip
, unsigned reg
)
100 return readw(chip
->iobase
+ reg
);
104 ad1889_writew(struct snd_ad1889
*chip
, unsigned reg
, u16 val
)
106 writew(val
, chip
->iobase
+ reg
);
110 ad1889_readl(struct snd_ad1889
*chip
, unsigned reg
)
112 return readl(chip
->iobase
+ reg
);
116 ad1889_writel(struct snd_ad1889
*chip
, unsigned reg
, u32 val
)
118 writel(val
, chip
->iobase
+ reg
);
122 ad1889_unmute(struct snd_ad1889
*chip
)
125 st
= ad1889_readw(chip
, AD_DS_WADA
) &
126 ~(AD_DS_WADA_RWAM
| AD_DS_WADA_LWAM
);
127 ad1889_writew(chip
, AD_DS_WADA
, st
);
128 ad1889_readw(chip
, AD_DS_WADA
);
132 ad1889_mute(struct snd_ad1889
*chip
)
135 st
= ad1889_readw(chip
, AD_DS_WADA
) | AD_DS_WADA_RWAM
| AD_DS_WADA_LWAM
;
136 ad1889_writew(chip
, AD_DS_WADA
, st
);
137 ad1889_readw(chip
, AD_DS_WADA
);
141 ad1889_load_adc_buffer_address(struct snd_ad1889
*chip
, u32 address
)
143 ad1889_writel(chip
, AD_DMA_ADCBA
, address
);
144 ad1889_writel(chip
, AD_DMA_ADCCA
, address
);
148 ad1889_load_adc_buffer_count(struct snd_ad1889
*chip
, u32 count
)
150 ad1889_writel(chip
, AD_DMA_ADCBC
, count
);
151 ad1889_writel(chip
, AD_DMA_ADCCC
, count
);
155 ad1889_load_adc_interrupt_count(struct snd_ad1889
*chip
, u32 count
)
157 ad1889_writel(chip
, AD_DMA_ADCIB
, count
);
158 ad1889_writel(chip
, AD_DMA_ADCIC
, count
);
162 ad1889_load_wave_buffer_address(struct snd_ad1889
*chip
, u32 address
)
164 ad1889_writel(chip
, AD_DMA_WAVBA
, address
);
165 ad1889_writel(chip
, AD_DMA_WAVCA
, address
);
169 ad1889_load_wave_buffer_count(struct snd_ad1889
*chip
, u32 count
)
171 ad1889_writel(chip
, AD_DMA_WAVBC
, count
);
172 ad1889_writel(chip
, AD_DMA_WAVCC
, count
);
176 ad1889_load_wave_interrupt_count(struct snd_ad1889
*chip
, u32 count
)
178 ad1889_writel(chip
, AD_DMA_WAVIB
, count
);
179 ad1889_writel(chip
, AD_DMA_WAVIC
, count
);
183 ad1889_channel_reset(struct snd_ad1889
*chip
, unsigned int channel
)
187 if (channel
& AD_CHAN_WAV
) {
188 /* Disable wave channel */
189 reg
= ad1889_readw(chip
, AD_DS_WSMC
) & ~AD_DS_WSMC_WAEN
;
190 ad1889_writew(chip
, AD_DS_WSMC
, reg
);
191 chip
->wave
.reg
= reg
;
194 reg
= ad1889_readw(chip
, AD_DMA_WAV
);
195 reg
&= AD_DMA_IM_DIS
;
197 ad1889_writew(chip
, AD_DMA_WAV
, reg
);
199 /* clear IRQ and address counters and pointers */
200 ad1889_load_wave_buffer_address(chip
, 0x0);
201 ad1889_load_wave_buffer_count(chip
, 0x0);
202 ad1889_load_wave_interrupt_count(chip
, 0x0);
205 ad1889_readw(chip
, AD_DMA_WAV
);
208 if (channel
& AD_CHAN_ADC
) {
209 /* Disable ADC channel */
210 reg
= ad1889_readw(chip
, AD_DS_RAMC
) & ~AD_DS_RAMC_ADEN
;
211 ad1889_writew(chip
, AD_DS_RAMC
, reg
);
212 chip
->ramc
.reg
= reg
;
214 reg
= ad1889_readw(chip
, AD_DMA_ADC
);
215 reg
&= AD_DMA_IM_DIS
;
217 ad1889_writew(chip
, AD_DMA_ADC
, reg
);
219 ad1889_load_adc_buffer_address(chip
, 0x0);
220 ad1889_load_adc_buffer_count(chip
, 0x0);
221 ad1889_load_adc_interrupt_count(chip
, 0x0);
224 ad1889_readw(chip
, AD_DMA_ADC
);
229 snd_ad1889_ac97_read(struct snd_ac97
*ac97
, unsigned short reg
)
231 struct snd_ad1889
*chip
= ac97
->private_data
;
232 return ad1889_readw(chip
, AD_AC97_BASE
+ reg
);
236 snd_ad1889_ac97_write(struct snd_ac97
*ac97
, unsigned short reg
, unsigned short val
)
238 struct snd_ad1889
*chip
= ac97
->private_data
;
239 ad1889_writew(chip
, AD_AC97_BASE
+ reg
, val
);
243 snd_ad1889_ac97_ready(struct snd_ad1889
*chip
)
245 int retry
= 400; /* average needs 352 msec */
247 while (!(ad1889_readw(chip
, AD_AC97_ACIC
) & AD_AC97_ACIC_ACRDY
)
249 usleep_range(1000, 2000);
251 dev_err(chip
->card
->dev
, "[%s] Link is not ready.\n",
255 dev_dbg(chip
->card
->dev
, "[%s] ready after %d ms\n", __func__
, 400 - retry
);
261 snd_ad1889_hw_params(struct snd_pcm_substream
*substream
,
262 struct snd_pcm_hw_params
*hw_params
)
264 return snd_pcm_lib_malloc_pages(substream
,
265 params_buffer_bytes(hw_params
));
269 snd_ad1889_hw_free(struct snd_pcm_substream
*substream
)
271 return snd_pcm_lib_free_pages(substream
);
274 static const struct snd_pcm_hardware snd_ad1889_playback_hw
= {
275 .info
= SNDRV_PCM_INFO_MMAP
| SNDRV_PCM_INFO_INTERLEAVED
|
276 SNDRV_PCM_INFO_MMAP_VALID
| SNDRV_PCM_INFO_BLOCK_TRANSFER
,
277 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,
278 .rates
= SNDRV_PCM_RATE_CONTINUOUS
| SNDRV_PCM_RATE_8000_48000
,
279 .rate_min
= 8000, /* docs say 7000, but we're lazy */
283 .buffer_bytes_max
= BUFFER_BYTES_MAX
,
284 .period_bytes_min
= PERIOD_BYTES_MIN
,
285 .period_bytes_max
= PERIOD_BYTES_MAX
,
286 .periods_min
= PERIODS_MIN
,
287 .periods_max
= PERIODS_MAX
,
291 static const struct snd_pcm_hardware snd_ad1889_capture_hw
= {
292 .info
= SNDRV_PCM_INFO_MMAP
| SNDRV_PCM_INFO_INTERLEAVED
|
293 SNDRV_PCM_INFO_MMAP_VALID
| SNDRV_PCM_INFO_BLOCK_TRANSFER
,
294 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,
295 .rates
= SNDRV_PCM_RATE_48000
,
296 .rate_min
= 48000, /* docs say we could to VSR, but we're lazy */
300 .buffer_bytes_max
= BUFFER_BYTES_MAX
,
301 .period_bytes_min
= PERIOD_BYTES_MIN
,
302 .period_bytes_max
= PERIOD_BYTES_MAX
,
303 .periods_min
= PERIODS_MIN
,
304 .periods_max
= PERIODS_MAX
,
309 snd_ad1889_playback_open(struct snd_pcm_substream
*ss
)
311 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
312 struct snd_pcm_runtime
*rt
= ss
->runtime
;
315 rt
->hw
= snd_ad1889_playback_hw
;
321 snd_ad1889_capture_open(struct snd_pcm_substream
*ss
)
323 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
324 struct snd_pcm_runtime
*rt
= ss
->runtime
;
327 rt
->hw
= snd_ad1889_capture_hw
;
333 snd_ad1889_playback_close(struct snd_pcm_substream
*ss
)
335 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
341 snd_ad1889_capture_close(struct snd_pcm_substream
*ss
)
343 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
349 snd_ad1889_playback_prepare(struct snd_pcm_substream
*ss
)
351 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
352 struct snd_pcm_runtime
*rt
= ss
->runtime
;
353 unsigned int size
= snd_pcm_lib_buffer_bytes(ss
);
354 unsigned int count
= snd_pcm_lib_period_bytes(ss
);
357 ad1889_channel_reset(chip
, AD_CHAN_WAV
);
359 reg
= ad1889_readw(chip
, AD_DS_WSMC
);
361 /* Mask out 16-bit / Stereo */
362 reg
&= ~(AD_DS_WSMC_WA16
| AD_DS_WSMC_WAST
);
364 if (snd_pcm_format_width(rt
->format
) == 16)
365 reg
|= AD_DS_WSMC_WA16
;
367 if (rt
->channels
> 1)
368 reg
|= AD_DS_WSMC_WAST
;
370 /* let's make sure we don't clobber ourselves */
371 spin_lock_irq(&chip
->lock
);
373 chip
->wave
.size
= size
;
374 chip
->wave
.reg
= reg
;
375 chip
->wave
.addr
= rt
->dma_addr
;
377 ad1889_writew(chip
, AD_DS_WSMC
, chip
->wave
.reg
);
379 /* Set sample rates on the codec */
380 ad1889_writew(chip
, AD_DS_WAS
, rt
->rate
);
383 ad1889_load_wave_buffer_address(chip
, chip
->wave
.addr
);
384 ad1889_load_wave_buffer_count(chip
, size
);
385 ad1889_load_wave_interrupt_count(chip
, count
);
388 ad1889_readw(chip
, AD_DS_WSMC
);
390 spin_unlock_irq(&chip
->lock
);
392 dev_dbg(chip
->card
->dev
,
393 "prepare playback: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
394 chip
->wave
.addr
, count
, size
, reg
, rt
->rate
);
399 snd_ad1889_capture_prepare(struct snd_pcm_substream
*ss
)
401 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
402 struct snd_pcm_runtime
*rt
= ss
->runtime
;
403 unsigned int size
= snd_pcm_lib_buffer_bytes(ss
);
404 unsigned int count
= snd_pcm_lib_period_bytes(ss
);
407 ad1889_channel_reset(chip
, AD_CHAN_ADC
);
409 reg
= ad1889_readw(chip
, AD_DS_RAMC
);
411 /* Mask out 16-bit / Stereo */
412 reg
&= ~(AD_DS_RAMC_AD16
| AD_DS_RAMC_ADST
);
414 if (snd_pcm_format_width(rt
->format
) == 16)
415 reg
|= AD_DS_RAMC_AD16
;
417 if (rt
->channels
> 1)
418 reg
|= AD_DS_RAMC_ADST
;
420 /* let's make sure we don't clobber ourselves */
421 spin_lock_irq(&chip
->lock
);
423 chip
->ramc
.size
= size
;
424 chip
->ramc
.reg
= reg
;
425 chip
->ramc
.addr
= rt
->dma_addr
;
427 ad1889_writew(chip
, AD_DS_RAMC
, chip
->ramc
.reg
);
430 ad1889_load_adc_buffer_address(chip
, chip
->ramc
.addr
);
431 ad1889_load_adc_buffer_count(chip
, size
);
432 ad1889_load_adc_interrupt_count(chip
, count
);
435 ad1889_readw(chip
, AD_DS_RAMC
);
437 spin_unlock_irq(&chip
->lock
);
439 dev_dbg(chip
->card
->dev
,
440 "prepare capture: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
441 chip
->ramc
.addr
, count
, size
, reg
, rt
->rate
);
445 /* this is called in atomic context with IRQ disabled.
446 Must be as fast as possible and not sleep.
447 DMA should be *triggered* by this call.
448 The WSMC "WAEN" bit triggers DMA Wave On/Off */
450 snd_ad1889_playback_trigger(struct snd_pcm_substream
*ss
, int cmd
)
453 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
455 wsmc
= ad1889_readw(chip
, AD_DS_WSMC
);
458 case SNDRV_PCM_TRIGGER_START
:
459 /* enable DMA loop & interrupts */
460 ad1889_writew(chip
, AD_DMA_WAV
, AD_DMA_LOOP
| AD_DMA_IM_CNT
);
461 wsmc
|= AD_DS_WSMC_WAEN
;
462 /* 1 to clear CHSS bit */
463 ad1889_writel(chip
, AD_DMA_CHSS
, AD_DMA_CHSS_WAVS
);
466 case SNDRV_PCM_TRIGGER_STOP
:
468 wsmc
&= ~AD_DS_WSMC_WAEN
;
475 chip
->wave
.reg
= wsmc
;
476 ad1889_writew(chip
, AD_DS_WSMC
, wsmc
);
477 ad1889_readw(chip
, AD_DS_WSMC
); /* flush */
479 /* reset the chip when STOP - will disable IRQs */
480 if (cmd
== SNDRV_PCM_TRIGGER_STOP
)
481 ad1889_channel_reset(chip
, AD_CHAN_WAV
);
486 /* this is called in atomic context with IRQ disabled.
487 Must be as fast as possible and not sleep.
488 DMA should be *triggered* by this call.
489 The RAMC "ADEN" bit triggers DMA ADC On/Off */
491 snd_ad1889_capture_trigger(struct snd_pcm_substream
*ss
, int cmd
)
494 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
496 ramc
= ad1889_readw(chip
, AD_DS_RAMC
);
499 case SNDRV_PCM_TRIGGER_START
:
500 /* enable DMA loop & interrupts */
501 ad1889_writew(chip
, AD_DMA_ADC
, AD_DMA_LOOP
| AD_DMA_IM_CNT
);
502 ramc
|= AD_DS_RAMC_ADEN
;
503 /* 1 to clear CHSS bit */
504 ad1889_writel(chip
, AD_DMA_CHSS
, AD_DMA_CHSS_ADCS
);
506 case SNDRV_PCM_TRIGGER_STOP
:
507 ramc
&= ~AD_DS_RAMC_ADEN
;
513 chip
->ramc
.reg
= ramc
;
514 ad1889_writew(chip
, AD_DS_RAMC
, ramc
);
515 ad1889_readw(chip
, AD_DS_RAMC
); /* flush */
517 /* reset the chip when STOP - will disable IRQs */
518 if (cmd
== SNDRV_PCM_TRIGGER_STOP
)
519 ad1889_channel_reset(chip
, AD_CHAN_ADC
);
524 /* Called in atomic context with IRQ disabled */
525 static snd_pcm_uframes_t
526 snd_ad1889_playback_pointer(struct snd_pcm_substream
*ss
)
529 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
531 if (unlikely(!(chip
->wave
.reg
& AD_DS_WSMC_WAEN
)))
534 ptr
= ad1889_readl(chip
, AD_DMA_WAVCA
);
535 ptr
-= chip
->wave
.addr
;
537 if (snd_BUG_ON(ptr
>= chip
->wave
.size
))
540 return bytes_to_frames(ss
->runtime
, ptr
);
543 /* Called in atomic context with IRQ disabled */
544 static snd_pcm_uframes_t
545 snd_ad1889_capture_pointer(struct snd_pcm_substream
*ss
)
548 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
550 if (unlikely(!(chip
->ramc
.reg
& AD_DS_RAMC_ADEN
)))
553 ptr
= ad1889_readl(chip
, AD_DMA_ADCCA
);
554 ptr
-= chip
->ramc
.addr
;
556 if (snd_BUG_ON(ptr
>= chip
->ramc
.size
))
559 return bytes_to_frames(ss
->runtime
, ptr
);
562 static const struct snd_pcm_ops snd_ad1889_playback_ops
= {
563 .open
= snd_ad1889_playback_open
,
564 .close
= snd_ad1889_playback_close
,
565 .ioctl
= snd_pcm_lib_ioctl
,
566 .hw_params
= snd_ad1889_hw_params
,
567 .hw_free
= snd_ad1889_hw_free
,
568 .prepare
= snd_ad1889_playback_prepare
,
569 .trigger
= snd_ad1889_playback_trigger
,
570 .pointer
= snd_ad1889_playback_pointer
,
573 static const struct snd_pcm_ops snd_ad1889_capture_ops
= {
574 .open
= snd_ad1889_capture_open
,
575 .close
= snd_ad1889_capture_close
,
576 .ioctl
= snd_pcm_lib_ioctl
,
577 .hw_params
= snd_ad1889_hw_params
,
578 .hw_free
= snd_ad1889_hw_free
,
579 .prepare
= snd_ad1889_capture_prepare
,
580 .trigger
= snd_ad1889_capture_trigger
,
581 .pointer
= snd_ad1889_capture_pointer
,
585 snd_ad1889_interrupt(int irq
, void *dev_id
)
588 struct snd_ad1889
*chip
= dev_id
;
590 st
= ad1889_readl(chip
, AD_DMA_DISR
);
593 ad1889_writel(chip
, AD_DMA_DISR
, st
);
600 if (st
& (AD_DMA_DISR_PMAI
|AD_DMA_DISR_PTAI
))
601 dev_dbg(chip
->card
->dev
,
602 "Unexpected master or target abort interrupt!\n");
604 if ((st
& AD_DMA_DISR_WAVI
) && chip
->psubs
)
605 snd_pcm_period_elapsed(chip
->psubs
);
606 if ((st
& AD_DMA_DISR_ADCI
) && chip
->csubs
)
607 snd_pcm_period_elapsed(chip
->csubs
);
613 snd_ad1889_pcm_init(struct snd_ad1889
*chip
, int device
)
618 err
= snd_pcm_new(chip
->card
, chip
->card
->driver
, device
, 1, 1, &pcm
);
622 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_PLAYBACK
,
623 &snd_ad1889_playback_ops
);
624 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_CAPTURE
,
625 &snd_ad1889_capture_ops
);
627 pcm
->private_data
= chip
;
629 strcpy(pcm
->name
, chip
->card
->shortname
);
635 snd_pcm_lib_preallocate_pages_for_all(pcm
, SNDRV_DMA_TYPE_DEV
,
637 BUFFER_BYTES_MAX
/ 2,
644 snd_ad1889_proc_read(struct snd_info_entry
*entry
, struct snd_info_buffer
*buffer
)
646 struct snd_ad1889
*chip
= entry
->private_data
;
650 reg
= ad1889_readw(chip
, AD_DS_WSMC
);
651 snd_iprintf(buffer
, "Wave output: %s\n",
652 (reg
& AD_DS_WSMC_WAEN
) ? "enabled" : "disabled");
653 snd_iprintf(buffer
, "Wave Channels: %s\n",
654 (reg
& AD_DS_WSMC_WAST
) ? "stereo" : "mono");
655 snd_iprintf(buffer
, "Wave Quality: %d-bit linear\n",
656 (reg
& AD_DS_WSMC_WA16
) ? 16 : 8);
658 /* WARQ is at offset 12 */
659 tmp
= (reg
& AD_DS_WSMC_WARQ
) ?
660 ((((reg
& AD_DS_WSMC_WARQ
) >> 12) & 0x01) ? 12 : 18) : 4;
661 tmp
/= (reg
& AD_DS_WSMC_WAST
) ? 2 : 1;
663 snd_iprintf(buffer
, "Wave FIFO: %d %s words\n\n", tmp
,
664 (reg
& AD_DS_WSMC_WAST
) ? "stereo" : "mono");
667 snd_iprintf(buffer
, "Synthesis output: %s\n",
668 reg
& AD_DS_WSMC_SYEN
? "enabled" : "disabled");
670 /* SYRQ is at offset 4 */
671 tmp
= (reg
& AD_DS_WSMC_SYRQ
) ?
672 ((((reg
& AD_DS_WSMC_SYRQ
) >> 4) & 0x01) ? 12 : 18) : 4;
673 tmp
/= (reg
& AD_DS_WSMC_WAST
) ? 2 : 1;
675 snd_iprintf(buffer
, "Synthesis FIFO: %d %s words\n\n", tmp
,
676 (reg
& AD_DS_WSMC_WAST
) ? "stereo" : "mono");
678 reg
= ad1889_readw(chip
, AD_DS_RAMC
);
679 snd_iprintf(buffer
, "ADC input: %s\n",
680 (reg
& AD_DS_RAMC_ADEN
) ? "enabled" : "disabled");
681 snd_iprintf(buffer
, "ADC Channels: %s\n",
682 (reg
& AD_DS_RAMC_ADST
) ? "stereo" : "mono");
683 snd_iprintf(buffer
, "ADC Quality: %d-bit linear\n",
684 (reg
& AD_DS_RAMC_AD16
) ? 16 : 8);
686 /* ACRQ is at offset 4 */
687 tmp
= (reg
& AD_DS_RAMC_ACRQ
) ?
688 ((((reg
& AD_DS_RAMC_ACRQ
) >> 4) & 0x01) ? 12 : 18) : 4;
689 tmp
/= (reg
& AD_DS_RAMC_ADST
) ? 2 : 1;
691 snd_iprintf(buffer
, "ADC FIFO: %d %s words\n\n", tmp
,
692 (reg
& AD_DS_RAMC_ADST
) ? "stereo" : "mono");
694 snd_iprintf(buffer
, "Resampler input: %s\n",
695 reg
& AD_DS_RAMC_REEN
? "enabled" : "disabled");
697 /* RERQ is at offset 12 */
698 tmp
= (reg
& AD_DS_RAMC_RERQ
) ?
699 ((((reg
& AD_DS_RAMC_RERQ
) >> 12) & 0x01) ? 12 : 18) : 4;
700 tmp
/= (reg
& AD_DS_RAMC_ADST
) ? 2 : 1;
702 snd_iprintf(buffer
, "Resampler FIFO: %d %s words\n\n", tmp
,
703 (reg
& AD_DS_WSMC_WAST
) ? "stereo" : "mono");
706 /* doc says LSB represents -1.5dB, but the max value (-94.5dB)
707 suggests that LSB is -3dB, which is more coherent with the logarithmic
708 nature of the dB scale */
709 reg
= ad1889_readw(chip
, AD_DS_WADA
);
710 snd_iprintf(buffer
, "Left: %s, -%d dB\n",
711 (reg
& AD_DS_WADA_LWAM
) ? "mute" : "unmute",
712 ((reg
& AD_DS_WADA_LWAA
) >> 8) * 3);
713 reg
= ad1889_readw(chip
, AD_DS_WADA
);
714 snd_iprintf(buffer
, "Right: %s, -%d dB\n",
715 (reg
& AD_DS_WADA_RWAM
) ? "mute" : "unmute",
716 (reg
& AD_DS_WADA_RWAA
) * 3);
718 reg
= ad1889_readw(chip
, AD_DS_WAS
);
719 snd_iprintf(buffer
, "Wave samplerate: %u Hz\n", reg
);
720 reg
= ad1889_readw(chip
, AD_DS_RES
);
721 snd_iprintf(buffer
, "Resampler samplerate: %u Hz\n", reg
);
725 snd_ad1889_proc_init(struct snd_ad1889
*chip
)
727 snd_card_ro_proc_new(chip
->card
, chip
->card
->driver
,
728 chip
, snd_ad1889_proc_read
);
731 static const struct ac97_quirk ac97_quirks
[] = {
733 .subvendor
= 0x11d4, /* AD */
734 .subdevice
= 0x1889, /* AD1889 */
735 .codec_id
= AC97_ID_AD1819
,
737 .type
= AC97_TUNE_HP_ONLY
743 snd_ad1889_ac97_xinit(struct snd_ad1889
*chip
)
747 reg
= ad1889_readw(chip
, AD_AC97_ACIC
);
748 reg
|= AD_AC97_ACIC_ACRD
; /* Reset Disable */
749 ad1889_writew(chip
, AD_AC97_ACIC
, reg
);
750 ad1889_readw(chip
, AD_AC97_ACIC
); /* flush posted write */
752 /* Interface Enable */
753 reg
|= AD_AC97_ACIC_ACIE
;
754 ad1889_writew(chip
, AD_AC97_ACIC
, reg
);
756 snd_ad1889_ac97_ready(chip
);
758 /* Audio Stream Output | Variable Sample Rate Mode */
759 reg
= ad1889_readw(chip
, AD_AC97_ACIC
);
760 reg
|= AD_AC97_ACIC_ASOE
| AD_AC97_ACIC_VSRM
;
761 ad1889_writew(chip
, AD_AC97_ACIC
, reg
);
762 ad1889_readw(chip
, AD_AC97_ACIC
); /* flush posted write */
767 snd_ad1889_ac97_bus_free(struct snd_ac97_bus
*bus
)
769 struct snd_ad1889
*chip
= bus
->private_data
;
770 chip
->ac97_bus
= NULL
;
774 snd_ad1889_ac97_free(struct snd_ac97
*ac97
)
776 struct snd_ad1889
*chip
= ac97
->private_data
;
781 snd_ad1889_ac97_init(struct snd_ad1889
*chip
, const char *quirk_override
)
784 struct snd_ac97_template ac97
;
785 static struct snd_ac97_bus_ops ops
= {
786 .write
= snd_ad1889_ac97_write
,
787 .read
= snd_ad1889_ac97_read
,
790 /* doing that here, it works. */
791 snd_ad1889_ac97_xinit(chip
);
793 err
= snd_ac97_bus(chip
->card
, 0, &ops
, chip
, &chip
->ac97_bus
);
797 chip
->ac97_bus
->private_free
= snd_ad1889_ac97_bus_free
;
799 memset(&ac97
, 0, sizeof(ac97
));
800 ac97
.private_data
= chip
;
801 ac97
.private_free
= snd_ad1889_ac97_free
;
802 ac97
.pci
= chip
->pci
;
804 err
= snd_ac97_mixer(chip
->ac97_bus
, &ac97
, &chip
->ac97
);
808 snd_ac97_tune_hardware(chip
->ac97
, ac97_quirks
, quirk_override
);
814 snd_ad1889_free(struct snd_ad1889
*chip
)
819 spin_lock_irq(&chip
->lock
);
823 /* Turn off interrupt on count and zero DMA registers */
824 ad1889_channel_reset(chip
, AD_CHAN_WAV
| AD_CHAN_ADC
);
826 /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */
827 ad1889_writel(chip
, AD_DMA_DISR
, AD_DMA_DISR_PTAI
| AD_DMA_DISR_PMAI
);
828 ad1889_readl(chip
, AD_DMA_DISR
); /* flush, dammit! */
830 spin_unlock_irq(&chip
->lock
);
833 free_irq(chip
->irq
, chip
);
836 iounmap(chip
->iobase
);
837 pci_release_regions(chip
->pci
);
838 pci_disable_device(chip
->pci
);
844 snd_ad1889_dev_free(struct snd_device
*device
)
846 struct snd_ad1889
*chip
= device
->device_data
;
847 return snd_ad1889_free(chip
);
851 snd_ad1889_init(struct snd_ad1889
*chip
)
853 ad1889_writew(chip
, AD_DS_CCS
, AD_DS_CCS_CLKEN
); /* turn on clock */
854 ad1889_readw(chip
, AD_DS_CCS
); /* flush posted write */
856 usleep_range(10000, 11000);
858 /* enable Master and Target abort interrupts */
859 ad1889_writel(chip
, AD_DMA_DISR
, AD_DMA_DISR_PMAE
| AD_DMA_DISR_PTAE
);
865 snd_ad1889_create(struct snd_card
*card
,
867 struct snd_ad1889
**rchip
)
871 struct snd_ad1889
*chip
;
872 static struct snd_device_ops ops
= {
873 .dev_free
= snd_ad1889_dev_free
,
878 if ((err
= pci_enable_device(pci
)) < 0)
881 /* check PCI availability (32bit DMA) */
882 if (dma_set_mask(&pci
->dev
, DMA_BIT_MASK(32)) < 0 ||
883 dma_set_coherent_mask(&pci
->dev
, DMA_BIT_MASK(32)) < 0) {
884 dev_err(card
->dev
, "error setting 32-bit DMA mask.\n");
885 pci_disable_device(pci
);
889 /* allocate chip specific data with zero-filled memory */
890 if ((chip
= kzalloc(sizeof(*chip
), GFP_KERNEL
)) == NULL
) {
891 pci_disable_device(pci
);
896 card
->private_data
= chip
;
900 /* (1) PCI resource allocation */
901 if ((err
= pci_request_regions(pci
, card
->driver
)) < 0)
904 chip
->bar
= pci_resource_start(pci
, 0);
905 chip
->iobase
= pci_ioremap_bar(pci
, 0);
906 if (chip
->iobase
== NULL
) {
907 dev_err(card
->dev
, "unable to reserve region.\n");
914 spin_lock_init(&chip
->lock
); /* only now can we call ad1889_free */
916 if (request_irq(pci
->irq
, snd_ad1889_interrupt
,
917 IRQF_SHARED
, KBUILD_MODNAME
, chip
)) {
918 dev_err(card
->dev
, "cannot obtain IRQ %d\n", pci
->irq
);
919 snd_ad1889_free(chip
);
923 chip
->irq
= pci
->irq
;
924 synchronize_irq(chip
->irq
);
926 /* (2) initialization of the chip hardware */
927 if ((err
= snd_ad1889_init(chip
)) < 0) {
928 snd_ad1889_free(chip
);
932 if ((err
= snd_device_new(card
, SNDRV_DEV_LOWLEVEL
, chip
, &ops
)) < 0) {
933 snd_ad1889_free(chip
);
943 pci_disable_device(pci
);
949 snd_ad1889_probe(struct pci_dev
*pci
,
950 const struct pci_device_id
*pci_id
)
954 struct snd_card
*card
;
955 struct snd_ad1889
*chip
;
958 if (devno
>= SNDRV_CARDS
)
960 if (!enable
[devno
]) {
966 err
= snd_card_new(&pci
->dev
, index
[devno
], id
[devno
], THIS_MODULE
,
968 /* XXX REVISIT: we can probably allocate chip in this call */
972 strcpy(card
->driver
, "AD1889");
973 strcpy(card
->shortname
, "Analog Devices AD1889");
976 err
= snd_ad1889_create(card
, pci
, &chip
);
981 sprintf(card
->longname
, "%s at 0x%lx irq %i",
982 card
->shortname
, chip
->bar
, chip
->irq
);
985 /* register AC97 mixer */
986 err
= snd_ad1889_ac97_init(chip
, ac97_quirk
[devno
]);
990 err
= snd_ad1889_pcm_init(chip
, 0);
994 /* register proc interface */
995 snd_ad1889_proc_init(chip
);
998 err
= snd_card_register(card
);
1003 pci_set_drvdata(pci
, card
);
1009 snd_card_free(card
);
1014 snd_ad1889_remove(struct pci_dev
*pci
)
1016 snd_card_free(pci_get_drvdata(pci
));
1019 static const struct pci_device_id snd_ad1889_ids
[] = {
1020 { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES
, PCI_DEVICE_ID_AD1889JS
) },
1023 MODULE_DEVICE_TABLE(pci
, snd_ad1889_ids
);
1025 static struct pci_driver ad1889_pci_driver
= {
1026 .name
= KBUILD_MODNAME
,
1027 .id_table
= snd_ad1889_ids
,
1028 .probe
= snd_ad1889_probe
,
1029 .remove
= snd_ad1889_remove
,
1032 module_pci_driver(ad1889_pci_driver
);