arch/mips/ite-boards/generic/it8172_setup.c

   1 /*
   2  * BRIEF MODULE DESCRIPTION
   3  *      IT8172/QED5231 board setup.
   4  *
   5  * Copyright 2000 MontaVista Software Inc.
   6  * Author: MontaVista Software, Inc.
   7  *              ppopov@mvista.com or source@mvista.com
   8  *
   9  *  This program is free software; you can redistribute  it and/or modify it
  10  *  under  the terms of  the GNU General  Public License as published by the
  11  *  Free Software Foundation;  either version 2 of the  License, or (at your
  12  *  option) any later version.
  13  *
  14  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  15  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  16  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  17  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  18  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  19  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  20  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  21  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  22  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  23  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24  *
  25  *  You should have received a copy of the  GNU General Public License along
  26  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  27  *  675 Mass Ave, Cambridge, MA 02139, USA.
  28  */
  29 #include <linux/config.h>
  30 #include <linux/init.h>
  31 #include <linux/sched.h>
  32 #include <linux/ioport.h>
  33 #include <linux/serial_reg.h>
  34 #include <linux/major.h>
  35 #include <linux/kdev_t.h>
  36 #include <linux/root_dev.h>
  37 #include <linux/pm.h>
  38
  39 #include <asm/cpu.h>
  40 #include <asm/time.h>
  41 #include <asm/io.h>
  42 #include <asm/bootinfo.h>
  43 #include <asm/irq.h>
  44 #include <asm/mipsregs.h>
  45 #include <asm/reboot.h>
  46 #include <asm/traps.h>
  47 #include <asm/it8172/it8172.h>
  48 #include <asm/it8712.h>
  49
  50 extern struct resource ioport_resource;
  51 #ifdef CONFIG_SERIO_I8042
  52 int init_8712_keyboard(void);
  53 #endif
  54
  55 extern int SearchIT8712(void);
  56 extern void InitLPCInterface(void);
  57 extern char * __init prom_getcmdline(void);
  58 extern void it8172_restart(char *command);
  59 extern void it8172_halt(void);
  60 extern void it8172_power_off(void);
  61
  62 extern void (*board_time_init)(void);
  63 extern void (*board_timer_setup)(struct irqaction *irq);
  64 extern void it8172_time_init(void);
  65 extern void it8172_timer_setup(struct irqaction *irq);
  66
  67 #ifdef CONFIG_IT8172_REVC
  68 struct {
  69     struct resource ram;
  70     struct resource pci_mem;
  71     struct resource pci_io;
  72     struct resource flash;
  73     struct resource boot;
  74 } it8172_resources = {
  75     { "RAM",           0,          0,          IORESOURCE_MEM }, /* to be initted */
  76     { "PCI Mem",       0x10000000, 0x13FFFFFF, IORESOURCE_MEM },
  77     { "PCI I/O",       0x14000000, 0x17FFFFFF                 },
  78     { "Flash",         0x08000000, 0x0CFFFFFF                 },
  79     { "Boot ROM",      0x1FC00000, 0x1FFFFFFF                 }
  80 };
  81 #else
  82 struct {
  83     struct resource ram;
  84     struct resource pci_mem0;
  85     struct resource pci_mem1;
  86     struct resource pci_io;
  87     struct resource pci_mem2;
  88     struct resource pci_mem3;
  89     struct resource flash;
  90     struct resource boot;
  91 } it8172_resources = {
  92     { "RAM",           0,          0,          IORESOURCE_MEM }, /* to be initted */
  93     { "PCI Mem0",      0x0C000000, 0x0FFFFFFF, IORESOURCE_MEM },
  94     { "PCI Mem1",      0x10000000, 0x13FFFFFF, IORESOURCE_MEM },
  95     { "PCI I/O",       0x14000000, 0x17FFFFFF                 },
  96     { "PCI Mem2",      0x1A000000, 0x1BFFFFFF, IORESOURCE_MEM },
  97     { "PCI Mem3",      0x1C000000, 0x1FBFFFFF, IORESOURCE_MEM },
  98     { "Flash",         0x08000000, 0x0CFFFFFF                 },
  99     { "Boot ROM",      0x1FC00000, 0x1FFFFFFF                 }
 100 };
 101 #endif
 102
 103
 104 void __init it8172_init_ram_resource(unsigned long memsize)
 105 {
 106         it8172_resources.ram.end = memsize;
 107 }
 108
 109 void __init plat_setup(void)
 110 {
 111         unsigned short dsr;
 112         char *argptr;
 113
 114         argptr = prom_getcmdline();
 115 #ifdef CONFIG_SERIAL_CONSOLE
 116         if ((argptr = strstr(argptr, "console=")) == NULL) {
 117                 argptr = prom_getcmdline();
 118                 strcat(argptr, " console=ttyS0,115200");
 119         }
 120 #endif
 121
 122         clear_c0_status(ST0_FR);
 123
 124         board_time_init = it8172_time_init;
 125         board_timer_setup = it8172_timer_setup;
 126
 127         _machine_restart = it8172_restart;
 128         _machine_halt = it8172_halt;
 129         pm_power_off = it8172_power_off;
 130
 131         /*
 132          * IO/MEM resources.
 133          *
 134          * revisit this area.
 135          */
 136         set_io_port_base(KSEG1);
 137         ioport_resource.start = it8172_resources.pci_io.start;
 138         ioport_resource.end = it8172_resources.pci_io.end;
 139 #ifdef CONFIG_IT8172_REVC
 140         iomem_resource.start = it8172_resources.pci_mem.start;
 141         iomem_resource.end = it8172_resources.pci_mem.end;
 142 #else
 143         iomem_resource.start = it8172_resources.pci_mem0.start;
 144         iomem_resource.end = it8172_resources.pci_mem3.end;
 145 #endif
 146
 147 #ifdef CONFIG_BLK_DEV_INITRD
 148         ROOT_DEV = Root_RAM0;
 149 #endif
 150
 151         /*
 152          * Pull enabled devices out of standby
 153          */
 154         IT_IO_READ16(IT_PM_DSR, dsr);
 155
 156         /*
 157          * Fixme: This breaks when these drivers are modules!!!
 158          */
 159 #ifdef CONFIG_SOUND_IT8172
 160         dsr &= ~IT_PM_DSR_ACSB;
 161 #else
 162         dsr |= IT_PM_DSR_ACSB;
 163 #endif
 164 #ifdef CONFIG_BLK_DEV_IT8172
 165         dsr &= ~IT_PM_DSR_IDESB;
 166 #else
 167         dsr |= IT_PM_DSR_IDESB;
 168 #endif
 169         IT_IO_WRITE16(IT_PM_DSR, dsr);
 170
 171         InitLPCInterface();
 172
 173 #ifdef CONFIG_MIPS_ITE8172
 174         if (SearchIT8712()) {
 175                 printk("Found IT8712 Super IO\n");
 176                 /* enable IT8712 serial port */
 177                 LPCSetConfig(LDN_SERIAL1, 0x30, 0x01); /* enable */
 178                 LPCSetConfig(LDN_SERIAL1, 0x23, 0x01); /* clock selection */
 179 #ifdef CONFIG_SERIO_I8042
 180                 if (init_8712_keyboard()) {
 181                         printk("Unable to initialize keyboard\n");
 182                         LPCSetConfig(LDN_KEYBOARD, 0x30, 0x0); /* disable keyboard */
 183                 } else {
 184                         LPCSetConfig(LDN_KEYBOARD, 0x30, 0x1); /* enable keyboard */
 185                         LPCSetConfig(LDN_KEYBOARD, 0xf0, 0x2);
 186                         LPCSetConfig(LDN_KEYBOARD, 0x71, 0x3);
 187
 188                         LPCSetConfig(LDN_MOUSE, 0x30, 0x1); /* enable mouse */
 189
 190                         LPCSetConfig(0x4, 0x30, 0x1);
 191                         LPCSetConfig(0x4, 0xf4, LPCGetConfig(0x4, 0xf4) | 0x80);
 192
 193                         if ((LPCGetConfig(LDN_KEYBOARD, 0x30) == 0) ||
 194                                         (LPCGetConfig(LDN_MOUSE, 0x30) == 0))
 195                                 printk("Error: keyboard or mouse not enabled\n");
 196
 197                 }
 198 #endif
 199         }
 200         else {
 201                 printk("IT8712 Super IO not found\n");
 202         }
 203 #endif
 204
 205 #ifdef CONFIG_IT8172_CIR
 206         {
 207                 unsigned long data;
 208                 //printk("Enabling CIR0\n");
 209                 IT_IO_READ16(IT_PM_DSR, data);
 210                 data &= ~IT_PM_DSR_CIR0SB;
 211                 IT_IO_WRITE16(IT_PM_DSR, data);
 212                 //printk("DSR register: %x\n", (unsigned)IT_IO_READ16(IT_PM_DSR, data));
 213         }
 214 #endif
 215 #ifdef CONFIG_IT8172_SCR0
 216         {
 217                 unsigned i;
 218                 /* Enable Smart Card Reader 0 */
 219                 /* First power it up */
 220                 IT_IO_READ16(IT_PM_DSR, i);
 221                 i &= ~IT_PM_DSR_SCR0SB;
 222                 IT_IO_WRITE16(IT_PM_DSR, i);
 223                 /* Then initialize its registers */
 224                 outb(( IT_SCR_SFR_GATE_UART_OFF     << IT_SCR_SFR_GATE_UART_BIT
 225                       |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
 226                       |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
 227                       |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
 228                       |IT_SCR_SFR_ENABLE_ON         << IT_SCR_SFR_ENABLE_BIT),
 229                      IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SFR);
 230                 outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
 231                      IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SCDR);
 232         }
 233 #endif /* CONFIG_IT8172_SCR0 */
 234 #ifdef CONFIG_IT8172_SCR1
 235         {
 236                 unsigned i;
 237                 /* Enable Smart Card Reader 1 */
 238                 /* First power it up */
 239                 IT_IO_READ16(IT_PM_DSR, i);
 240                 i &= ~IT_PM_DSR_SCR1SB;
 241                 IT_IO_WRITE16(IT_PM_DSR, i);
 242                 /* Then initialize its registers */
 243                 outb(( IT_SCR_SFR_GATE_UART_OFF     << IT_SCR_SFR_GATE_UART_BIT
 244                       |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
 245                       |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
 246                       |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
 247                       |IT_SCR_SFR_ENABLE_ON         << IT_SCR_SFR_ENABLE_BIT),
 248                      IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SFR);
 249                 outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
 250                      IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SCDR);
 251         }
 252 #endif /* CONFIG_IT8172_SCR1 */
 253 }
 254
 255 #ifdef CONFIG_SERIO_I8042
 256 /*
 257  * According to the ITE Special BIOS Note for waking up the
 258  * keyboard controller...
 259  */
 260 static int init_8712_keyboard(void)
 261 {
 262         unsigned int cmd_port = 0x14000064;
 263         unsigned int data_port = 0x14000060;
 264                                  ^^^^^^^^^^^
 265         Somebody here doesn't grok the concept of io ports.
 266
 267         unsigned char data;
 268         int i;
 269
 270         outb(0xaa, cmd_port); /* send self-test cmd */
 271         i = 0;
 272         while (!(inb(cmd_port) & 0x1)) { /* wait output buffer full */
 273                 i++;
 274                 if (i > 0xffffff)
 275                         return 1;
 276         }
 277
 278         data = inb(data_port);
 279         outb(0xcb, cmd_port); /* set ps2 mode */
 280         while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
 281                 i++;
 282                 if (i > 0xffffff)
 283                         return 1;
 284         }
 285         outb(0x01, data_port);
 286         while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
 287                 i++;
 288                 if (i > 0xffffff)
 289                         return 1;
 290         }
 291
 292         outb(0x60, cmd_port); /* write 8042 command byte */
 293         while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
 294                 i++;
 295                 if (i > 0xffffff)
 296                         return 1;
 297         }
 298         outb(0x45, data_port); /* at interface, keyboard enabled, system flag */
 299         while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
 300                 i++;
 301                 if (i > 0xffffff)
 302                         return 1;
 303         }
 304
 305         outb(0xae, cmd_port); /* enable interface */
 306         return 0;
 307 }
 308 #endif