arch/mips/sgi-ip27/ip27-init.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General
   3  * Public License.  See the file "COPYING" in the main directory of this
   4  * archive for more details.
   5  *
   6  * Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com)
   7  * Copyright (C) 2000 - 2001 by Silicon Graphics, Inc.
   8  */
   9 #include <linux/config.h>
  10 #include <linux/kernel.h>
  11 #include <linux/init.h>
  12 #include <linux/sched.h>
  13 #include <linux/mm.h>
  14 #include <linux/module.h>
  15 #include <linux/cpumask.h>
  16 #include <asm/cpu.h>
  17 #include <asm/io.h>
  18 #include <asm/pgtable.h>
  19 #include <asm/time.h>
  20 #include <asm/sn/types.h>
  21 #include <asm/sn/sn0/addrs.h>
  22 #include <asm/sn/sn0/hubni.h>
  23 #include <asm/sn/sn0/hubio.h>
  24 #include <asm/sn/klconfig.h>
  25 #include <asm/sn/ioc3.h>
  26 #include <asm/mipsregs.h>
  27 #include <asm/sn/gda.h>
  28 #include <asm/sn/hub.h>
  29 #include <asm/sn/intr.h>
  30 #include <asm/current.h>
  31 #include <asm/smp.h>
  32 #include <asm/processor.h>
  33 #include <asm/mmu_context.h>
  34 #include <asm/thread_info.h>
  35 #include <asm/sn/launch.h>
  36 #include <asm/sn/sn_private.h>
  37 #include <asm/sn/sn0/ip27.h>
  38 #include <asm/sn/mapped_kernel.h>
  39
  40 #define CPU_NONE                (cpuid_t)-1
  41
  42 static DECLARE_BITMAP(hub_init_mask, MAX_COMPACT_NODES);
  43 nasid_t master_nasid = INVALID_NASID;
  44
  45 cnodeid_t       nasid_to_compact_node[MAX_NASIDS];
  46 nasid_t         compact_to_nasid_node[MAX_COMPACT_NODES];
  47 cnodeid_t       cpuid_to_compact_node[MAXCPUS];
  48
  49 EXPORT_SYMBOL(nasid_to_compact_node);
  50
  51 extern void pcibr_setup(cnodeid_t);
  52
  53 extern void xtalk_probe_node(cnodeid_t nid);
  54
  55 static void __init per_hub_init(cnodeid_t cnode)
  56 {
  57         struct hub_data *hub = hub_data(cnode);
  58         nasid_t nasid = COMPACT_TO_NASID_NODEID(cnode);
  59         int i;
  60
  61         cpu_set(smp_processor_id(), hub->h_cpus);
  62
  63         if (test_and_set_bit(cnode, hub_init_mask))
  64                 return;
  65         /*
  66          * Set CRB timeout at 5ms, (< PI timeout of 10ms)
  67          */
  68         REMOTE_HUB_S(nasid, IIO_ICTP, 0x800);
  69         REMOTE_HUB_S(nasid, IIO_ICTO, 0xff);
  70
  71         hub_rtc_init(cnode);
  72         xtalk_probe_node(cnode);
  73
  74 #ifdef CONFIG_REPLICATE_EXHANDLERS
  75         /*
  76          * If this is not a headless node initialization,
  77          * copy over the caliased exception handlers.
  78          */
  79         if (get_compact_nodeid() == cnode) {
  80                 extern char except_vec2_generic, except_vec3_generic;
  81                 extern void build_tlb_refill_handler(void);
  82
  83                 memcpy((void *)(CKSEG0 + 0x100), &except_vec2_generic, 0x80);
  84                 memcpy((void *)(CKSEG0 + 0x180), &except_vec3_generic, 0x80);
  85                 build_tlb_refill_handler();
  86                 memcpy((void *)(CKSEG0 + 0x100), (void *) CKSEG0, 0x80);
  87                 memcpy((void *)(CKSEG0 + 0x180), &except_vec3_generic, 0x100);
  88                 __flush_cache_all();
  89         }
  90 #endif
  91
  92         /*
  93          * Some interrupts are reserved by hardware or by software convention.
  94          * Mark these as reserved right away so they won't be used accidently
  95          * later.
  96          */
  97         for (i = 0; i <= BASE_PCI_IRQ; i++) {
  98                 __set_bit(i, hub->irq_alloc_mask);
  99                 LOCAL_HUB_CLR_INTR(INT_PEND0_BASELVL + i);
 100         }
 101
 102         __set_bit(IP_PEND0_6_63, hub->irq_alloc_mask);
 103         LOCAL_HUB_S(PI_INT_PEND_MOD, IP_PEND0_6_63);
 104
 105         for (i = NI_BRDCAST_ERR_A; i <= MSC_PANIC_INTR; i++) {
 106                 __set_bit(i, hub->irq_alloc_mask);
 107                 LOCAL_HUB_CLR_INTR(INT_PEND1_BASELVL + i);
 108         }
 109 }
 110
 111 void __init per_cpu_init(void)
 112 {
 113         int cpu = smp_processor_id();
 114         int slice = LOCAL_HUB_L(PI_CPU_NUM);
 115         cnodeid_t cnode = get_compact_nodeid();
 116         struct hub_data *hub = hub_data(cnode);
 117         struct slice_data *si = hub->slice + slice;
 118         int i;
 119
 120         if (test_and_set_bit(slice, &hub->slice_map))
 121                 return;
 122
 123         clear_c0_status(ST0_IM);
 124
 125         per_hub_init(cnode);
 126
 127         for (i = 0; i < LEVELS_PER_SLICE; i++)
 128                 si->level_to_irq[i] = -1;
 129
 130         /*
 131          * We use this so we can find the local hub's data as fast as only
 132          * possible.
 133          */
 134         cpu_data[cpu].data = si;
 135
 136         cpu_time_init();
 137         install_ipi();
 138
 139         /* Install our NMI handler if symmon hasn't installed one. */
 140         install_cpu_nmi_handler(cputoslice(cpu));
 141
 142         set_c0_status(SRB_DEV0 | SRB_DEV1);
 143 }
 144
 145 /*
 146  * get_nasid() returns the physical node id number of the caller.
 147  */
 148 nasid_t
 149 get_nasid(void)
 150 {
 151         return (nasid_t)((LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_NODEID_MASK)
 152                          >> NSRI_NODEID_SHFT);
 153 }
 154
 155 /*
 156  * Map the physical node id to a virtual node id (virtual node ids are contiguous).
 157  */
 158 cnodeid_t get_compact_nodeid(void)
 159 {
 160         return NASID_TO_COMPACT_NODEID(get_nasid());
 161 }
 162
 163 /* Extracted from the IOC3 meta driver.  FIXME.  */
 164 static inline void ioc3_sio_init(void)
 165 {
 166         struct ioc3 *ioc3;
 167         nasid_t nid;
 168         long loops;
 169
 170         nid = get_nasid();
 171         ioc3 = (struct ioc3 *) KL_CONFIG_CH_CONS_INFO(nid)->memory_base;
 172
 173         ioc3->sscr_a = 0;                       /* PIO mode for uarta.  */
 174         ioc3->sscr_b = 0;                       /* PIO mode for uartb.  */
 175         ioc3->sio_iec = ~0;
 176         ioc3->sio_ies = (SIO_IR_SA_INT | SIO_IR_SB_INT);
 177
 178         loops=1000000; while(loops--);
 179         ioc3->sregs.uarta.iu_fcr = 0;
 180         ioc3->sregs.uartb.iu_fcr = 0;
 181         loops=1000000; while(loops--);
 182 }
 183
 184 static inline void ioc3_eth_init(void)
 185 {
 186         struct ioc3 *ioc3;
 187         nasid_t nid;
 188
 189         nid = get_nasid();
 190         ioc3 = (struct ioc3 *) KL_CONFIG_CH_CONS_INFO(nid)->memory_base;
 191
 192         ioc3->eier = 0;
 193 }
 194
 195 extern void ip27_setup_console(void);
 196 extern void ip27_time_init(void);
 197 extern void ip27_reboot_setup(void);
 198
 199 void __init plat_setup(void)
 200 {
 201         hubreg_t p, e, n_mode;
 202         nasid_t nid;
 203
 204         ip27_setup_console();
 205         ip27_reboot_setup();
 206
 207         /*
 208          * hub_rtc init and cpu clock intr enabled for later calibrate_delay.
 209          */
 210         nid = get_nasid();
 211         printk("IP27: Running on node %d.\n", nid);
 212
 213         p = LOCAL_HUB_L(PI_CPU_PRESENT_A) & 1;
 214         e = LOCAL_HUB_L(PI_CPU_ENABLE_A) & 1;
 215         printk("Node %d has %s primary CPU%s.\n", nid,
 216                p ? "a" : "no",
 217                e ? ", CPU is running" : "");
 218
 219         p = LOCAL_HUB_L(PI_CPU_PRESENT_B) & 1;
 220         e = LOCAL_HUB_L(PI_CPU_ENABLE_B) & 1;
 221         printk("Node %d has %s secondary CPU%s.\n", nid,
 222                p ? "a" : "no",
 223                e ? ", CPU is running" : "");
 224
 225         /*
 226          * Try to catch kernel missconfigurations and give user an
 227          * indication what option to select.
 228          */
 229         n_mode = LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_MORENODES_MASK;
 230         printk("Machine is in %c mode.\n", n_mode ? 'N' : 'M');
 231 #ifdef CONFIG_SGI_SN0_N_MODE
 232         if (!n_mode)
 233                 panic("Kernel compiled for M mode.");
 234 #else
 235         if (n_mode)
 236                 panic("Kernel compiled for N mode.");
 237 #endif
 238
 239         ioc3_sio_init();
 240         ioc3_eth_init();
 241         per_cpu_init();
 242
 243         set_io_port_base(IO_BASE);
 244
 245         board_time_init = ip27_time_init;
 246 }