ARCv2: SLC: Make sure busy bit is set properly for region ops
[linux/fpc-iii.git] / sound / pci / ice1712 / vt1720_mobo.c
blob5dbb867e642cbfb955a89f4a7ea8cb3f8fefe48c
1 /*
2 * ALSA driver for VT1720/VT1724 (Envy24PT/Envy24HT)
4 * Lowlevel functions for VT1720-based motherboards
6 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/init.h>
27 #include <sound/core.h>
29 #include "ice1712.h"
30 #include "envy24ht.h"
31 #include "vt1720_mobo.h"
34 static int k8x800_init(struct snd_ice1712 *ice)
36 ice->vt1720 = 1;
38 /* VT1616 codec */
39 ice->num_total_dacs = 6;
40 ice->num_total_adcs = 2;
42 /* WM8728 codec */
43 /* FIXME: TODO */
45 return 0;
48 static int k8x800_add_controls(struct snd_ice1712 *ice)
50 /* FIXME: needs some quirks for VT1616? */
51 return 0;
54 /* EEPROM image */
56 static unsigned char k8x800_eeprom[] = {
57 [ICE_EEP2_SYSCONF] = 0x01, /* clock 256, 1ADC, 2DACs */
58 [ICE_EEP2_ACLINK] = 0x02, /* ACLINK, packed */
59 [ICE_EEP2_I2S] = 0x00, /* - */
60 [ICE_EEP2_SPDIF] = 0x00, /* - */
61 [ICE_EEP2_GPIO_DIR] = 0xff,
62 [ICE_EEP2_GPIO_DIR1] = 0xff,
63 [ICE_EEP2_GPIO_DIR2] = 0x00, /* - */
64 [ICE_EEP2_GPIO_MASK] = 0xff,
65 [ICE_EEP2_GPIO_MASK1] = 0xff,
66 [ICE_EEP2_GPIO_MASK2] = 0x00, /* - */
67 [ICE_EEP2_GPIO_STATE] = 0x00,
68 [ICE_EEP2_GPIO_STATE1] = 0x00,
69 [ICE_EEP2_GPIO_STATE2] = 0x00, /* - */
72 static unsigned char sn25p_eeprom[] = {
73 [ICE_EEP2_SYSCONF] = 0x01, /* clock 256, 1ADC, 2DACs */
74 [ICE_EEP2_ACLINK] = 0x02, /* ACLINK, packed */
75 [ICE_EEP2_I2S] = 0x00, /* - */
76 [ICE_EEP2_SPDIF] = 0x41, /* - */
77 [ICE_EEP2_GPIO_DIR] = 0xff,
78 [ICE_EEP2_GPIO_DIR1] = 0xff,
79 [ICE_EEP2_GPIO_DIR2] = 0x00, /* - */
80 [ICE_EEP2_GPIO_MASK] = 0xff,
81 [ICE_EEP2_GPIO_MASK1] = 0xff,
82 [ICE_EEP2_GPIO_MASK2] = 0x00, /* - */
83 [ICE_EEP2_GPIO_STATE] = 0x00,
84 [ICE_EEP2_GPIO_STATE1] = 0x00,
85 [ICE_EEP2_GPIO_STATE2] = 0x00, /* - */
89 /* entry point */
90 struct snd_ice1712_card_info snd_vt1720_mobo_cards[] = {
92 .subvendor = VT1720_SUBDEVICE_K8X800,
93 .name = "Albatron K8X800 Pro II",
94 .model = "k8x800",
95 .chip_init = k8x800_init,
96 .build_controls = k8x800_add_controls,
97 .eeprom_size = sizeof(k8x800_eeprom),
98 .eeprom_data = k8x800_eeprom,
101 .subvendor = VT1720_SUBDEVICE_ZNF3_150,
102 .name = "Chaintech ZNF3-150",
103 /* identical with k8x800 */
104 .chip_init = k8x800_init,
105 .build_controls = k8x800_add_controls,
106 .eeprom_size = sizeof(k8x800_eeprom),
107 .eeprom_data = k8x800_eeprom,
110 .subvendor = VT1720_SUBDEVICE_ZNF3_250,
111 .name = "Chaintech ZNF3-250",
112 /* identical with k8x800 */
113 .chip_init = k8x800_init,
114 .build_controls = k8x800_add_controls,
115 .eeprom_size = sizeof(k8x800_eeprom),
116 .eeprom_data = k8x800_eeprom,
119 .subvendor = VT1720_SUBDEVICE_9CJS,
120 .name = "Chaintech 9CJS",
121 /* identical with k8x800 */
122 .chip_init = k8x800_init,
123 .build_controls = k8x800_add_controls,
124 .eeprom_size = sizeof(k8x800_eeprom),
125 .eeprom_data = k8x800_eeprom,
128 .subvendor = VT1720_SUBDEVICE_SN25P,
129 .name = "Shuttle SN25P",
130 .model = "sn25p",
131 .chip_init = k8x800_init,
132 .build_controls = k8x800_add_controls,
133 .eeprom_size = sizeof(k8x800_eeprom),
134 .eeprom_data = sn25p_eeprom,
136 { } /* terminator */