1 // SPDX-License-Identifier: GPL-2.0-only
3 * C-Media CMI8788 driver - main driver module
5 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
8 #include <linux/delay.h>
9 #include <linux/interrupt.h>
10 #include <linux/mutex.h>
11 #include <linux/pci.h>
12 #include <linux/slab.h>
13 #include <linux/module.h>
14 #include <sound/ac97_codec.h>
15 #include <sound/asoundef.h>
16 #include <sound/core.h>
17 #include <sound/info.h>
18 #include <sound/mpu401.h>
19 #include <sound/pcm.h>
23 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
24 MODULE_DESCRIPTION("C-Media CMI8788 helper library");
25 MODULE_LICENSE("GPL v2");
27 #define DRIVER "oxygen"
29 static inline int oxygen_uart_input_ready(struct oxygen
*chip
)
31 return !(oxygen_read8(chip
, OXYGEN_MPU401
+ 1) & MPU401_RX_EMPTY
);
34 static void oxygen_read_uart(struct oxygen
*chip
)
36 if (unlikely(!oxygen_uart_input_ready(chip
))) {
37 /* no data, but read it anyway to clear the interrupt */
38 oxygen_read8(chip
, OXYGEN_MPU401
);
42 u8 data
= oxygen_read8(chip
, OXYGEN_MPU401
);
43 if (data
== MPU401_ACK
)
45 if (chip
->uart_input_count
>= ARRAY_SIZE(chip
->uart_input
))
46 chip
->uart_input_count
= 0;
47 chip
->uart_input
[chip
->uart_input_count
++] = data
;
48 } while (oxygen_uart_input_ready(chip
));
49 if (chip
->model
.uart_input
)
50 chip
->model
.uart_input(chip
);
53 static irqreturn_t
oxygen_interrupt(int dummy
, void *dev_id
)
55 struct oxygen
*chip
= dev_id
;
56 unsigned int status
, clear
, elapsed_streams
, i
;
58 status
= oxygen_read16(chip
, OXYGEN_INTERRUPT_STATUS
);
62 spin_lock(&chip
->reg_lock
);
64 clear
= status
& (OXYGEN_CHANNEL_A
|
67 OXYGEN_CHANNEL_SPDIF
|
68 OXYGEN_CHANNEL_MULTICH
|
70 OXYGEN_INT_SPDIF_IN_DETECT
|
74 if (clear
& OXYGEN_INT_SPDIF_IN_DETECT
)
75 chip
->interrupt_mask
&= ~OXYGEN_INT_SPDIF_IN_DETECT
;
76 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
,
77 chip
->interrupt_mask
& ~clear
);
78 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
,
79 chip
->interrupt_mask
);
82 elapsed_streams
= status
& chip
->pcm_running
;
84 spin_unlock(&chip
->reg_lock
);
86 for (i
= 0; i
< PCM_COUNT
; ++i
)
87 if ((elapsed_streams
& (1 << i
)) && chip
->streams
[i
])
88 snd_pcm_period_elapsed(chip
->streams
[i
]);
90 if (status
& OXYGEN_INT_SPDIF_IN_DETECT
) {
91 spin_lock(&chip
->reg_lock
);
92 i
= oxygen_read32(chip
, OXYGEN_SPDIF_CONTROL
);
93 if (i
& (OXYGEN_SPDIF_SENSE_INT
| OXYGEN_SPDIF_LOCK_INT
|
94 OXYGEN_SPDIF_RATE_INT
)) {
95 /* write the interrupt bit(s) to clear */
96 oxygen_write32(chip
, OXYGEN_SPDIF_CONTROL
, i
);
97 schedule_work(&chip
->spdif_input_bits_work
);
99 spin_unlock(&chip
->reg_lock
);
102 if (status
& OXYGEN_INT_GPIO
)
103 schedule_work(&chip
->gpio_work
);
105 if (status
& OXYGEN_INT_MIDI
) {
107 snd_mpu401_uart_interrupt(0, chip
->midi
->private_data
);
109 oxygen_read_uart(chip
);
112 if (status
& OXYGEN_INT_AC97
)
113 wake_up(&chip
->ac97_waitqueue
);
118 static void oxygen_spdif_input_bits_changed(struct work_struct
*work
)
120 struct oxygen
*chip
= container_of(work
, struct oxygen
,
121 spdif_input_bits_work
);
125 * This function gets called when there is new activity on the SPDIF
126 * input, or when we lose lock on the input signal, or when the rate
130 spin_lock_irq(&chip
->reg_lock
);
131 reg
= oxygen_read32(chip
, OXYGEN_SPDIF_CONTROL
);
132 if ((reg
& (OXYGEN_SPDIF_SENSE_STATUS
|
133 OXYGEN_SPDIF_LOCK_STATUS
))
134 == OXYGEN_SPDIF_SENSE_STATUS
) {
136 * If we detect activity on the SPDIF input but cannot lock to
137 * a signal, the clock bit is likely to be wrong.
139 reg
^= OXYGEN_SPDIF_IN_CLOCK_MASK
;
140 oxygen_write32(chip
, OXYGEN_SPDIF_CONTROL
, reg
);
141 spin_unlock_irq(&chip
->reg_lock
);
143 spin_lock_irq(&chip
->reg_lock
);
144 reg
= oxygen_read32(chip
, OXYGEN_SPDIF_CONTROL
);
145 if ((reg
& (OXYGEN_SPDIF_SENSE_STATUS
|
146 OXYGEN_SPDIF_LOCK_STATUS
))
147 == OXYGEN_SPDIF_SENSE_STATUS
) {
148 /* nothing detected with either clock; give up */
149 if ((reg
& OXYGEN_SPDIF_IN_CLOCK_MASK
)
150 == OXYGEN_SPDIF_IN_CLOCK_192
) {
152 * Reset clock to <= 96 kHz because this is
153 * more likely to be received next time.
155 reg
&= ~OXYGEN_SPDIF_IN_CLOCK_MASK
;
156 reg
|= OXYGEN_SPDIF_IN_CLOCK_96
;
157 oxygen_write32(chip
, OXYGEN_SPDIF_CONTROL
, reg
);
161 spin_unlock_irq(&chip
->reg_lock
);
163 if (chip
->controls
[CONTROL_SPDIF_INPUT_BITS
]) {
164 spin_lock_irq(&chip
->reg_lock
);
165 chip
->interrupt_mask
|= OXYGEN_INT_SPDIF_IN_DETECT
;
166 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
,
167 chip
->interrupt_mask
);
168 spin_unlock_irq(&chip
->reg_lock
);
171 * We don't actually know that any channel status bits have
172 * changed, but let's send a notification just to be sure.
174 snd_ctl_notify(chip
->card
, SNDRV_CTL_EVENT_MASK_VALUE
,
175 &chip
->controls
[CONTROL_SPDIF_INPUT_BITS
]->id
);
179 static void oxygen_gpio_changed(struct work_struct
*work
)
181 struct oxygen
*chip
= container_of(work
, struct oxygen
, gpio_work
);
183 if (chip
->model
.gpio_changed
)
184 chip
->model
.gpio_changed(chip
);
187 static void oxygen_proc_read(struct snd_info_entry
*entry
,
188 struct snd_info_buffer
*buffer
)
190 struct oxygen
*chip
= entry
->private_data
;
193 switch (oxygen_read8(chip
, OXYGEN_REVISION
) & OXYGEN_PACKAGE_ID_MASK
) {
194 case OXYGEN_PACKAGE_ID_8786
: i
= '6'; break;
195 case OXYGEN_PACKAGE_ID_8787
: i
= '7'; break;
196 case OXYGEN_PACKAGE_ID_8788
: i
= '8'; break;
197 default: i
= '?'; break;
199 snd_iprintf(buffer
, "CMI878%c:\n", i
);
200 for (i
= 0; i
< OXYGEN_IO_SIZE
; i
+= 0x10) {
201 snd_iprintf(buffer
, "%02x:", i
);
202 for (j
= 0; j
< 0x10; ++j
)
203 snd_iprintf(buffer
, " %02x", oxygen_read8(chip
, i
+ j
));
204 snd_iprintf(buffer
, "\n");
206 if (mutex_lock_interruptible(&chip
->mutex
) < 0)
208 if (chip
->has_ac97_0
) {
209 snd_iprintf(buffer
, "\nAC97:\n");
210 for (i
= 0; i
< 0x80; i
+= 0x10) {
211 snd_iprintf(buffer
, "%02x:", i
);
212 for (j
= 0; j
< 0x10; j
+= 2)
213 snd_iprintf(buffer
, " %04x",
214 oxygen_read_ac97(chip
, 0, i
+ j
));
215 snd_iprintf(buffer
, "\n");
218 if (chip
->has_ac97_1
) {
219 snd_iprintf(buffer
, "\nAC97 2:\n");
220 for (i
= 0; i
< 0x80; i
+= 0x10) {
221 snd_iprintf(buffer
, "%02x:", i
);
222 for (j
= 0; j
< 0x10; j
+= 2)
223 snd_iprintf(buffer
, " %04x",
224 oxygen_read_ac97(chip
, 1, i
+ j
));
225 snd_iprintf(buffer
, "\n");
228 mutex_unlock(&chip
->mutex
);
229 if (chip
->model
.dump_registers
)
230 chip
->model
.dump_registers(chip
, buffer
);
233 static void oxygen_proc_init(struct oxygen
*chip
)
235 snd_card_ro_proc_new(chip
->card
, "oxygen", chip
, oxygen_proc_read
);
238 static const struct pci_device_id
*
239 oxygen_search_pci_id(struct oxygen
*chip
, const struct pci_device_id ids
[])
244 * Make sure the EEPROM pins are available, i.e., not used for SPI.
245 * (This function is called before we initialize or use SPI.)
247 oxygen_clear_bits8(chip
, OXYGEN_FUNCTION
,
248 OXYGEN_FUNCTION_ENABLE_SPI_4_5
);
250 * Read the subsystem device ID directly from the EEPROM, because the
251 * chip didn't if the first EEPROM word was overwritten.
253 subdevice
= oxygen_read_eeprom(chip
, 2);
254 /* use default ID if EEPROM is missing */
255 if (subdevice
== 0xffff && oxygen_read_eeprom(chip
, 1) == 0xffff)
258 * We use only the subsystem device ID for searching because it is
259 * unique even without the subsystem vendor ID, which may have been
260 * overwritten in the EEPROM.
262 for (; ids
->vendor
; ++ids
)
263 if (ids
->subdevice
== subdevice
&&
264 ids
->driver_data
!= BROKEN_EEPROM_DRIVER_DATA
)
269 static void oxygen_restore_eeprom(struct oxygen
*chip
,
270 const struct pci_device_id
*id
)
274 eeprom_id
= oxygen_read_eeprom(chip
, 0);
275 if (eeprom_id
!= OXYGEN_EEPROM_ID
&&
276 (eeprom_id
!= 0xffff || id
->subdevice
!= 0x8788)) {
278 * This function gets called only when a known card model has
279 * been detected, i.e., we know there is a valid subsystem
280 * product ID at index 2 in the EEPROM. Therefore, we have
281 * been able to deduce the correct subsystem vendor ID, and
282 * this is enough information to restore the original EEPROM
285 oxygen_write_eeprom(chip
, 1, id
->subvendor
);
286 oxygen_write_eeprom(chip
, 0, OXYGEN_EEPROM_ID
);
288 oxygen_set_bits8(chip
, OXYGEN_MISC
,
289 OXYGEN_MISC_WRITE_PCI_SUBID
);
290 pci_write_config_word(chip
->pci
, PCI_SUBSYSTEM_VENDOR_ID
,
292 pci_write_config_word(chip
->pci
, PCI_SUBSYSTEM_ID
,
294 oxygen_clear_bits8(chip
, OXYGEN_MISC
,
295 OXYGEN_MISC_WRITE_PCI_SUBID
);
297 dev_info(chip
->card
->dev
, "EEPROM ID restored\n");
301 static void configure_pcie_bridge(struct pci_dev
*pci
)
303 enum { PEX811X
, PI7C9X110
, XIO2001
};
304 static const struct pci_device_id bridge_ids
[] = {
305 { PCI_VDEVICE(PLX
, 0x8111), .driver_data
= PEX811X
},
306 { PCI_VDEVICE(PLX
, 0x8112), .driver_data
= PEX811X
},
307 { PCI_DEVICE(0x12d8, 0xe110), .driver_data
= PI7C9X110
},
308 { PCI_VDEVICE(TI
, 0x8240), .driver_data
= XIO2001
},
311 struct pci_dev
*bridge
;
312 const struct pci_device_id
*id
;
315 if (!pci
->bus
|| !pci
->bus
->self
)
317 bridge
= pci
->bus
->self
;
319 id
= pci_match_id(bridge_ids
, bridge
);
323 switch (id
->driver_data
) {
324 case PEX811X
: /* PLX PEX8111/PEX8112 PCIe/PCI bridge */
325 pci_read_config_dword(bridge
, 0x48, &tmp
);
326 tmp
|= 1; /* enable blind prefetching */
327 tmp
|= 1 << 11; /* enable beacon generation */
328 pci_write_config_dword(bridge
, 0x48, tmp
);
330 pci_write_config_dword(bridge
, 0x84, 0x0c);
331 pci_read_config_dword(bridge
, 0x88, &tmp
);
333 tmp
|= 2 << 27; /* set prefetch size to 128 bytes */
334 pci_write_config_dword(bridge
, 0x88, tmp
);
337 case PI7C9X110
: /* Pericom PI7C9X110 PCIe/PCI bridge */
338 pci_read_config_dword(bridge
, 0x40, &tmp
);
339 tmp
|= 1; /* park the PCI arbiter to the sound chip */
340 pci_write_config_dword(bridge
, 0x40, tmp
);
343 case XIO2001
: /* Texas Instruments XIO2001 PCIe/PCI bridge */
344 pci_read_config_dword(bridge
, 0xe8, &tmp
);
345 tmp
&= ~0xf; /* request length limit: 64 bytes */
347 tmp
|= 1 << 8; /* request count limit: one buffer */
348 pci_write_config_dword(bridge
, 0xe8, tmp
);
353 static void oxygen_init(struct oxygen
*chip
)
357 chip
->dac_routing
= 1;
358 for (i
= 0; i
< 8; ++i
)
359 chip
->dac_volume
[i
] = chip
->model
.dac_volume_min
;
361 chip
->spdif_playback_enable
= 0;
362 chip
->spdif_bits
= OXYGEN_SPDIF_C
| OXYGEN_SPDIF_ORIGINAL
|
363 (IEC958_AES1_CON_PCM_CODER
<< OXYGEN_SPDIF_CATEGORY_SHIFT
);
364 chip
->spdif_pcm_bits
= chip
->spdif_bits
;
366 if (!(oxygen_read8(chip
, OXYGEN_REVISION
) & OXYGEN_REVISION_2
))
367 oxygen_set_bits8(chip
, OXYGEN_MISC
,
368 OXYGEN_MISC_PCI_MEM_W_1_CLOCK
);
370 i
= oxygen_read16(chip
, OXYGEN_AC97_CONTROL
);
371 chip
->has_ac97_0
= (i
& OXYGEN_AC97_CODEC_0
) != 0;
372 chip
->has_ac97_1
= (i
& OXYGEN_AC97_CODEC_1
) != 0;
374 oxygen_write8_masked(chip
, OXYGEN_FUNCTION
,
375 OXYGEN_FUNCTION_RESET_CODEC
|
376 chip
->model
.function_flags
,
377 OXYGEN_FUNCTION_RESET_CODEC
|
378 OXYGEN_FUNCTION_2WIRE_SPI_MASK
|
379 OXYGEN_FUNCTION_ENABLE_SPI_4_5
);
380 oxygen_write8(chip
, OXYGEN_DMA_STATUS
, 0);
381 oxygen_write8(chip
, OXYGEN_DMA_PAUSE
, 0);
382 oxygen_write8(chip
, OXYGEN_PLAY_CHANNELS
,
383 OXYGEN_PLAY_CHANNELS_2
|
384 OXYGEN_DMA_A_BURST_8
|
385 OXYGEN_DMA_MULTICH_BURST_8
);
386 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
, 0);
387 oxygen_write8_masked(chip
, OXYGEN_MISC
,
388 chip
->model
.misc_flags
,
389 OXYGEN_MISC_WRITE_PCI_SUBID
|
390 OXYGEN_MISC_REC_C_FROM_SPDIF
|
391 OXYGEN_MISC_REC_B_FROM_AC97
|
392 OXYGEN_MISC_REC_A_FROM_MULTICH
|
394 oxygen_write8(chip
, OXYGEN_REC_FORMAT
,
395 (OXYGEN_FORMAT_16
<< OXYGEN_REC_FORMAT_A_SHIFT
) |
396 (OXYGEN_FORMAT_16
<< OXYGEN_REC_FORMAT_B_SHIFT
) |
397 (OXYGEN_FORMAT_16
<< OXYGEN_REC_FORMAT_C_SHIFT
));
398 oxygen_write8(chip
, OXYGEN_PLAY_FORMAT
,
399 (OXYGEN_FORMAT_16
<< OXYGEN_SPDIF_FORMAT_SHIFT
) |
400 (OXYGEN_FORMAT_16
<< OXYGEN_MULTICH_FORMAT_SHIFT
));
401 oxygen_write8(chip
, OXYGEN_REC_CHANNELS
, OXYGEN_REC_CHANNELS_2_2_2
);
402 oxygen_write16(chip
, OXYGEN_I2S_MULTICH_FORMAT
,
404 chip
->model
.dac_i2s_format
|
405 OXYGEN_I2S_MCLK(chip
->model
.dac_mclks
) |
409 if (chip
->model
.device_config
& CAPTURE_0_FROM_I2S_1
)
410 oxygen_write16(chip
, OXYGEN_I2S_A_FORMAT
,
412 chip
->model
.adc_i2s_format
|
413 OXYGEN_I2S_MCLK(chip
->model
.adc_mclks
) |
418 oxygen_write16(chip
, OXYGEN_I2S_A_FORMAT
,
420 OXYGEN_I2S_MUTE_MCLK
);
421 if (chip
->model
.device_config
& (CAPTURE_0_FROM_I2S_2
|
422 CAPTURE_2_FROM_I2S_2
))
423 oxygen_write16(chip
, OXYGEN_I2S_B_FORMAT
,
425 chip
->model
.adc_i2s_format
|
426 OXYGEN_I2S_MCLK(chip
->model
.adc_mclks
) |
431 oxygen_write16(chip
, OXYGEN_I2S_B_FORMAT
,
433 OXYGEN_I2S_MUTE_MCLK
);
434 if (chip
->model
.device_config
& CAPTURE_3_FROM_I2S_3
)
435 oxygen_write16(chip
, OXYGEN_I2S_C_FORMAT
,
437 chip
->model
.adc_i2s_format
|
438 OXYGEN_I2S_MCLK(chip
->model
.adc_mclks
) |
443 oxygen_write16(chip
, OXYGEN_I2S_C_FORMAT
,
445 OXYGEN_I2S_MUTE_MCLK
);
446 oxygen_clear_bits32(chip
, OXYGEN_SPDIF_CONTROL
,
447 OXYGEN_SPDIF_OUT_ENABLE
|
448 OXYGEN_SPDIF_LOOPBACK
);
449 if (chip
->model
.device_config
& CAPTURE_1_FROM_SPDIF
)
450 oxygen_write32_masked(chip
, OXYGEN_SPDIF_CONTROL
,
451 OXYGEN_SPDIF_SENSE_MASK
|
452 OXYGEN_SPDIF_LOCK_MASK
|
453 OXYGEN_SPDIF_RATE_MASK
|
454 OXYGEN_SPDIF_LOCK_PAR
|
455 OXYGEN_SPDIF_IN_CLOCK_96
,
456 OXYGEN_SPDIF_SENSE_MASK
|
457 OXYGEN_SPDIF_LOCK_MASK
|
458 OXYGEN_SPDIF_RATE_MASK
|
459 OXYGEN_SPDIF_SENSE_PAR
|
460 OXYGEN_SPDIF_LOCK_PAR
|
461 OXYGEN_SPDIF_IN_CLOCK_MASK
);
463 oxygen_clear_bits32(chip
, OXYGEN_SPDIF_CONTROL
,
464 OXYGEN_SPDIF_SENSE_MASK
|
465 OXYGEN_SPDIF_LOCK_MASK
|
466 OXYGEN_SPDIF_RATE_MASK
);
467 oxygen_write32(chip
, OXYGEN_SPDIF_OUTPUT_BITS
, chip
->spdif_bits
);
468 oxygen_write16(chip
, OXYGEN_2WIRE_BUS_STATUS
,
469 OXYGEN_2WIRE_LENGTH_8
|
470 OXYGEN_2WIRE_INTERRUPT_MASK
|
471 OXYGEN_2WIRE_SPEED_STANDARD
);
472 oxygen_clear_bits8(chip
, OXYGEN_MPU401_CONTROL
, OXYGEN_MPU401_LOOPBACK
);
473 oxygen_write8(chip
, OXYGEN_GPI_INTERRUPT_MASK
, 0);
474 oxygen_write16(chip
, OXYGEN_GPIO_INTERRUPT_MASK
, 0);
475 oxygen_write16(chip
, OXYGEN_PLAY_ROUTING
,
476 OXYGEN_PLAY_MULTICH_I2S_DAC
|
477 OXYGEN_PLAY_SPDIF_SPDIF
|
478 (0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT
) |
479 (1 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT
) |
480 (2 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT
) |
481 (3 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT
));
482 oxygen_write8(chip
, OXYGEN_REC_ROUTING
,
483 OXYGEN_REC_A_ROUTE_I2S_ADC_1
|
484 OXYGEN_REC_B_ROUTE_I2S_ADC_2
|
485 OXYGEN_REC_C_ROUTE_SPDIF
);
486 oxygen_write8(chip
, OXYGEN_ADC_MONITOR
, 0);
487 oxygen_write8(chip
, OXYGEN_A_MONITOR_ROUTING
,
488 (0 << OXYGEN_A_MONITOR_ROUTE_0_SHIFT
) |
489 (1 << OXYGEN_A_MONITOR_ROUTE_1_SHIFT
) |
490 (2 << OXYGEN_A_MONITOR_ROUTE_2_SHIFT
) |
491 (3 << OXYGEN_A_MONITOR_ROUTE_3_SHIFT
));
493 if (chip
->has_ac97_0
| chip
->has_ac97_1
)
494 oxygen_write8(chip
, OXYGEN_AC97_INTERRUPT_MASK
,
495 OXYGEN_AC97_INT_READ_DONE
|
496 OXYGEN_AC97_INT_WRITE_DONE
);
498 oxygen_write8(chip
, OXYGEN_AC97_INTERRUPT_MASK
, 0);
499 oxygen_write32(chip
, OXYGEN_AC97_OUT_CONFIG
, 0);
500 oxygen_write32(chip
, OXYGEN_AC97_IN_CONFIG
, 0);
501 if (!(chip
->has_ac97_0
| chip
->has_ac97_1
))
502 oxygen_set_bits16(chip
, OXYGEN_AC97_CONTROL
,
503 OXYGEN_AC97_CLOCK_DISABLE
);
504 if (!chip
->has_ac97_0
) {
505 oxygen_set_bits16(chip
, OXYGEN_AC97_CONTROL
,
506 OXYGEN_AC97_NO_CODEC_0
);
508 oxygen_write_ac97(chip
, 0, AC97_RESET
, 0);
510 oxygen_ac97_set_bits(chip
, 0, CM9780_GPIO_SETUP
,
511 CM9780_GPIO0IO
| CM9780_GPIO1IO
);
512 oxygen_ac97_set_bits(chip
, 0, CM9780_MIXER
,
513 CM9780_BSTSEL
| CM9780_STRO_MIC
|
514 CM9780_MIX2FR
| CM9780_PCBSW
);
515 oxygen_ac97_set_bits(chip
, 0, CM9780_JACK
,
516 CM9780_RSOE
| CM9780_CBOE
|
517 CM9780_SSOE
| CM9780_FROE
|
518 CM9780_MIC2MIC
| CM9780_LI2LI
);
519 oxygen_write_ac97(chip
, 0, AC97_MASTER
, 0x0000);
520 oxygen_write_ac97(chip
, 0, AC97_PC_BEEP
, 0x8000);
521 oxygen_write_ac97(chip
, 0, AC97_MIC
, 0x8808);
522 oxygen_write_ac97(chip
, 0, AC97_LINE
, 0x0808);
523 oxygen_write_ac97(chip
, 0, AC97_CD
, 0x8808);
524 oxygen_write_ac97(chip
, 0, AC97_VIDEO
, 0x8808);
525 oxygen_write_ac97(chip
, 0, AC97_AUX
, 0x8808);
526 oxygen_write_ac97(chip
, 0, AC97_REC_GAIN
, 0x8000);
527 oxygen_write_ac97(chip
, 0, AC97_CENTER_LFE_MASTER
, 0x8080);
528 oxygen_write_ac97(chip
, 0, AC97_SURROUND_MASTER
, 0x8080);
529 oxygen_ac97_clear_bits(chip
, 0, CM9780_GPIO_STATUS
,
531 /* power down unused ADCs and DACs */
532 oxygen_ac97_set_bits(chip
, 0, AC97_POWERDOWN
,
533 AC97_PD_PR0
| AC97_PD_PR1
);
534 oxygen_ac97_set_bits(chip
, 0, AC97_EXTENDED_STATUS
,
535 AC97_EA_PRI
| AC97_EA_PRJ
| AC97_EA_PRK
);
537 if (chip
->has_ac97_1
) {
538 oxygen_set_bits32(chip
, OXYGEN_AC97_OUT_CONFIG
,
539 OXYGEN_AC97_CODEC1_SLOT3
|
540 OXYGEN_AC97_CODEC1_SLOT4
);
541 oxygen_write_ac97(chip
, 1, AC97_RESET
, 0);
543 oxygen_write_ac97(chip
, 1, AC97_MASTER
, 0x0000);
544 oxygen_write_ac97(chip
, 1, AC97_HEADPHONE
, 0x8000);
545 oxygen_write_ac97(chip
, 1, AC97_PC_BEEP
, 0x8000);
546 oxygen_write_ac97(chip
, 1, AC97_MIC
, 0x8808);
547 oxygen_write_ac97(chip
, 1, AC97_LINE
, 0x8808);
548 oxygen_write_ac97(chip
, 1, AC97_CD
, 0x8808);
549 oxygen_write_ac97(chip
, 1, AC97_VIDEO
, 0x8808);
550 oxygen_write_ac97(chip
, 1, AC97_AUX
, 0x8808);
551 oxygen_write_ac97(chip
, 1, AC97_PCM
, 0x0808);
552 oxygen_write_ac97(chip
, 1, AC97_REC_SEL
, 0x0000);
553 oxygen_write_ac97(chip
, 1, AC97_REC_GAIN
, 0x0000);
554 oxygen_ac97_set_bits(chip
, 1, 0x6a, 0x0040);
558 static void oxygen_shutdown(struct oxygen
*chip
)
560 spin_lock_irq(&chip
->reg_lock
);
561 chip
->interrupt_mask
= 0;
562 chip
->pcm_running
= 0;
563 oxygen_write16(chip
, OXYGEN_DMA_STATUS
, 0);
564 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
, 0);
565 spin_unlock_irq(&chip
->reg_lock
);
568 static void oxygen_card_free(struct snd_card
*card
)
570 struct oxygen
*chip
= card
->private_data
;
572 oxygen_shutdown(chip
);
574 free_irq(chip
->irq
, chip
);
575 flush_work(&chip
->spdif_input_bits_work
);
576 flush_work(&chip
->gpio_work
);
577 chip
->model
.cleanup(chip
);
578 kfree(chip
->model_data
);
579 mutex_destroy(&chip
->mutex
);
580 pci_release_regions(chip
->pci
);
581 pci_disable_device(chip
->pci
);
584 int oxygen_pci_probe(struct pci_dev
*pci
, int index
, char *id
,
585 struct module
*owner
,
586 const struct pci_device_id
*ids
,
587 int (*get_model
)(struct oxygen
*chip
,
588 const struct pci_device_id
*id
592 struct snd_card
*card
;
594 const struct pci_device_id
*pci_id
;
597 err
= snd_card_new(&pci
->dev
, index
, id
, owner
,
598 sizeof(*chip
), &card
);
602 chip
= card
->private_data
;
606 spin_lock_init(&chip
->reg_lock
);
607 mutex_init(&chip
->mutex
);
608 INIT_WORK(&chip
->spdif_input_bits_work
,
609 oxygen_spdif_input_bits_changed
);
610 INIT_WORK(&chip
->gpio_work
, oxygen_gpio_changed
);
611 init_waitqueue_head(&chip
->ac97_waitqueue
);
613 err
= pci_enable_device(pci
);
617 err
= pci_request_regions(pci
, DRIVER
);
619 dev_err(card
->dev
, "cannot reserve PCI resources\n");
623 if (!(pci_resource_flags(pci
, 0) & IORESOURCE_IO
) ||
624 pci_resource_len(pci
, 0) < OXYGEN_IO_SIZE
) {
625 dev_err(card
->dev
, "invalid PCI I/O range\n");
627 goto err_pci_regions
;
629 chip
->addr
= pci_resource_start(pci
, 0);
631 pci_id
= oxygen_search_pci_id(chip
, ids
);
634 goto err_pci_regions
;
636 oxygen_restore_eeprom(chip
, pci_id
);
637 err
= get_model(chip
, pci_id
);
639 goto err_pci_regions
;
641 if (chip
->model
.model_data_size
) {
642 chip
->model_data
= kzalloc(chip
->model
.model_data_size
,
644 if (!chip
->model_data
) {
646 goto err_pci_regions
;
651 card
->private_free
= oxygen_card_free
;
653 configure_pcie_bridge(pci
);
655 chip
->model
.init(chip
);
657 err
= request_irq(pci
->irq
, oxygen_interrupt
, IRQF_SHARED
,
658 KBUILD_MODNAME
, chip
);
660 dev_err(card
->dev
, "cannot grab interrupt %d\n", pci
->irq
);
663 chip
->irq
= pci
->irq
;
664 card
->sync_irq
= chip
->irq
;
666 strcpy(card
->driver
, chip
->model
.chip
);
667 strcpy(card
->shortname
, chip
->model
.shortname
);
668 sprintf(card
->longname
, "%s at %#lx, irq %i",
669 chip
->model
.longname
, chip
->addr
, chip
->irq
);
670 strcpy(card
->mixername
, chip
->model
.chip
);
671 snd_component_add(card
, chip
->model
.chip
);
673 err
= oxygen_pcm_init(chip
);
677 err
= oxygen_mixer_init(chip
);
681 if (chip
->model
.device_config
& (MIDI_OUTPUT
| MIDI_INPUT
)) {
682 unsigned int info_flags
=
683 MPU401_INFO_INTEGRATED
| MPU401_INFO_IRQ_HOOK
;
684 if (chip
->model
.device_config
& MIDI_OUTPUT
)
685 info_flags
|= MPU401_INFO_OUTPUT
;
686 if (chip
->model
.device_config
& MIDI_INPUT
)
687 info_flags
|= MPU401_INFO_INPUT
;
688 err
= snd_mpu401_uart_new(card
, 0, MPU401_HW_CMIPCI
,
689 chip
->addr
+ OXYGEN_MPU401
,
690 info_flags
, -1, &chip
->midi
);
695 oxygen_proc_init(chip
);
697 spin_lock_irq(&chip
->reg_lock
);
698 if (chip
->model
.device_config
& CAPTURE_1_FROM_SPDIF
)
699 chip
->interrupt_mask
|= OXYGEN_INT_SPDIF_IN_DETECT
;
700 if (chip
->has_ac97_0
| chip
->has_ac97_1
)
701 chip
->interrupt_mask
|= OXYGEN_INT_AC97
;
702 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
, chip
->interrupt_mask
);
703 spin_unlock_irq(&chip
->reg_lock
);
705 err
= snd_card_register(card
);
709 pci_set_drvdata(pci
, card
);
713 pci_release_regions(pci
);
715 pci_disable_device(pci
);
720 EXPORT_SYMBOL(oxygen_pci_probe
);
722 void oxygen_pci_remove(struct pci_dev
*pci
)
724 snd_card_free(pci_get_drvdata(pci
));
726 EXPORT_SYMBOL(oxygen_pci_remove
);
728 #ifdef CONFIG_PM_SLEEP
729 static int oxygen_pci_suspend(struct device
*dev
)
731 struct snd_card
*card
= dev_get_drvdata(dev
);
732 struct oxygen
*chip
= card
->private_data
;
733 unsigned int saved_interrupt_mask
;
735 snd_power_change_state(card
, SNDRV_CTL_POWER_D3hot
);
737 if (chip
->model
.suspend
)
738 chip
->model
.suspend(chip
);
740 spin_lock_irq(&chip
->reg_lock
);
741 saved_interrupt_mask
= chip
->interrupt_mask
;
742 chip
->interrupt_mask
= 0;
743 oxygen_write16(chip
, OXYGEN_DMA_STATUS
, 0);
744 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
, 0);
745 spin_unlock_irq(&chip
->reg_lock
);
747 flush_work(&chip
->spdif_input_bits_work
);
748 flush_work(&chip
->gpio_work
);
749 chip
->interrupt_mask
= saved_interrupt_mask
;
753 static const u32 registers_to_restore
[OXYGEN_IO_SIZE
/ 32] = {
754 0xffffffff, 0x00ff077f, 0x00011d08, 0x007f00ff,
755 0x00300000, 0x00000fe4, 0x0ff7001f, 0x00000000
757 static const u32 ac97_registers_to_restore
[2][0x40 / 32] = {
758 { 0x18284fa2, 0x03060000 },
759 { 0x00007fa6, 0x00200000 }
762 static inline int is_bit_set(const u32
*bitmap
, unsigned int bit
)
764 return bitmap
[bit
/ 32] & (1 << (bit
& 31));
767 static void oxygen_restore_ac97(struct oxygen
*chip
, unsigned int codec
)
771 oxygen_write_ac97(chip
, codec
, AC97_RESET
, 0);
773 for (i
= 1; i
< 0x40; ++i
)
774 if (is_bit_set(ac97_registers_to_restore
[codec
], i
))
775 oxygen_write_ac97(chip
, codec
, i
* 2,
776 chip
->saved_ac97_registers
[codec
][i
]);
779 static int oxygen_pci_resume(struct device
*dev
)
781 struct snd_card
*card
= dev_get_drvdata(dev
);
782 struct oxygen
*chip
= card
->private_data
;
785 oxygen_write16(chip
, OXYGEN_DMA_STATUS
, 0);
786 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
, 0);
787 for (i
= 0; i
< OXYGEN_IO_SIZE
; ++i
)
788 if (is_bit_set(registers_to_restore
, i
))
789 oxygen_write8(chip
, i
, chip
->saved_registers
._8
[i
]);
790 if (chip
->has_ac97_0
)
791 oxygen_restore_ac97(chip
, 0);
792 if (chip
->has_ac97_1
)
793 oxygen_restore_ac97(chip
, 1);
795 if (chip
->model
.resume
)
796 chip
->model
.resume(chip
);
798 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
, chip
->interrupt_mask
);
800 snd_power_change_state(card
, SNDRV_CTL_POWER_D0
);
804 SIMPLE_DEV_PM_OPS(oxygen_pci_pm
, oxygen_pci_suspend
, oxygen_pci_resume
);
805 EXPORT_SYMBOL(oxygen_pci_pm
);
806 #endif /* CONFIG_PM_SLEEP */
808 void oxygen_pci_shutdown(struct pci_dev
*pci
)
810 struct snd_card
*card
= pci_get_drvdata(pci
);
811 struct oxygen
*chip
= card
->private_data
;
813 oxygen_shutdown(chip
);
814 chip
->model
.cleanup(chip
);
816 EXPORT_SYMBOL(oxygen_pci_shutdown
);