sound/ppc/awacs.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * Driver for PowerMac AWACS onboard soundchips
   4  * Copyright (c) 2001 by Takashi Iwai <tiwai@suse.de>
   5  *   based on dmasound.c.
   6  */
   7
   8
   9 #ifndef __AWACS_H
  10 #define __AWACS_H
  11
  12 /*******************************/
  13 /* AWACs Audio Register Layout */
  14 /*******************************/
  15
  16 struct awacs_regs {
  17     unsigned    control;        /* Audio control register */
  18     unsigned    pad0[3];
  19     unsigned    codec_ctrl;     /* Codec control register */
  20     unsigned    pad1[3];
  21     unsigned    codec_stat;     /* Codec status register */
  22     unsigned    pad2[3];
  23     unsigned    clip_count;     /* Clipping count register */
  24     unsigned    pad3[3];
  25     unsigned    byteswap;       /* Data is little-endian if 1 */
  26 };
  27
  28 /*******************/
  29 /* Audio Bit Masks */
  30 /*******************/
  31
  32 /* Audio Control Reg Bit Masks */
  33 /* ----- ------- --- --- ----- */
  34 #define MASK_ISFSEL     (0xf)           /* Input SubFrame Select */
  35 #define MASK_OSFSEL     (0xf << 4)      /* Output SubFrame Select */
  36 #define MASK_RATE       (0x7 << 8)      /* Sound Rate */
  37 #define MASK_CNTLERR    (0x1 << 11)     /* Error */
  38 #define MASK_PORTCHG    (0x1 << 12)     /* Port Change */
  39 #define MASK_IEE        (0x1 << 13)     /* Enable Interrupt on Error */
  40 #define MASK_IEPC       (0x1 << 14)     /* Enable Interrupt on Port Change */
  41 #define MASK_SSFSEL     (0x3 << 15)     /* Status SubFrame Select */
  42
  43 /* Audio Codec Control Reg Bit Masks */
  44 /* ----- ----- ------- --- --- ----- */
  45 #define MASK_NEWECMD    (0x1 << 24)     /* Lock: don't write to reg when 1 */
  46 #define MASK_EMODESEL   (0x3 << 22)     /* Send info out on which frame? */
  47 #define MASK_EXMODEADDR (0x3ff << 12)   /* Extended Mode Address -- 10 bits */
  48 #define MASK_EXMODEDATA (0xfff)         /* Extended Mode Data -- 12 bits */
  49
  50 /* Audio Codec Control Address Values / Masks */
  51 /* ----- ----- ------- ------- ------ - ----- */
  52 #define MASK_ADDR0      (0x0 << 12)     /* Expanded Data Mode Address 0 */
  53 #define MASK_ADDR_MUX   MASK_ADDR0      /* Mux Control */
  54 #define MASK_ADDR_GAIN  MASK_ADDR0
  55
  56 #define MASK_ADDR1      (0x1 << 12)     /* Expanded Data Mode Address 1 */
  57 #define MASK_ADDR_MUTE  MASK_ADDR1
  58 #define MASK_ADDR_RATE  MASK_ADDR1
  59
  60 #define MASK_ADDR2      (0x2 << 12)     /* Expanded Data Mode Address 2 */
  61 #define MASK_ADDR_VOLA  MASK_ADDR2      /* Volume Control A -- Headphones */
  62 #define MASK_ADDR_VOLHD MASK_ADDR2
  63
  64 #define MASK_ADDR4      (0x4 << 12)     /* Expanded Data Mode Address 4 */
  65 #define MASK_ADDR_VOLC  MASK_ADDR4      /* Volume Control C -- Speaker */
  66 #define MASK_ADDR_VOLSPK MASK_ADDR4
  67
  68 /* additional registers of screamer */
  69 #define MASK_ADDR5      (0x5 << 12)     /* Expanded Data Mode Address 5 */
  70 #define MASK_ADDR6      (0x6 << 12)     /* Expanded Data Mode Address 6 */
  71 #define MASK_ADDR7      (0x7 << 12)     /* Expanded Data Mode Address 7 */
  72
  73 /* Address 0 Bit Masks & Macros */
  74 /* ------- - --- ----- - ------ */
  75 #define MASK_GAINRIGHT  (0xf)           /* Gain Right Mask */
  76 #define MASK_GAINLEFT   (0xf << 4)      /* Gain Left Mask */
  77 #define MASK_GAINLINE   (0x1 << 8)      /* Disable Mic preamp */
  78 #define MASK_GAINMIC    (0x0 << 8)      /* Enable Mic preamp */
  79 #define MASK_MUX_CD     (0x1 << 9)      /* Select CD in MUX */
  80 #define MASK_MUX_MIC    (0x1 << 10)     /* Select Mic in MUX */
  81 #define MASK_MUX_AUDIN  (0x1 << 11)     /* Select Audio In in MUX */
  82 #define MASK_MUX_LINE   MASK_MUX_AUDIN
  83 #define SHIFT_GAINLINE  8
  84 #define SHIFT_MUX_CD    9
  85 #define SHIFT_MUX_MIC   10
  86 #define SHIFT_MUX_LINE  11
  87
  88 #define GAINRIGHT(x)    ((x) & MASK_GAINRIGHT)
  89 #define GAINLEFT(x)     (((x) << 4) & MASK_GAINLEFT)
  90
  91 /* Address 1 Bit Masks */
  92 /* ------- - --- ----- */
  93 #define MASK_ADDR1RES1  (0x3)           /* Reserved */
  94 #define MASK_RECALIBRATE (0x1 << 2)     /* Recalibrate */
  95 #define MASK_SAMPLERATE (0x7 << 3)      /* Sample Rate: */
  96 #define MASK_LOOPTHRU   (0x1 << 6)      /* Loopthrough Enable */
  97 #define SHIFT_LOOPTHRU  6
  98 #define MASK_CMUTE      (0x1 << 7)      /* Output C (Speaker) Mute when 1 */
  99 #define MASK_SPKMUTE    MASK_CMUTE
 100 #define SHIFT_SPKMUTE   7
 101 #define MASK_ADDR1RES2  (0x1 << 8)      /* Reserved */
 102 #define MASK_AMUTE      (0x1 << 9)      /* Output A (Headphone) Mute when 1 */
 103 #define MASK_HDMUTE     MASK_AMUTE
 104 #define SHIFT_HDMUTE    9
 105 #define MASK_PAROUT     (0x3 << 10)     /* Parallel Out (???) */
 106 #define MASK_PAROUT0    (0x1 << 10)     /* Parallel Out (???) */
 107 #define MASK_PAROUT1    (0x1 << 11)     /* Parallel Out (enable speaker) */
 108 #define SHIFT_PAROUT    10
 109 #define SHIFT_PAROUT0   10
 110 #define SHIFT_PAROUT1   11
 111
 112 #define SAMPLERATE_48000        (0x0 << 3)      /* 48 or 44.1 kHz */
 113 #define SAMPLERATE_32000        (0x1 << 3)      /* 32 or 29.4 kHz */
 114 #define SAMPLERATE_24000        (0x2 << 3)      /* 24 or 22.05 kHz */
 115 #define SAMPLERATE_19200        (0x3 << 3)      /* 19.2 or 17.64 kHz */
 116 #define SAMPLERATE_16000        (0x4 << 3)      /* 16 or 14.7 kHz */
 117 #define SAMPLERATE_12000        (0x5 << 3)      /* 12 or 11.025 kHz */
 118 #define SAMPLERATE_9600         (0x6 << 3)      /* 9.6 or 8.82 kHz */
 119 #define SAMPLERATE_8000         (0x7 << 3)      /* 8 or 7.35 kHz */
 120
 121 /* Address 2 & 4 Bit Masks & Macros */
 122 /* ------- - - - --- ----- - ------ */
 123 #define MASK_OUTVOLRIGHT (0xf)          /* Output Right Volume */
 124 #define MASK_ADDR2RES1  (0x2 << 4)      /* Reserved */
 125 #define MASK_ADDR4RES1  MASK_ADDR2RES1
 126 #define MASK_OUTVOLLEFT (0xf << 6)      /* Output Left Volume */
 127 #define MASK_ADDR2RES2  (0x2 << 10)     /* Reserved */
 128 #define MASK_ADDR4RES2  MASK_ADDR2RES2
 129
 130 #define VOLRIGHT(x)     (((~(x)) & MASK_OUTVOLRIGHT))
 131 #define VOLLEFT(x)      (((~(x)) << 6) & MASK_OUTVOLLEFT)
 132
 133 /* address 6 */
 134 #define MASK_MIC_BOOST  (0x4)           /* screamer mic boost */
 135 #define SHIFT_MIC_BOOST 2
 136
 137 /* Audio Codec Status Reg Bit Masks */
 138 /* ----- ----- ------ --- --- ----- */
 139 #define MASK_EXTEND     (0x1 << 23)     /* Extend */
 140 #define MASK_VALID      (0x1 << 22)     /* Valid Data? */
 141 #define MASK_OFLEFT     (0x1 << 21)     /* Overflow Left */
 142 #define MASK_OFRIGHT    (0x1 << 20)     /* Overflow Right */
 143 #define MASK_ERRCODE    (0xf << 16)     /* Error Code */
 144 #define MASK_REVISION   (0xf << 12)     /* Revision Number */
 145 #define MASK_MFGID      (0xf << 8)      /* Mfg. ID */
 146 #define MASK_CODSTATRES (0xf << 4)      /* bits 4 - 7 reserved */
 147 #define MASK_INSENSE    (0xf)           /* port sense bits: */
 148 #define MASK_HDPCONN            8       /* headphone plugged in */
 149 #define MASK_LOCONN             4       /* line-out plugged in */
 150 #define MASK_LICONN             2       /* line-in plugged in */
 151 #define MASK_MICCONN            1       /* microphone plugged in */
 152 #define MASK_LICONN_IMAC        8       /* line-in plugged in */
 153 #define MASK_HDPRCONN_IMAC      4       /* headphone right plugged in */
 154 #define MASK_HDPLCONN_IMAC      2       /* headphone left plugged in */
 155 #define MASK_LOCONN_IMAC        1       /* line-out plugged in */
 156
 157 /* Clipping Count Reg Bit Masks */
 158 /* -------- ----- --- --- ----- */
 159 #define MASK_CLIPLEFT   (0xff << 7)     /* Clipping Count, Left Channel */
 160 #define MASK_CLIPRIGHT  (0xff)          /* Clipping Count, Right Channel */
 161
 162 /* DBDMA ChannelStatus Bit Masks */
 163 /* ----- ------------- --- ----- */
 164 #define MASK_CSERR      (0x1 << 7)      /* Error */
 165 #define MASK_EOI        (0x1 << 6)      /* End of Input --
 166                                            only for Input Channel */
 167 #define MASK_CSUNUSED   (0x1f << 1)     /* bits 1-5 not used */
 168 #define MASK_WAIT       (0x1)           /* Wait */
 169
 170 /* Various Rates */
 171 /* ------- ----- */
 172 #define RATE_48000      (0x0 << 8)      /* 48 kHz */
 173 #define RATE_44100      (0x0 << 8)      /* 44.1 kHz */
 174 #define RATE_32000      (0x1 << 8)      /* 32 kHz */
 175 #define RATE_29400      (0x1 << 8)      /* 29.4 kHz */
 176 #define RATE_24000      (0x2 << 8)      /* 24 kHz */
 177 #define RATE_22050      (0x2 << 8)      /* 22.05 kHz */
 178 #define RATE_19200      (0x3 << 8)      /* 19.2 kHz */
 179 #define RATE_17640      (0x3 << 8)      /* 17.64 kHz */
 180 #define RATE_16000      (0x4 << 8)      /* 16 kHz */
 181 #define RATE_14700      (0x4 << 8)      /* 14.7 kHz */
 182 #define RATE_12000      (0x5 << 8)      /* 12 kHz */
 183 #define RATE_11025      (0x5 << 8)      /* 11.025 kHz */
 184 #define RATE_9600       (0x6 << 8)      /* 9.6 kHz */
 185 #define RATE_8820       (0x6 << 8)      /* 8.82 kHz */
 186 #define RATE_8000       (0x7 << 8)      /* 8 kHz */
 187 #define RATE_7350       (0x7 << 8)      /* 7.35 kHz */
 188
 189 #define RATE_LOW        1       /* HIGH = 48kHz, etc;  LOW = 44.1kHz, etc. */
 190
 191
 192 #endif /* __AWACS_H */