1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2020 BayLibre, SAS.
4 // Author: Jerome Brunet <jbrunet@baylibre.com>
6 #include <linux/bitfield.h>
8 #include <sound/pcm_params.h>
10 #include <sound/soc-dai.h>
15 #define AIU_I2S_SOURCE_DESC_MODE_8CH BIT(0)
16 #define AIU_I2S_SOURCE_DESC_MODE_24BIT BIT(5)
17 #define AIU_I2S_SOURCE_DESC_MODE_32BIT BIT(9)
18 #define AIU_I2S_SOURCE_DESC_MODE_SPLIT BIT(11)
19 #define AIU_MEM_I2S_MASKS_IRQ_BLOCK GENMASK(31, 16)
20 #define AIU_MEM_I2S_CONTROL_MODE_16BIT BIT(6)
21 #define AIU_MEM_I2S_BUF_CNTL_INIT BIT(0)
22 #define AIU_RST_SOFT_I2S_FAST BIT(0)
24 #define AIU_FIFO_I2S_BLOCK 256
26 static struct snd_pcm_hardware fifo_i2s_pcm
= {
27 .info
= (SNDRV_PCM_INFO_INTERLEAVED
|
29 SNDRV_PCM_INFO_MMAP_VALID
|
30 SNDRV_PCM_INFO_PAUSE
),
31 .formats
= AIU_FORMATS
,
36 .period_bytes_min
= AIU_FIFO_I2S_BLOCK
,
37 .period_bytes_max
= AIU_FIFO_I2S_BLOCK
* USHRT_MAX
,
39 .periods_max
= UINT_MAX
,
41 /* No real justification for this */
42 .buffer_bytes_max
= 1 * 1024 * 1024,
45 static int aiu_fifo_i2s_trigger(struct snd_pcm_substream
*substream
, int cmd
,
46 struct snd_soc_dai
*dai
)
48 struct snd_soc_component
*component
= dai
->component
;
51 case SNDRV_PCM_TRIGGER_START
:
52 case SNDRV_PCM_TRIGGER_RESUME
:
53 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
54 snd_soc_component_write(component
, AIU_RST_SOFT
,
55 AIU_RST_SOFT_I2S_FAST
);
56 snd_soc_component_read(component
, AIU_I2S_SYNC
);
60 return aiu_fifo_trigger(substream
, cmd
, dai
);
63 static int aiu_fifo_i2s_prepare(struct snd_pcm_substream
*substream
,
64 struct snd_soc_dai
*dai
)
66 struct snd_soc_component
*component
= dai
->component
;
69 ret
= aiu_fifo_prepare(substream
, dai
);
73 snd_soc_component_update_bits(component
,
75 AIU_MEM_I2S_BUF_CNTL_INIT
,
76 AIU_MEM_I2S_BUF_CNTL_INIT
);
77 snd_soc_component_update_bits(component
,
79 AIU_MEM_I2S_BUF_CNTL_INIT
, 0);
84 static int aiu_fifo_i2s_hw_params(struct snd_pcm_substream
*substream
,
85 struct snd_pcm_hw_params
*params
,
86 struct snd_soc_dai
*dai
)
88 struct snd_soc_component
*component
= dai
->component
;
89 struct aiu_fifo
*fifo
= dai
->playback_dma_data
;
93 ret
= aiu_fifo_hw_params(substream
, params
, dai
);
97 switch (params_physical_width(params
)) {
99 val
= AIU_MEM_I2S_CONTROL_MODE_16BIT
;
105 dev_err(dai
->dev
, "Unsupported physical width %u\n",
106 params_physical_width(params
));
110 snd_soc_component_update_bits(component
, AIU_MEM_I2S_CONTROL
,
111 AIU_MEM_I2S_CONTROL_MODE_16BIT
,
114 /* Setup the irq periodicity */
115 val
= params_period_bytes(params
) / fifo
->fifo_block
;
116 val
= FIELD_PREP(AIU_MEM_I2S_MASKS_IRQ_BLOCK
, val
);
117 snd_soc_component_update_bits(component
, AIU_MEM_I2S_MASKS
,
118 AIU_MEM_I2S_MASKS_IRQ_BLOCK
, val
);
123 const struct snd_soc_dai_ops aiu_fifo_i2s_dai_ops
= {
124 .trigger
= aiu_fifo_i2s_trigger
,
125 .prepare
= aiu_fifo_i2s_prepare
,
126 .hw_params
= aiu_fifo_i2s_hw_params
,
127 .hw_free
= aiu_fifo_hw_free
,
128 .startup
= aiu_fifo_startup
,
129 .shutdown
= aiu_fifo_shutdown
,
132 int aiu_fifo_i2s_dai_probe(struct snd_soc_dai
*dai
)
134 struct snd_soc_component
*component
= dai
->component
;
135 struct aiu
*aiu
= snd_soc_component_get_drvdata(component
);
136 struct aiu_fifo
*fifo
;
139 ret
= aiu_fifo_dai_probe(dai
);
143 fifo
= dai
->playback_dma_data
;
145 fifo
->pcm
= &fifo_i2s_pcm
;
146 fifo
->mem_offset
= AIU_MEM_I2S_START
;
147 fifo
->fifo_block
= AIU_FIFO_I2S_BLOCK
;
148 fifo
->pclk
= aiu
->i2s
.clks
[PCLK
].clk
;
149 fifo
->irq
= aiu
->i2s
.irq
;