2 * Copyright (C) 2012,2013 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 #include <linux/linkage.h>
20 #include <asm/assembler.h>
21 #include <asm/kvm_arm.h>
22 #include <asm/kvm_mmu.h>
23 #include <asm/pgtable-hwdef.h>
26 .pushsection .hyp.idmap.text, "ax"
31 ventry __invalid // Synchronous EL2t
32 ventry __invalid // IRQ EL2t
33 ventry __invalid // FIQ EL2t
34 ventry __invalid // Error EL2t
36 ventry __invalid // Synchronous EL2h
37 ventry __invalid // IRQ EL2h
38 ventry __invalid // FIQ EL2h
39 ventry __invalid // Error EL2h
41 ventry __do_hyp_init // Synchronous 64-bit EL1
42 ventry __invalid // IRQ 64-bit EL1
43 ventry __invalid // FIQ 64-bit EL1
44 ventry __invalid // Error 64-bit EL1
46 ventry __invalid // Synchronous 32-bit EL1
47 ventry __invalid // IRQ 32-bit EL1
48 ventry __invalid // FIQ 32-bit EL1
49 ventry __invalid // Error 32-bit EL1
67 ldr x5, =TCR_EL2_FLAGS
70 #ifndef CONFIG_ARM64_VA_BITS_48
72 * If we are running with VA_BITS < 48, we may be running with an extra
73 * level of translation in the ID map. This is only the case if system
74 * RAM is out of range for the currently configured page size and number
75 * of translation levels, in which case we will also need the extra
76 * level for the HYP ID map, or we won't be able to enable the EL2 MMU.
78 * However, at EL2, there is only one TTBR register, and we can't switch
79 * between translation tables *and* update TCR_EL2.T0SZ at the same
80 * time. Bottom line: we need the extra level in *both* our translation
83 * So use the same T0SZ value we use for the ID map.
86 bfi x4, x5, TCR_T0SZ_OFFSET, TCR_TxSZ_WIDTH
90 ldr x4, =VTCR_EL2_FLAGS
92 * Read the PARange bits from ID_AA64MMFR0_EL1 and set the PS bits in
95 mrs x5, ID_AA64MMFR0_EL1
103 /* Invalidate the stale TLBs from Bootloader */
108 and x4, x4, #SCTLR_EL2_EE // preserve endianness of EL2
109 ldr x5, =SCTLR_EL2_FLAGS
114 /* Skip the trampoline dance if we merged the boot and runtime PGDs */
118 /* MMU is now enabled. Get ready for the trampoline dance */
119 ldr x4, =TRAMPOLINE_VA
121 bfi x4, x5, #0, #PAGE_SHIFT
124 target: /* We're now in the trampoline code, switch page tables */
128 /* Invalidate the old TLBs */
133 /* Set the stack and new vectors */
141 ENDPROC(__kvm_hyp_init)