2 * Copyright (c) 2000-2009 LSI Corporation.
6 * Title: MPI Message independent structures and definitions
7 * including System Interface Register Set and
8 * scatter/gather formats.
9 * Creation Date: June 21, 2006
11 * mpi2.h Version: 02.00.11
16 * Date Version Description
17 * -------- -------- ------------------------------------------------------
18 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
19 * 06-04-07 02.00.01 Bumped MPI2_HEADER_VERSION_UNIT.
20 * 06-26-07 02.00.02 Bumped MPI2_HEADER_VERSION_UNIT.
21 * 08-31-07 02.00.03 Bumped MPI2_HEADER_VERSION_UNIT.
22 * Moved ReplyPostHostIndex register to offset 0x6C of the
23 * MPI2_SYSTEM_INTERFACE_REGS and modified the define for
24 * MPI2_REPLY_POST_HOST_INDEX_OFFSET.
25 * Added union of request descriptors.
26 * Added union of reply descriptors.
27 * 10-31-07 02.00.04 Bumped MPI2_HEADER_VERSION_UNIT.
28 * Added define for MPI2_VERSION_02_00.
29 * Fixed the size of the FunctionDependent5 field in the
30 * MPI2_DEFAULT_REPLY structure.
31 * 12-18-07 02.00.05 Bumped MPI2_HEADER_VERSION_UNIT.
32 * Removed the MPI-defined Fault Codes and extended the
33 * product specific codes up to 0xEFFF.
34 * Added a sixth key value for the WriteSequence register
35 * and changed the flush value to 0x0.
36 * Added message function codes for Diagnostic Buffer Post
37 * and Diagnsotic Release.
38 * New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED
39 * Moved MPI2_VERSION_UNION from mpi2_ioc.h.
40 * 02-29-08 02.00.06 Bumped MPI2_HEADER_VERSION_UNIT.
41 * 03-03-08 02.00.07 Bumped MPI2_HEADER_VERSION_UNIT.
42 * 05-21-08 02.00.08 Bumped MPI2_HEADER_VERSION_UNIT.
43 * Added #defines for marking a reply descriptor as unused.
44 * 06-27-08 02.00.09 Bumped MPI2_HEADER_VERSION_UNIT.
45 * 10-02-08 02.00.10 Bumped MPI2_HEADER_VERSION_UNIT.
46 * Moved LUN field defines from mpi2_init.h.
47 * 01-19-09 02.00.11 Bumped MPI2_HEADER_VERSION_UNIT.
48 * --------------------------------------------------------------------------
55 /*****************************************************************************
57 * MPI Version Definitions
59 *****************************************************************************/
61 #define MPI2_VERSION_MAJOR (0x02)
62 #define MPI2_VERSION_MINOR (0x00)
63 #define MPI2_VERSION_MAJOR_MASK (0xFF00)
64 #define MPI2_VERSION_MAJOR_SHIFT (8)
65 #define MPI2_VERSION_MINOR_MASK (0x00FF)
66 #define MPI2_VERSION_MINOR_SHIFT (0)
67 #define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \
70 #define MPI2_VERSION_02_00 (0x0200)
72 /* versioning for this MPI header set */
73 #define MPI2_HEADER_VERSION_UNIT (0x0B)
74 #define MPI2_HEADER_VERSION_DEV (0x00)
75 #define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00)
76 #define MPI2_HEADER_VERSION_UNIT_SHIFT (8)
77 #define MPI2_HEADER_VERSION_DEV_MASK (0x00FF)
78 #define MPI2_HEADER_VERSION_DEV_SHIFT (0)
79 #define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | MPI2_HEADER_VERSION_DEV)
82 /*****************************************************************************
84 * IOC State Definitions
86 *****************************************************************************/
88 #define MPI2_IOC_STATE_RESET (0x00000000)
89 #define MPI2_IOC_STATE_READY (0x10000000)
90 #define MPI2_IOC_STATE_OPERATIONAL (0x20000000)
91 #define MPI2_IOC_STATE_FAULT (0x40000000)
93 #define MPI2_IOC_STATE_MASK (0xF0000000)
94 #define MPI2_IOC_STATE_SHIFT (28)
96 /* Fault state range for prodcut specific codes */
97 #define MPI2_FAULT_PRODUCT_SPECIFIC_MIN (0x0000)
98 #define MPI2_FAULT_PRODUCT_SPECIFIC_MAX (0xEFFF)
101 /*****************************************************************************
103 * System Interface Register Definitions
105 *****************************************************************************/
107 typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS
109 U32 Doorbell
; /* 0x00 */
110 U32 WriteSequence
; /* 0x04 */
111 U32 HostDiagnostic
; /* 0x08 */
112 U32 Reserved1
; /* 0x0C */
113 U32 DiagRWData
; /* 0x10 */
114 U32 DiagRWAddressLow
; /* 0x14 */
115 U32 DiagRWAddressHigh
; /* 0x18 */
116 U32 Reserved2
[5]; /* 0x1C */
117 U32 HostInterruptStatus
; /* 0x30 */
118 U32 HostInterruptMask
; /* 0x34 */
119 U32 DCRData
; /* 0x38 */
120 U32 DCRAddress
; /* 0x3C */
121 U32 Reserved3
[2]; /* 0x40 */
122 U32 ReplyFreeHostIndex
; /* 0x48 */
123 U32 Reserved4
[8]; /* 0x4C */
124 U32 ReplyPostHostIndex
; /* 0x6C */
125 U32 Reserved5
; /* 0x70 */
126 U32 HCBSize
; /* 0x74 */
127 U32 HCBAddressLow
; /* 0x78 */
128 U32 HCBAddressHigh
; /* 0x7C */
129 U32 Reserved6
[16]; /* 0x80 */
130 U32 RequestDescriptorPostLow
; /* 0xC0 */
131 U32 RequestDescriptorPostHigh
; /* 0xC4 */
132 U32 Reserved7
[14]; /* 0xC8 */
133 } MPI2_SYSTEM_INTERFACE_REGS
, MPI2_POINTER PTR_MPI2_SYSTEM_INTERFACE_REGS
,
134 Mpi2SystemInterfaceRegs_t
, MPI2_POINTER pMpi2SystemInterfaceRegs_t
;
137 * Defines for working with the Doorbell register.
139 #define MPI2_DOORBELL_OFFSET (0x00000000)
141 /* IOC --> System values */
142 #define MPI2_DOORBELL_USED (0x08000000)
143 #define MPI2_DOORBELL_WHO_INIT_MASK (0x07000000)
144 #define MPI2_DOORBELL_WHO_INIT_SHIFT (24)
145 #define MPI2_DOORBELL_FAULT_CODE_MASK (0x0000FFFF)
146 #define MPI2_DOORBELL_DATA_MASK (0x0000FFFF)
148 /* System --> IOC values */
149 #define MPI2_DOORBELL_FUNCTION_MASK (0xFF000000)
150 #define MPI2_DOORBELL_FUNCTION_SHIFT (24)
151 #define MPI2_DOORBELL_ADD_DWORDS_MASK (0x00FF0000)
152 #define MPI2_DOORBELL_ADD_DWORDS_SHIFT (16)
156 * Defines for the WriteSequence register
158 #define MPI2_WRITE_SEQUENCE_OFFSET (0x00000004)
159 #define MPI2_WRSEQ_KEY_VALUE_MASK (0x0000000F)
160 #define MPI2_WRSEQ_FLUSH_KEY_VALUE (0x0)
161 #define MPI2_WRSEQ_1ST_KEY_VALUE (0xF)
162 #define MPI2_WRSEQ_2ND_KEY_VALUE (0x4)
163 #define MPI2_WRSEQ_3RD_KEY_VALUE (0xB)
164 #define MPI2_WRSEQ_4TH_KEY_VALUE (0x2)
165 #define MPI2_WRSEQ_5TH_KEY_VALUE (0x7)
166 #define MPI2_WRSEQ_6TH_KEY_VALUE (0xD)
169 * Defines for the HostDiagnostic register
171 #define MPI2_HOST_DIAGNOSTIC_OFFSET (0x00000008)
173 #define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK (0x00001800)
174 #define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT (0x00000000)
175 #define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW (0x00000800)
177 #define MPI2_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400)
178 #define MPI2_DIAG_FORCE_HCB_ON_RESET (0x00000200)
179 #define MPI2_DIAG_HCB_MODE (0x00000100)
180 #define MPI2_DIAG_DIAG_WRITE_ENABLE (0x00000080)
181 #define MPI2_DIAG_FLASH_BAD_SIG (0x00000040)
182 #define MPI2_DIAG_RESET_HISTORY (0x00000020)
183 #define MPI2_DIAG_DIAG_RW_ENABLE (0x00000010)
184 #define MPI2_DIAG_RESET_ADAPTER (0x00000004)
185 #define MPI2_DIAG_HOLD_IOC_RESET (0x00000002)
188 * Offsets for DiagRWData and address
190 #define MPI2_DIAG_RW_DATA_OFFSET (0x00000010)
191 #define MPI2_DIAG_RW_ADDRESS_LOW_OFFSET (0x00000014)
192 #define MPI2_DIAG_RW_ADDRESS_HIGH_OFFSET (0x00000018)
195 * Defines for the HostInterruptStatus register
197 #define MPI2_HOST_INTERRUPT_STATUS_OFFSET (0x00000030)
198 #define MPI2_HIS_SYS2IOC_DB_STATUS (0x80000000)
199 #define MPI2_HIS_IOP_DOORBELL_STATUS MPI2_HIS_SYS2IOC_DB_STATUS
200 #define MPI2_HIS_RESET_IRQ_STATUS (0x40000000)
201 #define MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT (0x00000008)
202 #define MPI2_HIS_IOC2SYS_DB_STATUS (0x00000001)
203 #define MPI2_HIS_DOORBELL_INTERRUPT MPI2_HIS_IOC2SYS_DB_STATUS
206 * Defines for the HostInterruptMask register
208 #define MPI2_HOST_INTERRUPT_MASK_OFFSET (0x00000034)
209 #define MPI2_HIM_RESET_IRQ_MASK (0x40000000)
210 #define MPI2_HIM_REPLY_INT_MASK (0x00000008)
211 #define MPI2_HIM_RIM MPI2_HIM_REPLY_INT_MASK
212 #define MPI2_HIM_IOC2SYS_DB_MASK (0x00000001)
213 #define MPI2_HIM_DIM MPI2_HIM_IOC2SYS_DB_MASK
216 * Offsets for DCRData and address
218 #define MPI2_DCR_DATA_OFFSET (0x00000038)
219 #define MPI2_DCR_ADDRESS_OFFSET (0x0000003C)
222 * Offset for the Reply Free Queue
224 #define MPI2_REPLY_FREE_HOST_INDEX_OFFSET (0x00000048)
227 * Offset for the Reply Descriptor Post Queue
229 #define MPI2_REPLY_POST_HOST_INDEX_OFFSET (0x0000006C)
232 * Defines for the HCBSize and address
234 #define MPI2_HCB_SIZE_OFFSET (0x00000074)
235 #define MPI2_HCB_SIZE_SIZE_MASK (0xFFFFF000)
236 #define MPI2_HCB_SIZE_HCB_ENABLE (0x00000001)
238 #define MPI2_HCB_ADDRESS_LOW_OFFSET (0x00000078)
239 #define MPI2_HCB_ADDRESS_HIGH_OFFSET (0x0000007C)
242 * Offsets for the Request Queue
244 #define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET (0x000000C0)
245 #define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET (0x000000C4)
248 /*****************************************************************************
250 * Message Descriptors
252 *****************************************************************************/
254 /* Request Descriptors */
256 /* Default Request Descriptor */
257 typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR
259 U8 RequestFlags
; /* 0x00 */
263 U16 DescriptorTypeDependent
; /* 0x06 */
264 } MPI2_DEFAULT_REQUEST_DESCRIPTOR
,
265 MPI2_POINTER PTR_MPI2_DEFAULT_REQUEST_DESCRIPTOR
,
266 Mpi2DefaultRequestDescriptor_t
, MPI2_POINTER pMpi2DefaultRequestDescriptor_t
;
268 /* defines for the RequestFlags field */
269 #define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x0E)
270 #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00)
271 #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET (0x02)
272 #define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06)
273 #define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE (0x08)
275 #define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01)
278 /* High Priority Request Descriptor */
279 typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR
281 U8 RequestFlags
; /* 0x00 */
285 U16 Reserved1
; /* 0x06 */
286 } MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR
,
287 MPI2_POINTER PTR_MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR
,
288 Mpi2HighPriorityRequestDescriptor_t
,
289 MPI2_POINTER pMpi2HighPriorityRequestDescriptor_t
;
292 /* SCSI IO Request Descriptor */
293 typedef struct _MPI2_SCSI_IO_REQUEST_DESCRIPTOR
295 U8 RequestFlags
; /* 0x00 */
299 U16 DevHandle
; /* 0x06 */
300 } MPI2_SCSI_IO_REQUEST_DESCRIPTOR
,
301 MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST_DESCRIPTOR
,
302 Mpi2SCSIIORequestDescriptor_t
, MPI2_POINTER pMpi2SCSIIORequestDescriptor_t
;
305 /* SCSI Target Request Descriptor */
306 typedef struct _MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR
308 U8 RequestFlags
; /* 0x00 */
312 U16 IoIndex
; /* 0x06 */
313 } MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR
,
314 MPI2_POINTER PTR_MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR
,
315 Mpi2SCSITargetRequestDescriptor_t
,
316 MPI2_POINTER pMpi2SCSITargetRequestDescriptor_t
;
318 /* union of Request Descriptors */
319 typedef union _MPI2_REQUEST_DESCRIPTOR_UNION
321 MPI2_DEFAULT_REQUEST_DESCRIPTOR Default
;
322 MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR HighPriority
;
323 MPI2_SCSI_IO_REQUEST_DESCRIPTOR SCSIIO
;
324 MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR SCSITarget
;
326 } MPI2_REQUEST_DESCRIPTOR_UNION
, MPI2_POINTER PTR_MPI2_REQUEST_DESCRIPTOR_UNION
,
327 Mpi2RequestDescriptorUnion_t
, MPI2_POINTER pMpi2RequestDescriptorUnion_t
;
330 /* Reply Descriptors */
332 /* Default Reply Descriptor */
333 typedef struct _MPI2_DEFAULT_REPLY_DESCRIPTOR
335 U8 ReplyFlags
; /* 0x00 */
337 U16 DescriptorTypeDependent1
; /* 0x02 */
338 U32 DescriptorTypeDependent2
; /* 0x04 */
339 } MPI2_DEFAULT_REPLY_DESCRIPTOR
, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY_DESCRIPTOR
,
340 Mpi2DefaultReplyDescriptor_t
, MPI2_POINTER pMpi2DefaultReplyDescriptor_t
;
342 /* defines for the ReplyFlags field */
343 #define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK (0x0F)
344 #define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS (0x00)
345 #define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY (0x01)
346 #define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS (0x02)
347 #define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER (0x03)
348 #define MPI2_RPY_DESCRIPT_FLAGS_UNUSED (0x0F)
350 /* values for marking a reply descriptor as unused */
351 #define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK (0xFFFFFFFF)
352 #define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK (0xFFFFFFFF)
354 /* Address Reply Descriptor */
355 typedef struct _MPI2_ADDRESS_REPLY_DESCRIPTOR
357 U8 ReplyFlags
; /* 0x00 */
360 U32 ReplyFrameAddress
; /* 0x04 */
361 } MPI2_ADDRESS_REPLY_DESCRIPTOR
, MPI2_POINTER PTR_MPI2_ADDRESS_REPLY_DESCRIPTOR
,
362 Mpi2AddressReplyDescriptor_t
, MPI2_POINTER pMpi2AddressReplyDescriptor_t
;
364 #define MPI2_ADDRESS_REPLY_SMID_INVALID (0x00)
367 /* SCSI IO Success Reply Descriptor */
368 typedef struct _MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR
370 U8 ReplyFlags
; /* 0x00 */
373 U16 TaskTag
; /* 0x04 */
374 U16 DevHandle
; /* 0x06 */
375 } MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR
,
376 MPI2_POINTER PTR_MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR
,
377 Mpi2SCSIIOSuccessReplyDescriptor_t
,
378 MPI2_POINTER pMpi2SCSIIOSuccessReplyDescriptor_t
;
381 /* TargetAssist Success Reply Descriptor */
382 typedef struct _MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR
384 U8 ReplyFlags
; /* 0x00 */
387 U8 SequenceNumber
; /* 0x04 */
388 U8 Reserved1
; /* 0x05 */
389 U16 IoIndex
; /* 0x06 */
390 } MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR
,
391 MPI2_POINTER PTR_MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR
,
392 Mpi2TargetAssistSuccessReplyDescriptor_t
,
393 MPI2_POINTER pMpi2TargetAssistSuccessReplyDescriptor_t
;
396 /* Target Command Buffer Reply Descriptor */
397 typedef struct _MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR
399 U8 ReplyFlags
; /* 0x00 */
403 U16 InitiatorDevHandle
; /* 0x04 */
404 U16 IoIndex
; /* 0x06 */
405 } MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR
,
406 MPI2_POINTER PTR_MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR
,
407 Mpi2TargetCommandBufferReplyDescriptor_t
,
408 MPI2_POINTER pMpi2TargetCommandBufferReplyDescriptor_t
;
410 /* defines for Flags field */
411 #define MPI2_RPY_DESCRIPT_TCB_FLAGS_PHYNUM_MASK (0x3F)
414 /* union of Reply Descriptors */
415 typedef union _MPI2_REPLY_DESCRIPTORS_UNION
417 MPI2_DEFAULT_REPLY_DESCRIPTOR Default
;
418 MPI2_ADDRESS_REPLY_DESCRIPTOR AddressReply
;
419 MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR SCSIIOSuccess
;
420 MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR TargetAssistSuccess
;
421 MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR TargetCommandBuffer
;
423 } MPI2_REPLY_DESCRIPTORS_UNION
, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION
,
424 Mpi2ReplyDescriptorsUnion_t
, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t
;
428 /*****************************************************************************
431 * 0x80 -> 0x8F reserved for private message use per product
434 *****************************************************************************/
436 #define MPI2_FUNCTION_SCSI_IO_REQUEST (0x00) /* SCSI IO */
437 #define MPI2_FUNCTION_SCSI_TASK_MGMT (0x01) /* SCSI Task Management */
438 #define MPI2_FUNCTION_IOC_INIT (0x02) /* IOC Init */
439 #define MPI2_FUNCTION_IOC_FACTS (0x03) /* IOC Facts */
440 #define MPI2_FUNCTION_CONFIG (0x04) /* Configuration */
441 #define MPI2_FUNCTION_PORT_FACTS (0x05) /* Port Facts */
442 #define MPI2_FUNCTION_PORT_ENABLE (0x06) /* Port Enable */
443 #define MPI2_FUNCTION_EVENT_NOTIFICATION (0x07) /* Event Notification */
444 #define MPI2_FUNCTION_EVENT_ACK (0x08) /* Event Acknowledge */
445 #define MPI2_FUNCTION_FW_DOWNLOAD (0x09) /* FW Download */
446 #define MPI2_FUNCTION_TARGET_ASSIST (0x0B) /* Target Assist */
447 #define MPI2_FUNCTION_TARGET_STATUS_SEND (0x0C) /* Target Status Send */
448 #define MPI2_FUNCTION_TARGET_MODE_ABORT (0x0D) /* Target Mode Abort */
449 #define MPI2_FUNCTION_FW_UPLOAD (0x12) /* FW Upload */
450 #define MPI2_FUNCTION_RAID_ACTION (0x15) /* RAID Action */
451 #define MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16) /* SCSI IO RAID Passthrough */
452 #define MPI2_FUNCTION_TOOLBOX (0x17) /* Toolbox */
453 #define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18) /* SCSI Enclosure Processor */
454 #define MPI2_FUNCTION_SMP_PASSTHROUGH (0x1A) /* SMP Passthrough */
455 #define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B) /* SAS IO Unit Control */
456 #define MPI2_FUNCTION_SATA_PASSTHROUGH (0x1C) /* SATA Passthrough */
457 #define MPI2_FUNCTION_DIAG_BUFFER_POST (0x1D) /* Diagnostic Buffer Post */
458 #define MPI2_FUNCTION_DIAG_RELEASE (0x1E) /* Diagnostic Release */
459 #define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24) /* Target Command Buffer Post Base */
460 #define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25) /* Target Command Buffer Post List */
464 /* Doorbell functions */
465 #define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40)
466 /* #define MPI2_FUNCTION_IO_UNIT_RESET (0x41) */
467 #define MPI2_FUNCTION_HANDSHAKE (0x42)
470 /*****************************************************************************
474 *****************************************************************************/
476 /* mask for IOCStatus status value */
477 #define MPI2_IOCSTATUS_MASK (0x7FFF)
479 /****************************************************************************
480 * Common IOCStatus values for all replies
481 ****************************************************************************/
483 #define MPI2_IOCSTATUS_SUCCESS (0x0000)
484 #define MPI2_IOCSTATUS_INVALID_FUNCTION (0x0001)
485 #define MPI2_IOCSTATUS_BUSY (0x0002)
486 #define MPI2_IOCSTATUS_INVALID_SGL (0x0003)
487 #define MPI2_IOCSTATUS_INTERNAL_ERROR (0x0004)
488 #define MPI2_IOCSTATUS_INVALID_VPID (0x0005)
489 #define MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006)
490 #define MPI2_IOCSTATUS_INVALID_FIELD (0x0007)
491 #define MPI2_IOCSTATUS_INVALID_STATE (0x0008)
492 #define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009)
494 /****************************************************************************
495 * Config IOCStatus values
496 ****************************************************************************/
498 #define MPI2_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
499 #define MPI2_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
500 #define MPI2_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
501 #define MPI2_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
502 #define MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
503 #define MPI2_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
505 /****************************************************************************
507 ****************************************************************************/
509 #define MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040)
510 #define MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE (0x0042)
511 #define MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043)
512 #define MPI2_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044)
513 #define MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045)
514 #define MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046)
515 #define MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047)
516 #define MPI2_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048)
517 #define MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049)
518 #define MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A)
519 #define MPI2_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B)
520 #define MPI2_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C)
522 /****************************************************************************
523 * For use by SCSI Initiator and SCSI Target end-to-end data protection
524 ****************************************************************************/
526 #define MPI2_IOCSTATUS_EEDP_GUARD_ERROR (0x004D)
527 #define MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR (0x004E)
528 #define MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F)
530 /****************************************************************************
532 ****************************************************************************/
534 #define MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062)
535 #define MPI2_IOCSTATUS_TARGET_ABORTED (0x0063)
536 #define MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064)
537 #define MPI2_IOCSTATUS_TARGET_NO_CONNECTION (0x0065)
538 #define MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A)
539 #define MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR (0x006D)
540 #define MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E)
541 #define MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT (0x006F)
542 #define MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT (0x0070)
543 #define MPI2_IOCSTATUS_TARGET_NAK_RECEIVED (0x0071)
545 /****************************************************************************
546 * Serial Attached SCSI values
547 ****************************************************************************/
549 #define MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090)
550 #define MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN (0x0091)
552 /****************************************************************************
553 * Diagnostic Buffer Post / Diagnostic Release values
554 ****************************************************************************/
556 #define MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED (0x00A0)
559 /****************************************************************************
560 * IOCStatus flag to indicate that log info is available
561 ****************************************************************************/
563 #define MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000)
565 /****************************************************************************
567 ****************************************************************************/
569 #define MPI2_IOCLOGINFO_TYPE_MASK (0xF0000000)
570 #define MPI2_IOCLOGINFO_TYPE_SHIFT (28)
571 #define MPI2_IOCLOGINFO_TYPE_NONE (0x0)
572 #define MPI2_IOCLOGINFO_TYPE_SCSI (0x1)
573 #define MPI2_IOCLOGINFO_TYPE_FC (0x2)
574 #define MPI2_IOCLOGINFO_TYPE_SAS (0x3)
575 #define MPI2_IOCLOGINFO_TYPE_ISCSI (0x4)
576 #define MPI2_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF)
579 /*****************************************************************************
581 * Standard Message Structures
583 *****************************************************************************/
585 /****************************************************************************
586 * Request Message Header for all request messages
587 ****************************************************************************/
589 typedef struct _MPI2_REQUEST_HEADER
591 U16 FunctionDependent1
; /* 0x00 */
592 U8 ChainOffset
; /* 0x02 */
593 U8 Function
; /* 0x03 */
594 U16 FunctionDependent2
; /* 0x04 */
595 U8 FunctionDependent3
; /* 0x06 */
596 U8 MsgFlags
; /* 0x07 */
599 U16 Reserved1
; /* 0x0A */
600 } MPI2_REQUEST_HEADER
, MPI2_POINTER PTR_MPI2_REQUEST_HEADER
,
601 MPI2RequestHeader_t
, MPI2_POINTER pMPI2RequestHeader_t
;
604 /****************************************************************************
606 ****************************************************************************/
608 typedef struct _MPI2_DEFAULT_REPLY
610 U16 FunctionDependent1
; /* 0x00 */
611 U8 MsgLength
; /* 0x02 */
612 U8 Function
; /* 0x03 */
613 U16 FunctionDependent2
; /* 0x04 */
614 U8 FunctionDependent3
; /* 0x06 */
615 U8 MsgFlags
; /* 0x07 */
618 U16 Reserved1
; /* 0x0A */
619 U16 FunctionDependent5
; /* 0x0C */
620 U16 IOCStatus
; /* 0x0E */
621 U32 IOCLogInfo
; /* 0x10 */
622 } MPI2_DEFAULT_REPLY
, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY
,
623 MPI2DefaultReply_t
, MPI2_POINTER pMPI2DefaultReply_t
;
626 /* common version structure/union used in messages and configuration pages */
628 typedef struct _MPI2_VERSION_STRUCT
634 } MPI2_VERSION_STRUCT
;
636 typedef union _MPI2_VERSION_UNION
638 MPI2_VERSION_STRUCT Struct
;
640 } MPI2_VERSION_UNION
;
643 /* LUN field defines, common to many structures */
644 #define MPI2_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
645 #define MPI2_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
646 #define MPI2_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
647 #define MPI2_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
648 #define MPI2_LUN_LEVEL_1_WORD (0xFF00)
649 #define MPI2_LUN_LEVEL_1_DWORD (0x0000FF00)
652 /*****************************************************************************
654 * Fusion-MPT MPI Scatter Gather Elements
656 *****************************************************************************/
658 /****************************************************************************
659 * MPI Simple Element structures
660 ****************************************************************************/
662 typedef struct _MPI2_SGE_SIMPLE32
666 } MPI2_SGE_SIMPLE32
, MPI2_POINTER PTR_MPI2_SGE_SIMPLE32
,
667 Mpi2SGESimple32_t
, MPI2_POINTER pMpi2SGESimple32_t
;
669 typedef struct _MPI2_SGE_SIMPLE64
673 } MPI2_SGE_SIMPLE64
, MPI2_POINTER PTR_MPI2_SGE_SIMPLE64
,
674 Mpi2SGESimple64_t
, MPI2_POINTER pMpi2SGESimple64_t
;
676 typedef struct _MPI2_SGE_SIMPLE_UNION
684 } MPI2_SGE_SIMPLE_UNION
, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION
,
685 Mpi2SGESimpleUnion_t
, MPI2_POINTER pMpi2SGESimpleUnion_t
;
688 /****************************************************************************
689 * MPI Chain Element structures
690 ****************************************************************************/
692 typedef struct _MPI2_SGE_CHAIN32
698 } MPI2_SGE_CHAIN32
, MPI2_POINTER PTR_MPI2_SGE_CHAIN32
,
699 Mpi2SGEChain32_t
, MPI2_POINTER pMpi2SGEChain32_t
;
701 typedef struct _MPI2_SGE_CHAIN64
707 } MPI2_SGE_CHAIN64
, MPI2_POINTER PTR_MPI2_SGE_CHAIN64
,
708 Mpi2SGEChain64_t
, MPI2_POINTER pMpi2SGEChain64_t
;
710 typedef struct _MPI2_SGE_CHAIN_UNION
720 } MPI2_SGE_CHAIN_UNION
, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION
,
721 Mpi2SGEChainUnion_t
, MPI2_POINTER pMpi2SGEChainUnion_t
;
724 /****************************************************************************
725 * MPI Transaction Context Element structures
726 ****************************************************************************/
728 typedef struct _MPI2_SGE_TRANSACTION32
734 U32 TransactionContext
[1];
735 U32 TransactionDetails
[1];
736 } MPI2_SGE_TRANSACTION32
, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION32
,
737 Mpi2SGETransaction32_t
, MPI2_POINTER pMpi2SGETransaction32_t
;
739 typedef struct _MPI2_SGE_TRANSACTION64
745 U32 TransactionContext
[2];
746 U32 TransactionDetails
[1];
747 } MPI2_SGE_TRANSACTION64
, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION64
,
748 Mpi2SGETransaction64_t
, MPI2_POINTER pMpi2SGETransaction64_t
;
750 typedef struct _MPI2_SGE_TRANSACTION96
756 U32 TransactionContext
[3];
757 U32 TransactionDetails
[1];
758 } MPI2_SGE_TRANSACTION96
, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION96
,
759 Mpi2SGETransaction96_t
, MPI2_POINTER pMpi2SGETransaction96_t
;
761 typedef struct _MPI2_SGE_TRANSACTION128
767 U32 TransactionContext
[4];
768 U32 TransactionDetails
[1];
769 } MPI2_SGE_TRANSACTION128
, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION128
,
770 Mpi2SGETransaction_t128
, MPI2_POINTER pMpi2SGETransaction_t128
;
772 typedef struct _MPI2_SGE_TRANSACTION_UNION
780 U32 TransactionContext32
[1];
781 U32 TransactionContext64
[2];
782 U32 TransactionContext96
[3];
783 U32 TransactionContext128
[4];
785 U32 TransactionDetails
[1];
786 } MPI2_SGE_TRANSACTION_UNION
, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION
,
787 Mpi2SGETransactionUnion_t
, MPI2_POINTER pMpi2SGETransactionUnion_t
;
790 /****************************************************************************
791 * MPI SGE union for IO SGL's
792 ****************************************************************************/
794 typedef struct _MPI2_MPI_SGE_IO_UNION
798 MPI2_SGE_SIMPLE_UNION Simple
;
799 MPI2_SGE_CHAIN_UNION Chain
;
801 } MPI2_MPI_SGE_IO_UNION
, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION
,
802 Mpi2MpiSGEIOUnion_t
, MPI2_POINTER pMpi2MpiSGEIOUnion_t
;
805 /****************************************************************************
806 * MPI SGE union for SGL's with Simple and Transaction elements
807 ****************************************************************************/
809 typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION
813 MPI2_SGE_SIMPLE_UNION Simple
;
814 MPI2_SGE_TRANSACTION_UNION Transaction
;
816 } MPI2_SGE_TRANS_SIMPLE_UNION
, MPI2_POINTER PTR_MPI2_SGE_TRANS_SIMPLE_UNION
,
817 Mpi2SGETransSimpleUnion_t
, MPI2_POINTER pMpi2SGETransSimpleUnion_t
;
820 /****************************************************************************
821 * All MPI SGE types union
822 ****************************************************************************/
824 typedef struct _MPI2_MPI_SGE_UNION
828 MPI2_SGE_SIMPLE_UNION Simple
;
829 MPI2_SGE_CHAIN_UNION Chain
;
830 MPI2_SGE_TRANSACTION_UNION Transaction
;
832 } MPI2_MPI_SGE_UNION
, MPI2_POINTER PTR_MPI2_MPI_SGE_UNION
,
833 Mpi2MpiSgeUnion_t
, MPI2_POINTER pMpi2MpiSgeUnion_t
;
836 /****************************************************************************
837 * MPI SGE field definition and masks
838 ****************************************************************************/
840 /* Flags field bit definitions */
842 #define MPI2_SGE_FLAGS_LAST_ELEMENT (0x80)
843 #define MPI2_SGE_FLAGS_END_OF_BUFFER (0x40)
844 #define MPI2_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30)
845 #define MPI2_SGE_FLAGS_LOCAL_ADDRESS (0x08)
846 #define MPI2_SGE_FLAGS_DIRECTION (0x04)
847 #define MPI2_SGE_FLAGS_ADDRESS_SIZE (0x02)
848 #define MPI2_SGE_FLAGS_END_OF_LIST (0x01)
850 #define MPI2_SGE_FLAGS_SHIFT (24)
852 #define MPI2_SGE_LENGTH_MASK (0x00FFFFFF)
853 #define MPI2_SGE_CHAIN_LENGTH_MASK (0x0000FFFF)
857 #define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT (0x00)
858 #define MPI2_SGE_FLAGS_SIMPLE_ELEMENT (0x10)
859 #define MPI2_SGE_FLAGS_CHAIN_ELEMENT (0x30)
860 #define MPI2_SGE_FLAGS_ELEMENT_MASK (0x30)
862 /* Address location */
864 #define MPI2_SGE_FLAGS_SYSTEM_ADDRESS (0x00)
868 #define MPI2_SGE_FLAGS_IOC_TO_HOST (0x00)
869 #define MPI2_SGE_FLAGS_HOST_TO_IOC (0x04)
873 #define MPI2_SGE_FLAGS_32_BIT_ADDRESSING (0x00)
874 #define MPI2_SGE_FLAGS_64_BIT_ADDRESSING (0x02)
878 #define MPI2_SGE_FLAGS_32_BIT_CONTEXT (0x00)
879 #define MPI2_SGE_FLAGS_64_BIT_CONTEXT (0x02)
880 #define MPI2_SGE_FLAGS_96_BIT_CONTEXT (0x04)
881 #define MPI2_SGE_FLAGS_128_BIT_CONTEXT (0x06)
883 #define MPI2_SGE_CHAIN_OFFSET_MASK (0x00FF0000)
884 #define MPI2_SGE_CHAIN_OFFSET_SHIFT (16)
886 /****************************************************************************
887 * MPI SGE operation Macros
888 ****************************************************************************/
890 /* SIMPLE FlagsLength manipulations... */
891 #define MPI2_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_SGE_FLAGS_SHIFT)
892 #define MPI2_SGE_GET_FLAGS(f) (((f) & ~MPI2_SGE_LENGTH_MASK) >> MPI2_SGE_FLAGS_SHIFT)
893 #define MPI2_SGE_LENGTH(f) ((f) & MPI2_SGE_LENGTH_MASK)
894 #define MPI2_SGE_CHAIN_LENGTH(f) ((f) & MPI2_SGE_CHAIN_LENGTH_MASK)
896 #define MPI2_SGE_SET_FLAGS_LENGTH(f,l) (MPI2_SGE_SET_FLAGS(f) | MPI2_SGE_LENGTH(l))
898 #define MPI2_pSGE_GET_FLAGS(psg) MPI2_SGE_GET_FLAGS((psg)->FlagsLength)
899 #define MPI2_pSGE_GET_LENGTH(psg) MPI2_SGE_LENGTH((psg)->FlagsLength)
900 #define MPI2_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_SGE_SET_FLAGS_LENGTH(f,l)
902 /* CAUTION - The following are READ-MODIFY-WRITE! */
903 #define MPI2_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_SGE_SET_FLAGS(f)
904 #define MPI2_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_SGE_LENGTH(l)
906 #define MPI2_GET_CHAIN_OFFSET(x) ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> MPI2_SGE_CHAIN_OFFSET_SHIFT)
909 /*****************************************************************************
911 * Fusion-MPT IEEE Scatter Gather Elements
913 *****************************************************************************/
915 /****************************************************************************
916 * IEEE Simple Element structures
917 ****************************************************************************/
919 typedef struct _MPI2_IEEE_SGE_SIMPLE32
923 } MPI2_IEEE_SGE_SIMPLE32
, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE32
,
924 Mpi2IeeeSgeSimple32_t
, MPI2_POINTER pMpi2IeeeSgeSimple32_t
;
926 typedef struct _MPI2_IEEE_SGE_SIMPLE64
933 } MPI2_IEEE_SGE_SIMPLE64
, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE64
,
934 Mpi2IeeeSgeSimple64_t
, MPI2_POINTER pMpi2IeeeSgeSimple64_t
;
936 typedef union _MPI2_IEEE_SGE_SIMPLE_UNION
938 MPI2_IEEE_SGE_SIMPLE32 Simple32
;
939 MPI2_IEEE_SGE_SIMPLE64 Simple64
;
940 } MPI2_IEEE_SGE_SIMPLE_UNION
, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE_UNION
,
941 Mpi2IeeeSgeSimpleUnion_t
, MPI2_POINTER pMpi2IeeeSgeSimpleUnion_t
;
944 /****************************************************************************
945 * IEEE Chain Element structures
946 ****************************************************************************/
948 typedef MPI2_IEEE_SGE_SIMPLE32 MPI2_IEEE_SGE_CHAIN32
;
950 typedef MPI2_IEEE_SGE_SIMPLE64 MPI2_IEEE_SGE_CHAIN64
;
952 typedef union _MPI2_IEEE_SGE_CHAIN_UNION
954 MPI2_IEEE_SGE_CHAIN32 Chain32
;
955 MPI2_IEEE_SGE_CHAIN64 Chain64
;
956 } MPI2_IEEE_SGE_CHAIN_UNION
, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION
,
957 Mpi2IeeeSgeChainUnion_t
, MPI2_POINTER pMpi2IeeeSgeChainUnion_t
;
960 /****************************************************************************
961 * All IEEE SGE types union
962 ****************************************************************************/
964 typedef struct _MPI2_IEEE_SGE_UNION
968 MPI2_IEEE_SGE_SIMPLE_UNION Simple
;
969 MPI2_IEEE_SGE_CHAIN_UNION Chain
;
971 } MPI2_IEEE_SGE_UNION
, MPI2_POINTER PTR_MPI2_IEEE_SGE_UNION
,
972 Mpi2IeeeSgeUnion_t
, MPI2_POINTER pMpi2IeeeSgeUnion_t
;
975 /****************************************************************************
976 * IEEE SGE field definitions and masks
977 ****************************************************************************/
979 /* Flags field bit definitions */
981 #define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK (0x80)
983 #define MPI2_IEEE32_SGE_FLAGS_SHIFT (24)
985 #define MPI2_IEEE32_SGE_LENGTH_MASK (0x00FFFFFF)
989 #define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT (0x00)
990 #define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80)
992 /* Data Location Address Space */
994 #define MPI2_IEEE_SGE_FLAGS_ADDR_MASK (0x03)
995 #define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00)
996 #define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01)
997 #define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02)
998 #define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03)
1001 /****************************************************************************
1002 * IEEE SGE operation Macros
1003 ****************************************************************************/
1005 /* SIMPLE FlagsLength manipulations... */
1006 #define MPI2_IEEE32_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT)
1007 #define MPI2_IEEE32_SGE_GET_FLAGS(f) (((f) & ~MPI2_IEEE32_SGE_LENGTH_MASK) >> MPI2_IEEE32_SGE_FLAGS_SHIFT)
1008 #define MPI2_IEEE32_SGE_LENGTH(f) ((f) & MPI2_IEEE32_SGE_LENGTH_MASK)
1010 #define MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l) (MPI2_IEEE32_SGE_SET_FLAGS(f) | MPI2_IEEE32_SGE_LENGTH(l))
1012 #define MPI2_IEEE32_pSGE_GET_FLAGS(psg) MPI2_IEEE32_SGE_GET_FLAGS((psg)->FlagsLength)
1013 #define MPI2_IEEE32_pSGE_GET_LENGTH(psg) MPI2_IEEE32_SGE_LENGTH((psg)->FlagsLength)
1014 #define MPI2_IEEE32_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f,l)
1016 /* CAUTION - The following are READ-MODIFY-WRITE! */
1017 #define MPI2_IEEE32_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_IEEE32_SGE_SET_FLAGS(f)
1018 #define MPI2_IEEE32_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_IEEE32_SGE_LENGTH(l)
1023 /*****************************************************************************
1025 * Fusion-MPT MPI/IEEE Scatter Gather Unions
1027 *****************************************************************************/
1029 typedef union _MPI2_SIMPLE_SGE_UNION
1031 MPI2_SGE_SIMPLE_UNION MpiSimple
;
1032 MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple
;
1033 } MPI2_SIMPLE_SGE_UNION
, MPI2_POINTER PTR_MPI2_SIMPLE_SGE_UNION
,
1034 Mpi2SimpleSgeUntion_t
, MPI2_POINTER pMpi2SimpleSgeUntion_t
;
1037 typedef union _MPI2_SGE_IO_UNION
1039 MPI2_SGE_SIMPLE_UNION MpiSimple
;
1040 MPI2_SGE_CHAIN_UNION MpiChain
;
1041 MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple
;
1042 MPI2_IEEE_SGE_CHAIN_UNION IeeeChain
;
1043 } MPI2_SGE_IO_UNION
, MPI2_POINTER PTR_MPI2_SGE_IO_UNION
,
1044 Mpi2SGEIOUnion_t
, MPI2_POINTER pMpi2SGEIOUnion_t
;
1047 /****************************************************************************
1049 * Values for SGLFlags field, used in many request messages with an SGL
1051 ****************************************************************************/
1053 /* values for MPI SGL Data Location Address Space subfield */
1054 #define MPI2_SGLFLAGS_ADDRESS_SPACE_MASK (0x0C)
1055 #define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE (0x00)
1056 #define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE (0x04)
1057 #define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08)
1058 #define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE (0x0C)
1059 /* values for SGL Type subfield */
1060 #define MPI2_SGLFLAGS_SGL_TYPE_MASK (0x03)
1061 #define MPI2_SGLFLAGS_SGL_TYPE_MPI (0x00)
1062 #define MPI2_SGLFLAGS_SGL_TYPE_IEEE32 (0x01)
1063 #define MPI2_SGLFLAGS_SGL_TYPE_IEEE64 (0x02)