[PATCH] fix semaphore handling in __unregister_chrdev_region
[linux/fpc-iii.git] / include / asm-frv / highmem.h
blob295f74a57f22975fe01f44170e5d12a587536c68
1 /* highmem.h: virtual kernel memory mappings for high memory
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-i386/highmem.h
7 * See Documentation/fujitsu/frv/mmu-layout.txt for more information.
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
15 #ifndef _ASM_HIGHMEM_H
16 #define _ASM_HIGHMEM_H
18 #ifdef __KERNEL__
20 #include <linux/config.h>
21 #include <linux/init.h>
22 #include <asm/mem-layout.h>
23 #include <asm/spr-regs.h>
24 #include <asm/mb-regs.h>
26 #define NR_TLB_LINES 64 /* number of lines in the TLB */
28 #ifndef __ASSEMBLY__
30 #include <linux/interrupt.h>
31 #include <asm/kmap_types.h>
32 #include <asm/pgtable.h>
34 #ifdef CONFIG_DEBUG_HIGHMEM
35 #define HIGHMEM_DEBUG 1
36 #else
37 #define HIGHMEM_DEBUG 0
38 #endif
40 /* declarations for highmem.c */
41 extern unsigned long highstart_pfn, highend_pfn;
43 #define kmap_prot PAGE_KERNEL
44 #define kmap_pte ______kmap_pte_in_TLB
45 extern pte_t *pkmap_page_table;
47 #define flush_cache_kmaps() do { } while (0)
50 * Right now we initialize only a single pte table. It can be extended
51 * easily, subsequent pte tables have to be allocated in one physical
52 * chunk of RAM.
54 #define LAST_PKMAP PTRS_PER_PTE
55 #define LAST_PKMAP_MASK (LAST_PKMAP - 1)
56 #define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT)
57 #define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
59 extern void *kmap_high(struct page *page);
60 extern void kunmap_high(struct page *page);
62 extern void *kmap(struct page *page);
63 extern void kunmap(struct page *page);
65 extern struct page *kmap_atomic_to_page(void *ptr);
67 #endif /* !__ASSEMBLY__ */
70 * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
71 * gives a more generic (and caching) interface. But kmap_atomic can
72 * be used in IRQ contexts, so in some (very limited) cases we need
73 * it.
75 #define KMAP_ATOMIC_CACHE_DAMR 8
77 #ifndef __ASSEMBLY__
79 #define __kmap_atomic_primary(type, paddr, ampr) \
80 ({ \
81 unsigned long damlr, dampr; \
83 dampr = paddr | xAMPRx_L | xAMPRx_M | xAMPRx_S | xAMPRx_SS_16Kb | xAMPRx_V; \
85 if (type != __KM_CACHE) \
86 asm volatile("movgs %0,dampr"#ampr :: "r"(dampr)); \
87 else \
88 asm volatile("movgs %0,iampr"#ampr"\n" \
89 "movgs %0,dampr"#ampr"\n" \
90 :: "r"(dampr) \
91 ); \
93 asm("movsg damlr"#ampr",%0" : "=r"(damlr)); \
95 /*printk("DAMR"#ampr": PRIM sl=%d L=%08lx P=%08lx\n", type, damlr, dampr);*/ \
97 (void *) damlr; \
100 #define __kmap_atomic_secondary(slot, paddr) \
101 ({ \
102 unsigned long damlr = KMAP_ATOMIC_SECONDARY_FRAME + (slot) * PAGE_SIZE; \
103 unsigned long dampr = paddr | xAMPRx_L | xAMPRx_M | xAMPRx_S | xAMPRx_SS_16Kb | xAMPRx_V; \
105 asm volatile("movgs %0,tplr \n" \
106 "movgs %1,tppr \n" \
107 "tlbpr %0,gr0,#2,#1" \
108 : : "r"(damlr), "r"(dampr)); \
110 /*printk("TLB: SECN sl=%d L=%08lx P=%08lx\n", slot, damlr, dampr);*/ \
112 (void *) damlr; \
115 static inline void *kmap_atomic(struct page *page, enum km_type type)
117 unsigned long paddr;
119 preempt_disable();
120 paddr = page_to_phys(page);
122 switch (type) {
123 case 0: return __kmap_atomic_primary(0, paddr, 2);
124 case 1: return __kmap_atomic_primary(1, paddr, 3);
125 case 2: return __kmap_atomic_primary(2, paddr, 4);
126 case 3: return __kmap_atomic_primary(3, paddr, 5);
127 case 4: return __kmap_atomic_primary(4, paddr, 6);
128 case 5: return __kmap_atomic_primary(5, paddr, 7);
129 case 6: return __kmap_atomic_primary(6, paddr, 8);
130 case 7: return __kmap_atomic_primary(7, paddr, 9);
131 case 8: return __kmap_atomic_primary(8, paddr, 10);
133 case 9 ... 9 + NR_TLB_LINES - 1:
134 return __kmap_atomic_secondary(type - 9, paddr);
136 default:
137 BUG();
138 return 0;
142 #define __kunmap_atomic_primary(type, ampr) \
143 do { \
144 asm volatile("movgs gr0,dampr"#ampr"\n"); \
145 if (type == __KM_CACHE) \
146 asm volatile("movgs gr0,iampr"#ampr"\n"); \
147 } while(0)
149 #define __kunmap_atomic_secondary(slot, vaddr) \
150 do { \
151 asm volatile("tlbpr %0,gr0,#4,#1" : : "r"(vaddr)); \
152 } while(0)
154 static inline void kunmap_atomic(void *kvaddr, enum km_type type)
156 switch (type) {
157 case 0: __kunmap_atomic_primary(0, 2); break;
158 case 1: __kunmap_atomic_primary(1, 3); break;
159 case 2: __kunmap_atomic_primary(2, 4); break;
160 case 3: __kunmap_atomic_primary(3, 5); break;
161 case 4: __kunmap_atomic_primary(4, 6); break;
162 case 5: __kunmap_atomic_primary(5, 7); break;
163 case 6: __kunmap_atomic_primary(6, 8); break;
164 case 7: __kunmap_atomic_primary(7, 9); break;
165 case 8: __kunmap_atomic_primary(8, 10); break;
167 case 9 ... 9 + NR_TLB_LINES - 1:
168 __kunmap_atomic_secondary(type - 9, kvaddr);
169 break;
171 default:
172 BUG();
174 preempt_enable();
177 #endif /* !__ASSEMBLY__ */
179 #endif /* __KERNEL__ */
181 #endif /* _ASM_HIGHMEM_H */