sound/drivers/vx/vx_uer.c

   1 /*
   2  * Driver for Digigram VX soundcards
   3  *
   4  * IEC958 stuff
   5  *
   6  * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
   7  *
   8  *   This program is free software; you can redistribute it and/or modify
   9  *   it under the terms of the GNU General Public License as published by
  10  *   the Free Software Foundation; either version 2 of the License, or
  11  *   (at your option) any later version.
  12  *
  13  *   This program is distributed in the hope that it will be useful,
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *   GNU General Public License for more details.
  17  *
  18  *   You should have received a copy of the GNU General Public License
  19  *   along with this program; if not, write to the Free Software
  20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21  */
  22
  23 #include <sound/driver.h>
  24 #include <linux/delay.h>
  25 #include <sound/core.h>
  26 #include <sound/vx_core.h>
  27 #include "vx_cmd.h"
  28
  29
  30 /*
  31  * vx_modify_board_clock - tell the board that its clock has been modified
  32  * @sync: DSP needs to resynchronize its FIFO
  33  */
  34 static int vx_modify_board_clock(vx_core_t *chip, int sync)
  35 {
  36         struct vx_rmh rmh;
  37
  38         vx_init_rmh(&rmh, CMD_MODIFY_CLOCK);
  39         /* Ask the DSP to resynchronize its FIFO. */
  40         if (sync)
  41                 rmh.Cmd[0] |= CMD_MODIFY_CLOCK_S_BIT;
  42         return vx_send_msg(chip, &rmh);
  43 }
  44
  45 /*
  46  * vx_modify_board_inputs - resync audio inputs
  47  */
  48 static int vx_modify_board_inputs(vx_core_t *chip)
  49 {
  50         struct vx_rmh rmh;
  51
  52         vx_init_rmh(&rmh, CMD_RESYNC_AUDIO_INPUTS);
  53         rmh.Cmd[0] |= 1 << 0; /* reference: AUDIO 0 */
  54         return vx_send_msg(chip, &rmh);
  55 }
  56
  57 /*
  58  * vx_read_one_cbit - read one bit from UER config
  59  * @index: the bit index
  60  * returns 0 or 1.
  61  */
  62 static int vx_read_one_cbit(vx_core_t *chip, int index)
  63 {
  64         unsigned long flags;
  65         int val;
  66         spin_lock_irqsave(&chip->lock, flags);
  67         if (chip->type >= VX_TYPE_VXPOCKET) {
  68                 vx_outb(chip, CSUER, 1); /* read */
  69                 vx_outb(chip, RUER, index & XX_UER_CBITS_OFFSET_MASK);
  70                 val = (vx_inb(chip, RUER) >> 7) & 0x01;
  71         } else {
  72                 vx_outl(chip, CSUER, 1); /* read */
  73                 vx_outl(chip, RUER, index & XX_UER_CBITS_OFFSET_MASK);
  74                 val = (vx_inl(chip, RUER) >> 7) & 0x01;
  75         }
  76         spin_unlock_irqrestore(&chip->lock, flags);
  77         return val;
  78 }
  79
  80 /*
  81  * vx_write_one_cbit - write one bit to UER config
  82  * @index: the bit index
  83  * @val: bit value, 0 or 1
  84  */
  85 static void vx_write_one_cbit(vx_core_t *chip, int index, int val)
  86 {
  87         unsigned long flags;
  88         val = !!val;    /* 0 or 1 */
  89         spin_lock_irqsave(&chip->lock, flags);
  90         if (vx_is_pcmcia(chip)) {
  91                 vx_outb(chip, CSUER, 0); /* write */
  92                 vx_outb(chip, RUER, (val << 7) | (index & XX_UER_CBITS_OFFSET_MASK));
  93         } else {
  94                 vx_outl(chip, CSUER, 0); /* write */
  95                 vx_outl(chip, RUER, (val << 7) | (index & XX_UER_CBITS_OFFSET_MASK));
  96         }
  97         spin_unlock_irqrestore(&chip->lock, flags);
  98 }
  99
 100 /*
 101  * vx_read_uer_status - read the current UER status
 102  * @mode: pointer to store the UER mode, VX_UER_MODE_XXX
 103  *
 104  * returns the frequency of UER, or 0 if not sync,
 105  * or a negative error code.
 106  */
 107 static int vx_read_uer_status(vx_core_t *chip, int *mode)
 108 {
 109         int val, freq;
 110
 111         /* Default values */
 112         freq = 0;
 113
 114         /* Read UER status */
 115         if (vx_is_pcmcia(chip))
 116             val = vx_inb(chip, CSUER);
 117         else
 118             val = vx_inl(chip, CSUER);
 119         if (val < 0)
 120                 return val;
 121         /* If clock is present, read frequency */
 122         if (val & VX_SUER_CLOCK_PRESENT_MASK) {
 123                 switch (val & VX_SUER_FREQ_MASK) {
 124                 case VX_SUER_FREQ_32KHz_MASK:
 125                         freq = 32000;
 126                         break;
 127                 case VX_SUER_FREQ_44KHz_MASK:
 128                         freq = 44100;
 129                         break;
 130                 case VX_SUER_FREQ_48KHz_MASK:
 131                         freq = 48000;
 132                         break;
 133                 }
 134         }
 135         if (val & VX_SUER_DATA_PRESENT_MASK)
 136                 /* bit 0 corresponds to consumer/professional bit */
 137                 *mode = vx_read_one_cbit(chip, 0) ?
 138                         VX_UER_MODE_PROFESSIONAL : VX_UER_MODE_CONSUMER;
 139         else
 140                 *mode = VX_UER_MODE_NOT_PRESENT;
 141
 142         return freq;
 143 }
 144
 145
 146 /*
 147  * compute the sample clock value from frequency
 148  *
 149  * The formula is as follows:
 150  *
 151  *    HexFreq = (dword) ((double) ((double) 28224000 / (double) Frequency))
 152  *    switch ( HexFreq & 0x00000F00 )
 153  *    case 0x00000100: ;
 154  *    case 0x00000200:
 155  *    case 0x00000300: HexFreq -= 0x00000201 ;
 156  *    case 0x00000400:
 157  *    case 0x00000500:
 158  *    case 0x00000600:
 159  *    case 0x00000700: HexFreq = (dword) (((double) 28224000 / (double) (Frequency*2)) - 1)
 160  *    default        : HexFreq = (dword) ((double) 28224000 / (double) (Frequency*4)) - 0x000001FF
 161  */
 162
 163 static int vx_calc_clock_from_freq(vx_core_t *chip, int freq)
 164 {
 165 #define XX_FECH48000                    0x0000004B
 166 #define XX_FECH32000                    0x00000171
 167 #define XX_FECH24000                    0x0000024B
 168 #define XX_FECH16000                    0x00000371
 169 #define XX_FECH12000                    0x0000044B
 170 #define XX_FECH8000                     0x00000571
 171 #define XX_FECH44100                    0x0000007F
 172 #define XX_FECH29400                    0x0000016F
 173 #define XX_FECH22050                    0x0000027F
 174 #define XX_FECH14000                    0x000003EF
 175 #define XX_FECH11025                    0x0000047F
 176 #define XX_FECH7350                     0x000005BF
 177
 178         switch (freq) {
 179         case 48000:     return XX_FECH48000;
 180         case 44100:     return XX_FECH44100;
 181         case 32000:     return XX_FECH32000;
 182         case 29400:     return XX_FECH29400;
 183         case 24000:     return XX_FECH24000;
 184         case 22050:     return XX_FECH22050;
 185         case 16000:     return XX_FECH16000;
 186         case 14000:     return XX_FECH14000;
 187         case 12000:     return XX_FECH12000;
 188         case 11025:     return XX_FECH11025;
 189         case 8000:      return XX_FECH8000;
 190         case 7350:      return XX_FECH7350;
 191         default:        return freq;   /* The value is already correct */
 192         }
 193 }
 194
 195
 196 /*
 197  * vx_change_clock_source - change the clock source
 198  * @source: the new source
 199  */
 200 static void vx_change_clock_source(vx_core_t *chip, int source)
 201 {
 202         unsigned long flags;
 203
 204         /* we mute DAC to prevent clicks */
 205         vx_toggle_dac_mute(chip, 1);
 206         spin_lock_irqsave(&chip->lock, flags);
 207         chip->ops->set_clock_source(chip, source);
 208         chip->clock_source = source;
 209         spin_unlock_irqrestore(&chip->lock, flags);
 210         /* unmute */
 211         vx_toggle_dac_mute(chip, 0);
 212 }
 213
 214
 215 /*
 216  * set the internal clock
 217  */
 218 void vx_set_internal_clock(vx_core_t *chip, unsigned int freq)
 219 {
 220         int clock;
 221         unsigned long flags;
 222         /* Get real clock value */
 223         clock = vx_calc_clock_from_freq(chip, freq);
 224         snd_printdd(KERN_DEBUG "set internal clock to 0x%x from freq %d\n", clock, freq);
 225         spin_lock_irqsave(&chip->lock, flags);
 226         if (vx_is_pcmcia(chip)) {
 227                 vx_outb(chip, HIFREQ, (clock >> 8) & 0x0f);
 228                 vx_outb(chip, LOFREQ, clock & 0xff);
 229         } else {
 230                 vx_outl(chip, HIFREQ, (clock >> 8) & 0x0f);
 231                 vx_outl(chip, LOFREQ, clock & 0xff);
 232         }
 233         spin_unlock_irqrestore(&chip->lock, flags);
 234 }
 235
 236
 237 /*
 238  * set the iec958 status bits
 239  * @bits: 32-bit status bits
 240  */
 241 void vx_set_iec958_status(vx_core_t *chip, unsigned int bits)
 242 {
 243         int i;
 244
 245         if (chip->chip_status & VX_STAT_IS_STALE)
 246                 return;
 247
 248         for (i = 0; i < 32; i++)
 249                 vx_write_one_cbit(chip, i, bits & (1 << i));
 250 }
 251
 252
 253 /*
 254  * vx_set_clock - change the clock and audio source if necessary
 255  */
 256 int vx_set_clock(vx_core_t *chip, unsigned int freq)
 257 {
 258         int src_changed = 0;
 259
 260         if (chip->chip_status & VX_STAT_IS_STALE)
 261                 return 0;
 262
 263         /* change the audio source if possible */
 264         vx_sync_audio_source(chip);
 265
 266         if (chip->clock_mode == VX_CLOCK_MODE_EXTERNAL ||
 267             (chip->clock_mode == VX_CLOCK_MODE_AUTO &&
 268              chip->audio_source == VX_AUDIO_SRC_DIGITAL)) {
 269                 if (chip->clock_source != UER_SYNC) {
 270                         vx_change_clock_source(chip, UER_SYNC);
 271                         mdelay(6);
 272                         src_changed = 1;
 273                 }
 274         } else if (chip->clock_mode == VX_CLOCK_MODE_INTERNAL ||
 275                    (chip->clock_mode == VX_CLOCK_MODE_AUTO &&
 276                     chip->audio_source != VX_AUDIO_SRC_DIGITAL)) {
 277                 if (chip->clock_source != INTERNAL_QUARTZ) {
 278                         vx_change_clock_source(chip, INTERNAL_QUARTZ);
 279                         src_changed = 1;
 280                 }
 281                 if (chip->freq == freq)
 282                         return 0;
 283                 vx_set_internal_clock(chip, freq);
 284                 if (src_changed)
 285                         vx_modify_board_inputs(chip);
 286         }
 287         if (chip->freq == freq)
 288                 return 0;
 289         chip->freq = freq;
 290         vx_modify_board_clock(chip, 1);
 291         return 0;
 292 }
 293
 294
 295 /*
 296  * vx_change_frequency - called from interrupt handler
 297  */
 298 int vx_change_frequency(vx_core_t *chip)
 299 {
 300         int freq;
 301
 302         if (chip->chip_status & VX_STAT_IS_STALE)
 303                 return 0;
 304
 305         if (chip->clock_source == INTERNAL_QUARTZ)
 306                 return 0;
 307         /*
 308          * Read the real UER board frequency
 309          */
 310         freq = vx_read_uer_status(chip, &chip->uer_detected);
 311         if (freq < 0)
 312                 return freq;
 313         /*
 314          * The frequency computed by the DSP is good and
 315          * is different from the previous computed.
 316          */
 317         if (freq == 48000 || freq == 44100 || freq == 32000)
 318                 chip->freq_detected = freq;
 319
 320         return 0;
 321 }