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1 /*********************************************************************
2 *
3 * msnd_pinnacle.h
4 *
5 * Turtle Beach MultiSound Sound Card Driver for Linux
6 *
7 * Some parts of this header file were derived from the Turtle Beach
8 * MultiSound Driver Development Kit.
9 *
10 * Copyright (C) 1998 Andrew Veliath
11 * Copyright (C) 1993 Turtle Beach Systems, Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 *
27 * $Id: msnd_pinnacle.h,v 1.11 1999/03/21 17:36:09 andrewtv Exp $
28 *
29 ********************************************************************/
30 #ifndef __MSND_PINNACLE_H
31 #define __MSND_PINNACLE_H
33 #include <linux/config.h>
35 #define DSP_NUMIO 0x08
37 #define IREG_LOGDEVICE 0x07
38 #define IREG_ACTIVATE 0x30
39 #define LD_ACTIVATE 0x01
40 #define LD_DISACTIVATE 0x00
41 #define IREG_EECONTROL 0x3F
42 #define IREG_MEMBASEHI 0x40
43 #define IREG_MEMBASELO 0x41
44 #define IREG_MEMCONTROL 0x42
45 #define IREG_MEMRANGEHI 0x43
46 #define IREG_MEMRANGELO 0x44
47 #define MEMTYPE_8BIT 0x00
48 #define MEMTYPE_16BIT 0x02
49 #define MEMTYPE_RANGE 0x00
50 #define MEMTYPE_HIADDR 0x01
51 #define IREG_IO0_BASEHI 0x60
52 #define IREG_IO0_BASELO 0x61
53 #define IREG_IO1_BASEHI 0x62
54 #define IREG_IO1_BASELO 0x63
55 #define IREG_IRQ_NUMBER 0x70
56 #define IREG_IRQ_TYPE 0x71
57 #define IRQTYPE_HIGH 0x02
58 #define IRQTYPE_LOW 0x00
59 #define IRQTYPE_LEVEL 0x01
60 #define IRQTYPE_EDGE 0x00
62 #define HP_DSPR 0x04
63 #define HP_BLKS 0x04
65 #define HPDSPRESET_OFF 2
66 #define HPDSPRESET_ON 0
68 #define HPBLKSEL_0 2
69 #define HPBLKSEL_1 3
71 #define HIMT_DAT_OFF 0x03
73 #define HIDSP_PLAY_UNDER 0x00
74 #define HIDSP_INT_PLAY_UNDER 0x01
75 #define HIDSP_SSI_TX_UNDER 0x02
76 #define HIDSP_RECQ_OVERFLOW 0x08
77 #define HIDSP_INT_RECORD_OVER 0x09
78 #define HIDSP_SSI_RX_OVERFLOW 0x0a
80 #define HIDSP_MIDI_IN_OVER 0x10
82 #define HIDSP_MIDI_FRAME_ERR 0x11
83 #define HIDSP_MIDI_PARITY_ERR 0x12
84 #define HIDSP_MIDI_OVERRUN_ERR 0x13
86 #define HIDSP_INPUT_CLIPPING 0x20
87 #define HIDSP_MIX_CLIPPING 0x30
88 #define HIDSP_DAT_IN_OFF 0x21
90 #define HDEXAR_SET_ANA_IN 0
91 #define HDEXAR_CLEAR_PEAKS 1
92 #define HDEXAR_IN_SET_POTS 2
93 #define HDEXAR_AUX_SET_POTS 3
94 #define HDEXAR_CAL_A_TO_D 4
95 #define HDEXAR_RD_EXT_DSP_BITS 5
97 #define HDEXAR_SET_SYNTH_IN 4
98 #define HDEXAR_READ_DAT_IN 5
99 #define HDEXAR_MIC_SET_POTS 6
100 #define HDEXAR_SET_DAT_IN 7
102 #define HDEXAR_SET_SYNTH_48 8
103 #define HDEXAR_SET_SYNTH_44 9
105 #define TIME_PRO_RESET_DONE 0x028A
106 #define TIME_PRO_SYSEX 0x001E
107 #define TIME_PRO_RESET 0x0032
109 #define AGND 0x01
110 #define SIGNAL 0x02
112 #define EXT_DSP_BIT_DCAL 0x0001
113 #define EXT_DSP_BIT_MIDI_CON 0x0002
115 #define BUFFSIZE 0x8000
116 #define HOSTQ_SIZE 0x40
118 #define SRAM_CNTL_START 0x7F00
119 #define SMA_STRUCT_START 0x7F40
121 #define DAP_BUFF_SIZE 0x2400
122 #define DAR_BUFF_SIZE 0x2000
124 #define DAPQ_STRUCT_SIZE 0x10
125 #define DARQ_STRUCT_SIZE 0x10
126 #define DAPQ_BUFF_SIZE (3 * 0x10)
127 #define DARQ_BUFF_SIZE (3 * 0x10)
128 #define MODQ_BUFF_SIZE 0x400
129 #define MIDQ_BUFF_SIZE 0x800
130 #define DSPQ_BUFF_SIZE 0x5A0
132 #define DAPQ_DATA_BUFF 0x6C00
133 #define DARQ_DATA_BUFF 0x6C30
134 #define MODQ_DATA_BUFF 0x6C60
135 #define MIDQ_DATA_BUFF 0x7060
136 #define DSPQ_DATA_BUFF 0x7860
138 #define DAPQ_OFFSET SRAM_CNTL_START
139 #define DARQ_OFFSET (SRAM_CNTL_START + 0x08)
140 #define MODQ_OFFSET (SRAM_CNTL_START + 0x10)
141 #define MIDQ_OFFSET (SRAM_CNTL_START + 0x18)
142 #define DSPQ_OFFSET (SRAM_CNTL_START + 0x20)
144 #define MOP_WAVEHDR 0
145 #define MOP_EXTOUT 1
146 #define MOP_HWINIT 0xfe
147 #define MOP_NONE 0xff
148 #define MOP_MAX 1
150 #define MIP_EXTIN 0
151 #define MIP_WAVEHDR 1
152 #define MIP_HWINIT 0xfe
153 #define MIP_MAX 1
155 /* Pinnacle/Fiji SMA Common Data */
156 #define SMA_wCurrPlayBytes 0x0000
157 #define SMA_wCurrRecordBytes 0x0002
158 #define SMA_wCurrPlayVolLeft 0x0004
159 #define SMA_wCurrPlayVolRight 0x0006
160 #define SMA_wCurrInVolLeft 0x0008
161 #define SMA_wCurrInVolRight 0x000a
162 #define SMA_wCurrMHdrVolLeft 0x000c
163 #define SMA_wCurrMHdrVolRight 0x000e
164 #define SMA_dwCurrPlayPitch 0x0010
165 #define SMA_dwCurrPlayRate 0x0014
166 #define SMA_wCurrMIDIIOPatch 0x0018
167 #define SMA_wCurrPlayFormat 0x001a
168 #define SMA_wCurrPlaySampleSize 0x001c
169 #define SMA_wCurrPlayChannels 0x001e
170 #define SMA_wCurrPlaySampleRate 0x0020
171 #define SMA_wCurrRecordFormat 0x0022
172 #define SMA_wCurrRecordSampleSize 0x0024
173 #define SMA_wCurrRecordChannels 0x0026
174 #define SMA_wCurrRecordSampleRate 0x0028
175 #define SMA_wCurrDSPStatusFlags 0x002a
176 #define SMA_wCurrHostStatusFlags 0x002c
177 #define SMA_wCurrInputTagBits 0x002e
178 #define SMA_wCurrLeftPeak 0x0030
179 #define SMA_wCurrRightPeak 0x0032
180 #define SMA_bMicPotPosLeft 0x0034
181 #define SMA_bMicPotPosRight 0x0035
182 #define SMA_bMicPotMaxLeft 0x0036
183 #define SMA_bMicPotMaxRight 0x0037
184 #define SMA_bInPotPosLeft 0x0038
185 #define SMA_bInPotPosRight 0x0039
186 #define SMA_bAuxPotPosLeft 0x003a
187 #define SMA_bAuxPotPosRight 0x003b
188 #define SMA_bInPotMaxLeft 0x003c
189 #define SMA_bInPotMaxRight 0x003d
190 #define SMA_bAuxPotMaxLeft 0x003e
191 #define SMA_bAuxPotMaxRight 0x003f
192 #define SMA_bInPotMaxMethod 0x0040
193 #define SMA_bAuxPotMaxMethod 0x0041
194 #define SMA_wCurrMastVolLeft 0x0042
195 #define SMA_wCurrMastVolRight 0x0044
196 #define SMA_wCalFreqAtoD 0x0046
197 #define SMA_wCurrAuxVolLeft 0x0048
198 #define SMA_wCurrAuxVolRight 0x004a
199 #define SMA_wCurrPlay1VolLeft 0x004c
200 #define SMA_wCurrPlay1VolRight 0x004e
201 #define SMA_wCurrPlay2VolLeft 0x0050
202 #define SMA_wCurrPlay2VolRight 0x0052
203 #define SMA_wCurrPlay3VolLeft 0x0054
204 #define SMA_wCurrPlay3VolRight 0x0056
205 #define SMA_wCurrPlay4VolLeft 0x0058
206 #define SMA_wCurrPlay4VolRight 0x005a
207 #define SMA_wCurrPlay1PeakLeft 0x005c
208 #define SMA_wCurrPlay1PeakRight 0x005e
209 #define SMA_wCurrPlay2PeakLeft 0x0060
210 #define SMA_wCurrPlay2PeakRight 0x0062
211 #define SMA_wCurrPlay3PeakLeft 0x0064
212 #define SMA_wCurrPlay3PeakRight 0x0066
213 #define SMA_wCurrPlay4PeakLeft 0x0068
214 #define SMA_wCurrPlay4PeakRight 0x006a
215 #define SMA_wCurrPlayPeakLeft 0x006c
216 #define SMA_wCurrPlayPeakRight 0x006e
217 #define SMA_wCurrDATSR 0x0070
218 #define SMA_wCurrDATRXCHNL 0x0072
219 #define SMA_wCurrDATTXCHNL 0x0074
220 #define SMA_wCurrDATRXRate 0x0076
221 #define SMA_dwDSPPlayCount 0x0078
222 #define SMA__size 0x007c
224 #ifdef HAVE_DSPCODEH
227 # define PERMCODE pndsperm
228 # define INITCODE pndspini
229 # define PERMCODESIZE sizeof(pndsperm)
230 # define INITCODESIZE sizeof(pndspini)
231 #else
232 # ifndef CONFIG_MSNDPIN_INIT_FILE
233 # define CONFIG_MSNDPIN_INIT_FILE \
234 "/etc/sound/pndspini.bin"
235 # endif
236 # ifndef CONFIG_MSNDPIN_PERM_FILE
237 # define CONFIG_MSNDPIN_PERM_FILE \
238 "/etc/sound/pndsperm.bin"
239 # endif
240 # define PERMCODEFILE CONFIG_MSNDPIN_PERM_FILE
241 # define INITCODEFILE CONFIG_MSNDPIN_INIT_FILE
242 # define PERMCODE dspini
243 # define INITCODE permini
244 # define PERMCODESIZE sizeof_dspini
245 # define INITCODESIZE sizeof_permini
246 #endif