drivers/phy/phy-qcom-ufs-qmp-14nm.c

   1 /*
   2  * Copyright (c) 2013-2015, Linux Foundation. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 and
   6  * only version 2 as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  */
  14
  15 #include "phy-qcom-ufs-qmp-14nm.h"
  16
  17 #define UFS_PHY_NAME "ufs_phy_qmp_14nm"
  18 #define UFS_PHY_VDDA_PHY_UV     (925000)
  19
  20 static
  21 int ufs_qcom_phy_qmp_14nm_phy_calibrate(struct ufs_qcom_phy *ufs_qcom_phy,
  22                                         bool is_rate_B)
  23 {
  24         int tbl_size_A = ARRAY_SIZE(phy_cal_table_rate_A);
  25         int tbl_size_B = ARRAY_SIZE(phy_cal_table_rate_B);
  26         int err;
  27
  28         err = ufs_qcom_phy_calibrate(ufs_qcom_phy, phy_cal_table_rate_A,
  29                 tbl_size_A, phy_cal_table_rate_B, tbl_size_B, is_rate_B);
  30
  31         if (err)
  32                 dev_err(ufs_qcom_phy->dev,
  33                         "%s: ufs_qcom_phy_calibrate() failed %d\n",
  34                         __func__, err);
  35         return err;
  36 }
  37
  38 static
  39 void ufs_qcom_phy_qmp_14nm_advertise_quirks(struct ufs_qcom_phy *phy_common)
  40 {
  41         phy_common->quirks =
  42                 UFS_QCOM_PHY_QUIRK_HIBERN8_EXIT_AFTER_PHY_PWR_COLLAPSE;
  43 }
  44
  45 static int ufs_qcom_phy_qmp_14nm_init(struct phy *generic_phy)
  46 {
  47         struct ufs_qcom_phy_qmp_14nm *phy = phy_get_drvdata(generic_phy);
  48         struct ufs_qcom_phy *phy_common = &phy->common_cfg;
  49         int err;
  50
  51         err = ufs_qcom_phy_init_clks(generic_phy, phy_common);
  52         if (err) {
  53                 dev_err(phy_common->dev, "%s: ufs_qcom_phy_init_clks() failed %d\n",
  54                         __func__, err);
  55                 goto out;
  56         }
  57
  58         err = ufs_qcom_phy_init_vregulators(generic_phy, phy_common);
  59         if (err) {
  60                 dev_err(phy_common->dev, "%s: ufs_qcom_phy_init_vregulators() failed %d\n",
  61                         __func__, err);
  62                 goto out;
  63         }
  64         phy_common->vdda_phy.max_uV = UFS_PHY_VDDA_PHY_UV;
  65         phy_common->vdda_phy.min_uV = UFS_PHY_VDDA_PHY_UV;
  66
  67         ufs_qcom_phy_qmp_14nm_advertise_quirks(phy_common);
  68
  69 out:
  70         return err;
  71 }
  72
  73 static
  74 void ufs_qcom_phy_qmp_14nm_power_control(struct ufs_qcom_phy *phy, bool val)
  75 {
  76         writel_relaxed(val ? 0x1 : 0x0, phy->mmio + UFS_PHY_POWER_DOWN_CONTROL);
  77         /*
  78          * Before any transactions involving PHY, ensure PHY knows
  79          * that it's analog rail is powered ON (or OFF).
  80          */
  81         mb();
  82 }
  83
  84 static inline
  85 void ufs_qcom_phy_qmp_14nm_set_tx_lane_enable(struct ufs_qcom_phy *phy, u32 val)
  86 {
  87         /*
  88          * 14nm PHY does not have TX_LANE_ENABLE register.
  89          * Implement this function so as not to propagate error to caller.
  90          */
  91 }
  92
  93 static inline void ufs_qcom_phy_qmp_14nm_start_serdes(struct ufs_qcom_phy *phy)
  94 {
  95         u32 tmp;
  96
  97         tmp = readl_relaxed(phy->mmio + UFS_PHY_PHY_START);
  98         tmp &= ~MASK_SERDES_START;
  99         tmp |= (1 << OFFSET_SERDES_START);
 100         writel_relaxed(tmp, phy->mmio + UFS_PHY_PHY_START);
 101         /* Ensure register value is committed */
 102         mb();
 103 }
 104
 105 static int ufs_qcom_phy_qmp_14nm_is_pcs_ready(struct ufs_qcom_phy *phy_common)
 106 {
 107         int err = 0;
 108         u32 val;
 109
 110         err = readl_poll_timeout(phy_common->mmio + UFS_PHY_PCS_READY_STATUS,
 111                 val, (val & MASK_PCS_READY), 10, 1000000);
 112         if (err)
 113                 dev_err(phy_common->dev, "%s: poll for pcs failed err = %d\n",
 114                         __func__, err);
 115         return err;
 116 }
 117
 118 static const struct phy_ops ufs_qcom_phy_qmp_14nm_phy_ops = {
 119         .init           = ufs_qcom_phy_qmp_14nm_init,
 120         .exit           = ufs_qcom_phy_exit,
 121         .power_on       = ufs_qcom_phy_power_on,
 122         .power_off      = ufs_qcom_phy_power_off,
 123         .owner          = THIS_MODULE,
 124 };
 125
 126 static struct ufs_qcom_phy_specific_ops phy_14nm_ops = {
 127         .calibrate_phy          = ufs_qcom_phy_qmp_14nm_phy_calibrate,
 128         .start_serdes           = ufs_qcom_phy_qmp_14nm_start_serdes,
 129         .is_physical_coding_sublayer_ready = ufs_qcom_phy_qmp_14nm_is_pcs_ready,
 130         .set_tx_lane_enable     = ufs_qcom_phy_qmp_14nm_set_tx_lane_enable,
 131         .power_control          = ufs_qcom_phy_qmp_14nm_power_control,
 132 };
 133
 134 static int ufs_qcom_phy_qmp_14nm_probe(struct platform_device *pdev)
 135 {
 136         struct device *dev = &pdev->dev;
 137         struct phy *generic_phy;
 138         struct ufs_qcom_phy_qmp_14nm *phy;
 139         int err = 0;
 140
 141         phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
 142         if (!phy) {
 143                 dev_err(dev, "%s: failed to allocate phy\n", __func__);
 144                 err = -ENOMEM;
 145                 goto out;
 146         }
 147
 148         generic_phy = ufs_qcom_phy_generic_probe(pdev, &phy->common_cfg,
 149                                 &ufs_qcom_phy_qmp_14nm_phy_ops, &phy_14nm_ops);
 150
 151         if (!generic_phy) {
 152                 dev_err(dev, "%s: ufs_qcom_phy_generic_probe() failed\n",
 153                         __func__);
 154                 err = -EIO;
 155                 goto out;
 156         }
 157
 158         phy_set_drvdata(generic_phy, phy);
 159
 160         strlcpy(phy->common_cfg.name, UFS_PHY_NAME,
 161                 sizeof(phy->common_cfg.name));
 162
 163 out:
 164         return err;
 165 }
 166
 167 static int ufs_qcom_phy_qmp_14nm_remove(struct platform_device *pdev)
 168 {
 169         struct device *dev = &pdev->dev;
 170         struct phy *generic_phy = to_phy(dev);
 171         struct ufs_qcom_phy *ufs_qcom_phy = get_ufs_qcom_phy(generic_phy);
 172         int err = 0;
 173
 174         err = ufs_qcom_phy_remove(generic_phy, ufs_qcom_phy);
 175         if (err)
 176                 dev_err(dev, "%s: ufs_qcom_phy_remove failed = %d\n",
 177                         __func__, err);
 178
 179         return err;
 180 }
 181
 182 static const struct of_device_id ufs_qcom_phy_qmp_14nm_of_match[] = {
 183         {.compatible = "qcom,ufs-phy-qmp-14nm"},
 184         {},
 185 };
 186 MODULE_DEVICE_TABLE(of, ufs_qcom_phy_qmp_14nm_of_match);
 187
 188 static struct platform_driver ufs_qcom_phy_qmp_14nm_driver = {
 189         .probe = ufs_qcom_phy_qmp_14nm_probe,
 190         .remove = ufs_qcom_phy_qmp_14nm_remove,
 191         .driver = {
 192                 .of_match_table = ufs_qcom_phy_qmp_14nm_of_match,
 193                 .name = "ufs_qcom_phy_qmp_14nm",
 194         },
 195 };
 196
 197 module_platform_driver(ufs_qcom_phy_qmp_14nm_driver);
 198
 199 MODULE_DESCRIPTION("Universal Flash Storage (UFS) QCOM PHY QMP 14nm");
 200 MODULE_LICENSE("GPL v2");