drivers/pinctrl/sh-pfc/sh_pfc.h

   1 /*
   2  * SuperH Pin Function Controller Support
   3  *
   4  * Copyright (c) 2008 Magnus Damm
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10
  11 #ifndef __SH_PFC_H
  12 #define __SH_PFC_H
  13
  14 #include <linux/bug.h>
  15 #include <linux/pinctrl/pinconf-generic.h>
  16 #include <linux/stringify.h>
  17
  18 enum {
  19         PINMUX_TYPE_NONE,
  20         PINMUX_TYPE_FUNCTION,
  21         PINMUX_TYPE_GPIO,
  22         PINMUX_TYPE_OUTPUT,
  23         PINMUX_TYPE_INPUT,
  24 };
  25
  26 #define SH_PFC_PIN_CFG_INPUT            (1 << 0)
  27 #define SH_PFC_PIN_CFG_OUTPUT           (1 << 1)
  28 #define SH_PFC_PIN_CFG_PULL_UP          (1 << 2)
  29 #define SH_PFC_PIN_CFG_PULL_DOWN        (1 << 3)
  30 #define SH_PFC_PIN_CFG_IO_VOLTAGE       (1 << 4)
  31 #define SH_PFC_PIN_CFG_NO_GPIO          (1 << 31)
  32
  33 struct sh_pfc_pin {
  34         u16 pin;
  35         u16 enum_id;
  36         const char *name;
  37         unsigned int configs;
  38 };
  39
  40 #define SH_PFC_PIN_GROUP(n)                             \
  41         {                                               \
  42                 .name = #n,                             \
  43                 .pins = n##_pins,                       \
  44                 .mux = n##_mux,                         \
  45                 .nr_pins = ARRAY_SIZE(n##_pins),        \
  46         }
  47
  48 struct sh_pfc_pin_group {
  49         const char *name;
  50         const unsigned int *pins;
  51         const unsigned int *mux;
  52         unsigned int nr_pins;
  53 };
  54
  55 /*
  56  * Using union vin_data saves memory occupied by the VIN data pins.
  57  * VIN_DATA_PIN_GROUP() is  a macro  used  to describe the VIN pin groups
  58  * in this case.
  59  */
  60 #define VIN_DATA_PIN_GROUP(n, s)                                \
  61         {                                                       \
  62                 .name = #n#s,                                   \
  63                 .pins = n##_pins.data##s,                       \
  64                 .mux = n##_mux.data##s,                         \
  65                 .nr_pins = ARRAY_SIZE(n##_pins.data##s),        \
  66         }
  67
  68 union vin_data {
  69         unsigned int data24[24];
  70         unsigned int data20[20];
  71         unsigned int data16[16];
  72         unsigned int data12[12];
  73         unsigned int data10[10];
  74         unsigned int data8[8];
  75         unsigned int data4[4];
  76 };
  77
  78 #define SH_PFC_FUNCTION(n)                              \
  79         {                                               \
  80                 .name = #n,                             \
  81                 .groups = n##_groups,                   \
  82                 .nr_groups = ARRAY_SIZE(n##_groups),    \
  83         }
  84
  85 struct sh_pfc_function {
  86         const char *name;
  87         const char * const *groups;
  88         unsigned int nr_groups;
  89 };
  90
  91 struct pinmux_func {
  92         u16 enum_id;
  93         const char *name;
  94 };
  95
  96 struct pinmux_cfg_reg {
  97         u32 reg;
  98         u8 reg_width, field_width;
  99         const u16 *enum_ids;
 100         const u8 *var_field_width;
 101 };
 102
 103 #define PINMUX_CFG_REG(name, r, r_width, f_width) \
 104         .reg = r, .reg_width = r_width, .field_width = f_width,         \
 105         .enum_ids = (const u16 [(r_width / f_width) * (1 << f_width)])
 106
 107 #define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
 108         .reg = r, .reg_width = r_width, \
 109         .var_field_width = (const u8 [r_width]) \
 110                 { var_fw0, var_fwn, 0 }, \
 111         .enum_ids = (const u16 [])
 112
 113 struct pinmux_data_reg {
 114         u32 reg;
 115         u8 reg_width;
 116         const u16 *enum_ids;
 117 };
 118
 119 #define PINMUX_DATA_REG(name, r, r_width) \
 120         .reg = r, .reg_width = r_width, \
 121         .enum_ids = (const u16 [r_width]) \
 122
 123 struct pinmux_irq {
 124         const short *gpios;
 125 };
 126
 127 #define PINMUX_IRQ(ids...)                         \
 128         { .gpios = (const short []) { ids, -1 } }
 129
 130 struct pinmux_range {
 131         u16 begin;
 132         u16 end;
 133         u16 force;
 134 };
 135
 136 struct sh_pfc;
 137
 138 struct sh_pfc_soc_operations {
 139         int (*init)(struct sh_pfc *pfc);
 140         unsigned int (*get_bias)(struct sh_pfc *pfc, unsigned int pin);
 141         void (*set_bias)(struct sh_pfc *pfc, unsigned int pin,
 142                          unsigned int bias);
 143         int (*get_io_voltage)(struct sh_pfc *pfc, unsigned int pin);
 144         int (*set_io_voltage)(struct sh_pfc *pfc, unsigned int pin,
 145                               u16 voltage_mV);
 146 };
 147
 148 struct sh_pfc_soc_info {
 149         const char *name;
 150         const struct sh_pfc_soc_operations *ops;
 151
 152         struct pinmux_range input;
 153         struct pinmux_range output;
 154         struct pinmux_range function;
 155
 156         const struct sh_pfc_pin *pins;
 157         unsigned int nr_pins;
 158         const struct sh_pfc_pin_group *groups;
 159         unsigned int nr_groups;
 160         const struct sh_pfc_function *functions;
 161         unsigned int nr_functions;
 162
 163 #ifdef CONFIG_SUPERH
 164         const struct pinmux_func *func_gpios;
 165         unsigned int nr_func_gpios;
 166 #endif
 167
 168         const struct pinmux_cfg_reg *cfg_regs;
 169         const struct pinmux_data_reg *data_regs;
 170
 171         const u16 *pinmux_data;
 172         unsigned int pinmux_data_size;
 173
 174         const struct pinmux_irq *gpio_irq;
 175         unsigned int gpio_irq_size;
 176
 177         u32 unlock_reg;
 178 };
 179
 180 /* -----------------------------------------------------------------------------
 181  * Helper macros to create pin and port lists
 182  */
 183
 184 /*
 185  * sh_pfc_soc_info pinmux_data array macros
 186  */
 187
 188 #define PINMUX_DATA(data_or_mark, ids...)       data_or_mark, ids, 0
 189
 190 #define PINMUX_IPSR_NOGP(ispr, fn)                                      \
 191         PINMUX_DATA(fn##_MARK, FN_##fn)
 192 #define PINMUX_IPSR_DATA(ipsr, fn)                                      \
 193         PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ipsr)
 194 #define PINMUX_IPSR_NOGM(ispr, fn, ms)                                  \
 195         PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ms)
 196 #define PINMUX_IPSR_NOFN(ipsr, fn, ms)                                  \
 197         PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##ms)
 198 #define PINMUX_IPSR_MSEL(ipsr, fn, ms)                                  \
 199         PINMUX_DATA(fn##_MARK, FN_##ms, FN_##ipsr, FN_##fn)
 200
 201 /*
 202  * GP port style (32 ports banks)
 203  */
 204
 205 #define PORT_GP_CFG_1(bank, pin, fn, sfx, cfg) fn(bank, pin, GP_##bank##_##pin, sfx, cfg)
 206 #define PORT_GP_1(bank, pin, fn, sfx)   PORT_GP_CFG_1(bank, pin, fn, sfx, 0)
 207
 208 #define PORT_GP_CFG_32(bank, fn, sfx, cfg)                              \
 209         PORT_GP_CFG_1(bank, 0,  fn, sfx, cfg), PORT_GP_CFG_1(bank, 1,  fn, sfx, cfg),   \
 210         PORT_GP_CFG_1(bank, 2,  fn, sfx, cfg), PORT_GP_CFG_1(bank, 3,  fn, sfx, cfg),   \
 211         PORT_GP_CFG_1(bank, 4,  fn, sfx, cfg), PORT_GP_CFG_1(bank, 5,  fn, sfx, cfg),   \
 212         PORT_GP_CFG_1(bank, 6,  fn, sfx, cfg), PORT_GP_CFG_1(bank, 7,  fn, sfx, cfg),   \
 213         PORT_GP_CFG_1(bank, 8,  fn, sfx, cfg), PORT_GP_CFG_1(bank, 9,  fn, sfx, cfg),   \
 214         PORT_GP_CFG_1(bank, 10, fn, sfx, cfg), PORT_GP_CFG_1(bank, 11, fn, sfx, cfg),   \
 215         PORT_GP_CFG_1(bank, 12, fn, sfx, cfg), PORT_GP_CFG_1(bank, 13, fn, sfx, cfg),   \
 216         PORT_GP_CFG_1(bank, 14, fn, sfx, cfg), PORT_GP_CFG_1(bank, 15, fn, sfx, cfg),   \
 217         PORT_GP_CFG_1(bank, 16, fn, sfx, cfg), PORT_GP_CFG_1(bank, 17, fn, sfx, cfg),   \
 218         PORT_GP_CFG_1(bank, 18, fn, sfx, cfg), PORT_GP_CFG_1(bank, 19, fn, sfx, cfg),   \
 219         PORT_GP_CFG_1(bank, 20, fn, sfx, cfg), PORT_GP_CFG_1(bank, 21, fn, sfx, cfg),   \
 220         PORT_GP_CFG_1(bank, 22, fn, sfx, cfg), PORT_GP_CFG_1(bank, 23, fn, sfx, cfg),   \
 221         PORT_GP_CFG_1(bank, 24, fn, sfx, cfg), PORT_GP_CFG_1(bank, 25, fn, sfx, cfg),   \
 222         PORT_GP_CFG_1(bank, 26, fn, sfx, cfg), PORT_GP_CFG_1(bank, 27, fn, sfx, cfg),   \
 223         PORT_GP_CFG_1(bank, 28, fn, sfx, cfg), PORT_GP_CFG_1(bank, 29, fn, sfx, cfg),   \
 224         PORT_GP_CFG_1(bank, 30, fn, sfx, cfg), PORT_GP_CFG_1(bank, 31, fn, sfx, cfg)
 225 #define PORT_GP_32(bank, fn, sfx)       PORT_GP_CFG_32(bank, fn, sfx, 0)
 226
 227 #define PORT_GP_32_REV(bank, fn, sfx)                                   \
 228         PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx),     \
 229         PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx),     \
 230         PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx),     \
 231         PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx),     \
 232         PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx),     \
 233         PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx),     \
 234         PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx),     \
 235         PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx),     \
 236         PORT_GP_1(bank, 15, fn, sfx), PORT_GP_1(bank, 14, fn, sfx),     \
 237         PORT_GP_1(bank, 13, fn, sfx), PORT_GP_1(bank, 12, fn, sfx),     \
 238         PORT_GP_1(bank, 11, fn, sfx), PORT_GP_1(bank, 10, fn, sfx),     \
 239         PORT_GP_1(bank, 9,  fn, sfx), PORT_GP_1(bank, 8,  fn, sfx),     \
 240         PORT_GP_1(bank, 7,  fn, sfx), PORT_GP_1(bank, 6,  fn, sfx),     \
 241         PORT_GP_1(bank, 5,  fn, sfx), PORT_GP_1(bank, 4,  fn, sfx),     \
 242         PORT_GP_1(bank, 3,  fn, sfx), PORT_GP_1(bank, 2,  fn, sfx),     \
 243         PORT_GP_1(bank, 1,  fn, sfx), PORT_GP_1(bank, 0,  fn, sfx)
 244
 245 /* GP_ALL(suffix) - Expand to a list of GP_#_#_suffix */
 246 #define _GP_ALL(bank, pin, name, sfx, cfg)      name##_##sfx
 247 #define GP_ALL(str)                     CPU_ALL_PORT(_GP_ALL, str)
 248
 249 /* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */
 250 #define _GP_GPIO(bank, _pin, _name, sfx, cfg)                           \
 251         {                                                               \
 252                 .pin = (bank * 32) + _pin,                              \
 253                 .name = __stringify(_name),                             \
 254                 .enum_id = _name##_DATA,                                \
 255                 .configs = cfg,                                         \
 256         }
 257 #define PINMUX_GPIO_GP_ALL()            CPU_ALL_PORT(_GP_GPIO, unused)
 258
 259 /* PINMUX_DATA_GP_ALL -  Expand to a list of name_DATA, name_FN marks */
 260 #define _GP_DATA(bank, pin, name, sfx, cfg)     PINMUX_DATA(name##_DATA, name##_FN)
 261 #define PINMUX_DATA_GP_ALL()            CPU_ALL_PORT(_GP_DATA, unused)
 262
 263 /*
 264  * PORT style (linear pin space)
 265  */
 266
 267 #define PORT_1(pn, fn, pfx, sfx) fn(pn, pfx, sfx)
 268
 269 #define PORT_10(pn, fn, pfx, sfx)                                         \
 270         PORT_1(pn,   fn, pfx##0, sfx), PORT_1(pn+1, fn, pfx##1, sfx),     \
 271         PORT_1(pn+2, fn, pfx##2, sfx), PORT_1(pn+3, fn, pfx##3, sfx),     \
 272         PORT_1(pn+4, fn, pfx##4, sfx), PORT_1(pn+5, fn, pfx##5, sfx),     \
 273         PORT_1(pn+6, fn, pfx##6, sfx), PORT_1(pn+7, fn, pfx##7, sfx),     \
 274         PORT_1(pn+8, fn, pfx##8, sfx), PORT_1(pn+9, fn, pfx##9, sfx)
 275
 276 #define PORT_90(pn, fn, pfx, sfx)                                         \
 277         PORT_10(pn+10, fn, pfx##1, sfx), PORT_10(pn+20, fn, pfx##2, sfx), \
 278         PORT_10(pn+30, fn, pfx##3, sfx), PORT_10(pn+40, fn, pfx##4, sfx), \
 279         PORT_10(pn+50, fn, pfx##5, sfx), PORT_10(pn+60, fn, pfx##6, sfx), \
 280         PORT_10(pn+70, fn, pfx##7, sfx), PORT_10(pn+80, fn, pfx##8, sfx), \
 281         PORT_10(pn+90, fn, pfx##9, sfx)
 282
 283 /* PORT_ALL(suffix) - Expand to a list of PORT_#_suffix */
 284 #define _PORT_ALL(pn, pfx, sfx)         pfx##_##sfx
 285 #define PORT_ALL(str)                   CPU_ALL_PORT(_PORT_ALL, PORT, str)
 286
 287 /* PINMUX_GPIO - Expand to a sh_pfc_pin entry */
 288 #define PINMUX_GPIO(_pin)                                               \
 289         [GPIO_##_pin] = {                                               \
 290                 .pin = (u16)-1,                                         \
 291                 .name = __stringify(GPIO_##_pin),                       \
 292                 .enum_id = _pin##_DATA,                                 \
 293         }
 294
 295 /* SH_PFC_PIN_CFG - Expand to a sh_pfc_pin entry (named PORT#) with config */
 296 #define SH_PFC_PIN_CFG(_pin, cfgs)                                      \
 297         {                                                               \
 298                 .pin = _pin,                                            \
 299                 .name = __stringify(PORT##_pin),                        \
 300                 .enum_id = PORT##_pin##_DATA,                           \
 301                 .configs = cfgs,                                        \
 302         }
 303
 304 /* SH_PFC_PIN_NAMED - Expand to a sh_pfc_pin entry with the given name */
 305 #define SH_PFC_PIN_NAMED(row, col, _name)                               \
 306         {                                                               \
 307                 .pin = PIN_NUMBER(row, col),                            \
 308                 .name = __stringify(PIN_##_name),                       \
 309                 .configs = SH_PFC_PIN_CFG_NO_GPIO,                      \
 310         }
 311
 312 /* PINMUX_DATA_ALL - Expand to a list of PORT_name_DATA, PORT_name_FN0,
 313  *                   PORT_name_OUT, PORT_name_IN marks
 314  */
 315 #define _PORT_DATA(pn, pfx, sfx)                                        \
 316         PINMUX_DATA(PORT##pfx##_DATA, PORT##pfx##_FN0,                  \
 317                     PORT##pfx##_OUT, PORT##pfx##_IN)
 318 #define PINMUX_DATA_ALL()               CPU_ALL_PORT(_PORT_DATA, , unused)
 319
 320 /* GPIO_FN(name) - Expand to a sh_pfc_pin entry for a function GPIO */
 321 #define PINMUX_GPIO_FN(gpio, base, data_or_mark)                        \
 322         [gpio - (base)] = {                                             \
 323                 .name = __stringify(gpio),                              \
 324                 .enum_id = data_or_mark,                                \
 325         }
 326 #define GPIO_FN(str)                                                    \
 327         PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK)
 328
 329 /*
 330  * PORTnCR macro
 331  */
 332 #define PORTCR(nr, reg)                                                 \
 333         {                                                               \
 334                 PINMUX_CFG_REG_VAR("PORT" nr "CR", reg, 8, 2, 2, 1, 3) {\
 335                         /* PULMD[1:0], handled by .set_bias() */        \
 336                         0, 0, 0, 0,                                     \
 337                         /* IE and OE */                                 \
 338                         0, PORT##nr##_OUT, PORT##nr##_IN, 0,            \
 339                         /* SEC, not supported */                        \
 340                         0, 0,                                           \
 341                         /* PTMD[2:0] */                                 \
 342                         PORT##nr##_FN0, PORT##nr##_FN1,                 \
 343                         PORT##nr##_FN2, PORT##nr##_FN3,                 \
 344                         PORT##nr##_FN4, PORT##nr##_FN5,                 \
 345                         PORT##nr##_FN6, PORT##nr##_FN7                  \
 346                 }                                                       \
 347         }
 348
 349 /*
 350  * GPIO number helper macro for R-Car
 351  */
 352 #define RCAR_GP_PIN(bank, pin)          (((bank) * 32) + (pin))
 353
 354 #endif /* __SH_PFC_H */